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https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:43:15 -06:00
Minor Updates
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@@ -26,13 +26,13 @@ PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
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; BITS 7-6 IDENTFY THE COLUMN OF THE KEY PRESSED
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; BITS 5-0 ARE A BITMAP, WITH A BIT ON TO INDICATE ROW OF KEY PRESSED
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;
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; ____PC0________PC1________PC2_______PC3___
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; PB5 | $20 [D] $60 [E] $A0 [F] $E0 [BO]
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; PB4 | $10 [A] $50 [B] $90 [C] $D0 [GO]
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; PB3 | $08 [7] $48 [8] $88 [9] $C8 [EX]
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; PB2 | $04 [4] $44 [5] $84 [6] $C4 [DE]
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; PB1 | $02 [1] $42 [2] $82 [3] $C2 [EN]
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; PB0 | $01 [FW] $41 [0] $81 [BK] $C1 [CL]
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; ____PC0________PC1________PC2________PC3____
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; PB5 | $20 [D] $60 [E] $A0 [F] $E0 [BO]
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; PB4 | $10 [A] $50 [B] $90 [C] $D0 [GO]
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; PB3 | $08 [7] $48 [8] $88 [9] $C8 [EX]
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; PB2 | $04 [4] $44 [5] $84 [6] $C4 [DE]
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; PB1 | $02 [1] $42 [2] $82 [3] $C2 [EN]
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; PB0 | $01 [FW] $41 [0] $81 [BK] $C1 [CL]
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;
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;__DSKY_INIT_________________________________________________________________________________________
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;
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@@ -42,12 +42,32 @@ PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
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DSKY_INIT:
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OR $FF ; SIGNAL TO WAIT FOR KEY RELEASE
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LD (DSKY_KEYBUF),A ; SET IT
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DSKY_RESET:
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PUSH AF
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; PPI PORT B IS NORMALLY SET TO INPUT, BUT DURING HERE WE
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; TEMPORARILY SET IT TO OUTPUT. WHILE IN OUTPUT MODE, WE
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; WRITE A VALUE OF $FF WHICH WILL BE PERSISTED BY THE PPI
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; CHIP BUS HOLD CIRCUIT IF THERE IS NO DSKY PRESENT. SO,
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; WE CAN SUBSEQUENTLY TEST FOR PPIB=$FF TO SEE IF THERE IS
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; NO DSKY AND PREVENT PROBLEMS WITH PHANTOM DSKY KEY PRESSES.
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; IF A DSKY IS PRESENT, IT WILL SIMPLY OVERPOWER THE PPI
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; BUS HOLD CIRCUIT.
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LD A,$80 ; PA OUT, PB OUT, PC OUT
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OUT (PPIX),A
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LD A,$FF ; SET PPIB=$FF, BUS HOLD
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OUT (PPIB),A
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LD A,$82 ; PA OUT, PB IN, PC OUT
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OUT (PPIX),A
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OR $70 ; PPISD AND 7218 INACTIVE
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;IN A,(PPIB) ; *DEBUG*
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;CALL PRTHEXBYTE ; *DEBUG*
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DSKY_RESET:
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PUSH AF
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LD A,$70 ; PPISD AND 7218 INACTIVE
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OUT (PPIC),A
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POP AF
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RET
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;
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@@ -136,6 +156,11 @@ DSKY_STAT2:
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;____________________________________________________________________________________________________
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;
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DSKY_KEY:
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; IF PPIB VALUE IS $FF, THERE IS NO DSKY, SEE DSKY_INIT
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IN A,(PPIB)
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INC A
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RET Z
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CALL DSKY_SCAN ; INITIAL KEY PRESS SCAN
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LD E,A ; SAVE INITIAL SCAN VALUE
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DSKY_KEY1:
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@@ -179,7 +204,7 @@ DSKY_SCAN2:
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RRC E ; MOVE COL ID
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RRC E ; ... TO HIGH BITS 6 & 7
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OR E ; COMBINE WITH ROW
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JR DSKY_RESET ; RETURN VIA RESET
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JP DSKY_RESET ; RETURN VIA RESET
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;
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;_KEYMAP_TABLE_____________________________________________________________________________________________________________
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;
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@@ -959,7 +959,6 @@ PPIDE_PROBE:
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CALL DELAY ; DELAY ~16US
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;
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; IN A,(PPIDE_REG_STAT) ; GET STATUS
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; BELOW TESTS FOR EXISTENCE OF AN IDE CONTROLLER ON THE
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; PPIDE INTERFACE. WE WRITE A VALUE OF ZERO FIRST SO THAT
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; THE PPI BUS HOLD WILL RETURN A VALUE OF ZERO IF THERE IS
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@@ -970,6 +969,7 @@ PPIDE_PROBE:
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; BECAUSE THE WRITE SIGNAL IS NEVER PULSED.
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XOR A
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OUT (PPIDE_IO_DATALO),A
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; IN A,(PPIDE_REG_STAT) ; GET STATUS
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CALL PPIDE_IN
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.DB PPIDE_REG_STAT
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DCALL PC_SPACE
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@@ -153,6 +153,7 @@ MENU:
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CALL NEWLINE2
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;
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#IF (DSKYENABLE)
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CALL DSKY_RESET
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; DISPLAY DSKY BOOT MESSAGE
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LD HL,MSG_SEL ; POINT TO BOOT MESSAGE
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CALL DSKY_SHOWSEG ; DISPLAY MESSAGE
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@@ -369,7 +369,7 @@ SD_INIT1:
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;
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; INITIALIZE UNIT DESIGNATED IN ACCUM
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;
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SD_INITUNIT
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SD_INITUNIT:
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CALL SD_SELUNIT ; SELECT UNIT
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RET NZ ; ABORT ON ERROR
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;
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@@ -1312,6 +1312,8 @@ SD_SETUP:
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#ENDIF
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;
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#IF (SDMODE == SDMODE_PPI)
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; PPISD IS DESIGNED TO CORESIDE ON THE SAME PARALLEL PORT
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; AS A DSKY. SEE DSKY.ASM FOR DETAILS.
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LD A,82H ; PPI PORT A=OUT, B=IN, C=OUT
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OUT (SD_PPIX),A
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LD A,SD_OPRDEF
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