Finalize 2.8.5

Clean up support in TMS driver for SCG board.

Doc/ChangeLog.txt

@@ -1,3 +1,7 @@
+Version 2.8.5
+-------------
+- WBW: Cleaned up support in TMS driver for SCG board
+
 Version 2.8.4
 -------------
 - WBW: FD.COM renamed to FDU.COM and integrated with build

ReadMe.txt

@@ -7,7 +7,7 @@
 ***********************************************************************
 
 Wayne Warthen (wwarthen@gmail.com)
-Version 2.8.4, 2017-09-02
+Version 2.8.5, 2017-10-09
 https://www.retrobrewcomputers.org/
 
 RomWBW is a ROM-based implementation of CP/M-80 2.2 and Z-System for 

Source/CBIOS/ver.inc

@@ -1,5 +1,5 @@
 #DEFINE	RMJ	2
 #DEFINE	RMN	8
-#DEFINE	RUP	3
+#DEFINE	RUP	5
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"2.8.4"
+#DEFINE BIOSVER	"2.8.5"

Source/HBIOS/hbios.asm

@@ -2091,7 +2091,7 @@ SIZ_KBD		.EQU	$ - ORG_KBD
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
-#IF (VDUENABLE | TMSENABLE)
+#IF (VDUENABLE | (TMSENABLE & (PLATFORM == PLT_N8)))
 ORG_PPK		.EQU	$
   #INCLUDE "ppk.asm"
 SIZ_PPK		.EQU	$ - ORG_PPK

Source/HBIOS/tms.asm

@@ -26,13 +26,14 @@ TMS_PPIX	.EQU	N8_BASE + $07	; PPI CONTROL PORT
 
 #ELSE
 
-TMS_DATREG	.EQU	$50		; READ/WRITE DATA
-TMS_CMDREG	.EQU	$51		; READ STATUS / WRITE REG SEL
+TMS_DATREG	.EQU	$98		; READ/WRITE DATA
+TMS_CMDREG	.EQU	$99		; READ STATUS / WRITE REG SEL
+TMS_ACR		.EQU	$9C		; AUX CONTROL REGISTER
 
-TMS_PPIA	.EQU	$F4		; PPI PORT A
-TMS_PPIB	.EQU	$F5		; PPI PORT B
-TMS_PPIC	.EQU	$F6		; PPI PORT C
-TMS_PPIX	.EQU	$F7		; PPI CONTROL PORT
+TMS_PPIA	.EQU	0		; PPI PORT A
+TMS_PPIB	.EQU	0		; PPI PORT B
+TMS_PPIC	.EQU	0		; PPI PORT C
+TMS_PPIX	.EQU	0		; PPI CONTROL PORT
 
 #ENDIF
 ;
@@ -41,28 +42,50 @@ TMS_COLS	.EQU	40
 ;
 TERMENABLE	.SET	TRUE		; INCLUDE TERMINAL PSEUDODEVICE DRIVER
 ;
-; BELOW WAS TUNED FOR N8 AT 18MHZ WITH 3 IO WAIT STATES
-; WILL NEED TO BE MODIFIED FOR DIFFERENT ACCESS SPEEDS
+; TMS_IODELAY IS USED TO ADD RECOVERY TIME TO TMS9918 ACCESSES
 ; IF YOU SEE SCREEN CORRUPTION, ADJUST THIS!!!
 ;
+#IF (PLATFORM == PLT_N8)
+; BELOW WAS TUNED FOR N8 AT 18MHZ WITH 3 IO WAIT STATES
 #DEFINE		TMS_IODELAY	NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP
+#ELSE
+; BELOW WAS TUNED FOR SBC AT 8MHZ
+#DEFINE		TMS_IODELAY	NOP \ NOP
+#ENDIF
 ;
 ;======================================================================
 ; TMS DRIVER - INITIALIZATION
 ;======================================================================
 ;
 TMS_INIT:
+#IF (PLATFORM != PLT_N8)
+	LD	A,$FF
+	OUT	(TMS_ACR),A		; INIT AUX CONTROL REG
+#ENDIF
+;
+#IF (PLATFORM == PLT_N8)
 	LD	IY,TMS_IDAT		; POINTER TO INSTANCE DATA
+#ENDIF
 ;
 	CALL	NEWLINE			; FORMATTING
 	PRTS("TMS: IO=0x$")
 	LD	A,TMS_DATREG
 	CALL	PRTHEXBYTE
+	CALL	TMS_PROBE		; CHECK FOR HW EXISTENCE
+	JR	Z,TMS_INIT1		; CONTINUE IF PRESENT
+;
+	; HARDWARE NOT PRESENT
+	PRTS(" NOT PRESENT$")
+	OR	$FF			; SIGNAL FAILURE
+	RET
 ;
+TMS_INIT1:
 	CALL 	TMS_CRTINIT		; SETUP THE TMS CHIP REGISTERS
 	CALL	TMS_LOADFONT		; LOAD FONT DATA FROM ROM TO TMS STRORAGE
 	CALL	TMS_VDARES
+#IF (PLATFORM == PLT_N8)
 	CALL	PPK_INIT		; INITIALIZE KEYBOARD DRIVER
+#ENDIF
 ;
 	; ADD OURSELVES TO VDA DISPATCH TABLE
 	LD	BC,TMS_DISPATCH		; BC := DISPATCH ADDRESS
@@ -118,11 +141,19 @@ TMS_DISPATCH:
 	DEC	A
 	JP	Z,TMS_VDASCR	; $4B
 	DEC	A
+#IF (PLATFORM == PLT_N8)
 	JP	Z,PPK_STAT	; $4C
 	DEC	A
 	JP	Z,PPK_FLUSH	; $4D
 	DEC	A
 	JP	Z,PPK_READ	; $4E
+#ELSE
+	JP	Z,TMS_STAT	; $4C
+	DEC	A
+	JP	Z,TMS_FLUSH	; $4D
+	DEC	A
+	JP	Z,TMS_READ	; $4E
+#ENDIF
 	CALL	PANIC
 
 TMS_VDAINI:
@@ -231,6 +262,26 @@ TMS_VDASCR2:
 	CALL	TMS_SETCUR
 	XOR	A
 	RET
+
+#IF (PLATFORM != PLT_N8)
+
+; DUMMY FUNCTIONS BELOW BECAUSE SCG BOARD HAS NO
+; KEYBOARD INTERFACE
+
+TMS_STAT:
+	XOR	A		; SIGNAL NOTHING READY
+	JP	CIO_IDLE	; DO IDLE PROCESSING
+
+TMS_FLUSH:
+	XOR	A		; SIGNAL SUCCESS
+	RET
+
+TMS_READ:
+	LD	E,26		; RETURN <SUB> (CTRL-Z)
+	XOR	A		; SIGNAL SUCCESS
+	RET
+
+#ENDIF
 ;
 ;======================================================================
 ; TMS DRIVER - PRIVATE DRIVER FUNCTIONS
@@ -273,7 +324,39 @@ TMS_RD:
 	RET
 ;
 ;----------------------------------------------------------------------
-; MOS 8563 DISPLAY CONTROLLER CHIP INITIALIZATION
+; PROBE FOR TMS HARDWARE
+;----------------------------------------------------------------------
+;
+; ON RETURN, ZF SET INDICATES HARDWARE FOUND
+;
+TMS_PROBE:
+	; SET WRITE ADDRESS TO $0
+	LD	HL,0
+	CALL	TMS_WR
+	; WRITE TEST PATTERN TO FIRST TWO BYTES
+	LD	A,$A5			; FIRST BYTE
+	OUT	(TMS_DATREG),A		; OUTPUT
+	TMS_IODELAY			; DELAY
+	CPL				; COMPLEMENT ACCUM
+	OUT	(TMS_DATREG),A		; SECOND BYTE
+	TMS_IODELAY			; DELAY
+	; SET READ ADDRESS TO $0
+	LD	HL,0
+	CALL	TMS_RD
+	; READ TEST PATTERN
+	LD	C,$A5			; VALUE TO EXPECT
+	IN	A,(TMS_DATREG)		; READ FIRST BYTE
+	TMS_IODELAY			; DELAY
+	CP	C			; COMPARE
+	RET	NZ			; RETURN ON MISCOMPARE
+	IN	A,(TMS_DATREG)		; READ SECOND BYTE
+	TMS_IODELAY			; DELAY
+	CPL				; COMPLEMENT IT
+	CP	C			; COMPARE
+	RET				; RETURN WITH RESULT IN Z
+;
+;----------------------------------------------------------------------
+; TMS9918 DISPLAY CONTROLLER CHIP INITIALIZATION
 ;----------------------------------------------------------------------
 ;
 TMS_CRTINIT:

Source/HBIOS/ver.inc

@@ -1,5 +1,5 @@
 #DEFINE	RMJ	2
 #DEFINE	RMN	8
-#DEFINE	RUP	3
+#DEFINE	RUP	5
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"2.8.4"
+#DEFINE BIOSVER	"2.8.5"