diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 7b57f23b..ba080d08 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -1,3 +1,5 @@ + +- DDW: Added support for the 'N8PC' platform. Includes support for the M6242 RTC chip. Version 3.6 ----------- - RDG: Added VDA driver for Xosera FPGA-based VDC diff --git a/Source/HBIOS/Build.cmd b/Source/HBIOS/Build.cmd index 52b923dc..29a072a6 100644 --- a/Source/HBIOS/Build.cmd +++ b/Source/HBIOS/Build.cmd @@ -233,6 +233,7 @@ call Build MBC std || exit /b call Build ZETA std || exit /b call Build ZETA2 std || exit /b call Build N8 std || exit /b +call Build N8PC std || exit /b call Build MK4 std || exit /b call Build RCZ80 std || exit /b call Build RCEZ80 std || exit /b diff --git a/Source/HBIOS/Build.ps1 b/Source/HBIOS/Build.ps1 index ac634515..be402d51 100644 --- a/Source/HBIOS/Build.ps1 +++ b/Source/HBIOS/Build.ps1 @@ -28,7 +28,7 @@ $ErrorAction = 'Stop' # $PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU", "SZ80", "RCEZ80", "MSX" -$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "SZ180", "EPITX", "GMZ180" +$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "SZ180", "EPITX", "GMZ180","N8PC" $PlatformListZ280 = "RCZ280" # diff --git a/Source/HBIOS/Build.sh b/Source/HBIOS/Build.sh index d007ae81..20be672d 100755 --- a/Source/HBIOS/Build.sh +++ b/Source/HBIOS/Build.sh @@ -17,6 +17,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh ROM_PLATFORM="N8"; ROM_CONFIG="std"; bash Build.sh + ROM_PLATFORM="N8PC"; ROM_CONFIG="std"; bash Build.sh ROM_PLATFORM="MK4"; ROM_CONFIG="std"; bash Build.sh ROM_PLATFORM="RCEZ80"; ROM_CONFIG="std"; bash Build.sh ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh diff --git a/Source/HBIOS/Config/N8PC_std.asm b/Source/HBIOS/Config/N8PC_std.asm new file mode 100644 index 00000000..e38a6ad1 --- /dev/null +++ b/Source/HBIOS/Config/N8PC_std.asm @@ -0,0 +1,93 @@ +; +;================================================================================================== +; ROMWBW DEFAULT BUILD SETTINGS FOR N8PC +;================================================================================================== +; +; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM +; INDICATED ABOVE. THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS +; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES. +; +; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW: +; +; cfg_MASTER.asm - MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS +; | +; +-> cfg_.asm - PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM +; | +; +-> Config/_std.asm - BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD +; | +; +-> Config/_.asm - USER: CUSTOM USER BUILD SETTINGS +; +; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW +; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE +; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY +; OVERRIDE THESE SETTINGS AS DESIRED. +; +; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT +; FILE (SEE #INCLUDE STATEMENT BELOW). THE TOP TWO FILES SHOULD NOT BE +; MODIFIED. +; +; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE +; DEFAULT BUILD SETTINGS (Config/_std.asm) OR PREFERABLY +; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT +; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm). +; +; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE +; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST +; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES. +; +; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE +; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE). +; +; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE +; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT +; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". +; +#DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED +#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION +; +#INCLUDE "cfg_N8PC.asm" +; +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +; +CPUOSC .SET 9216000 ; CPU OSC FREQ IN MHZ +INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) +; +RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) +; +Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 +Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3) +Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) +; +DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY +ICMENABLE .SET FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218) +PKDENABLE .SET FALSE ; ENABLES DSKY NG PKD DRIVER (8259) +CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD +; +M6242RTCENABLE .SET TRUE ; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM) +; +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) +; +TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) +; +FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDCNT .SET 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2) +FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +; +PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) +; +PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +; +PPPENABLE .SET FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) +; +AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER + + +DSKYENABLE .SET TRUE ; ENABLES DSKY FUNCTIONALITY +PKDENABLE .SET TRUE ; ENABLES DSKY NG PKD DRIVER (8259) +PKDPPIBASE .SET N8_PPI0 ; BASE I/O ADDRESS OF PKD PPI +PKDOSC .SET 1000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) diff --git a/Source/HBIOS/Config/SCZ180_sc700_std.asm b/Source/HBIOS/Config/SCZ180_sc700_std.asm index 1c001382..46e863df 100644 --- a/Source/HBIOS/Config/SCZ180_sc700_std.asm +++ b/Source/HBIOS/Config/SCZ180_sc700_std.asm @@ -70,7 +70,7 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) diff --git a/Source/HBIOS/Config/ZETA2_std.asm b/Source/HBIOS/Config/ZETA2_std.asm index 8d4c5468..02594945 100644 --- a/Source/HBIOS/Config/ZETA2_std.asm +++ b/Source/HBIOS/Config/ZETA2_std.asm @@ -56,7 +56,7 @@ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) -FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] +FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC|N8PC] FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] ; diff --git a/Source/HBIOS/Makefile.new b/Source/HBIOS/Makefile.new index b9f98a94..45183b51 100644 --- a/Source/HBIOS/Makefile.new +++ b/Source/HBIOS/Makefile.new @@ -6,7 +6,7 @@ DIST_OBJECTS := \ DUO_std SCZ180_sc126 SCZ180_sc130 SCZ180_sc131 SCZ180_sc140 \ SCZ180_sc503 SCZ180_sc700 S100_std UNA_std Z80RETRO_std \ ZETA_std ZETA2_std HEATH_std EPITX_std GMZ180_std -# RCZ80_mt RCZ80_duart MON_std +# RCZ80_mt RCZ80_duart MON_std N8PC_std OBJECTS := $(DIST_OBJECTS) OBJECTS := RCZ80_std @@ -143,4 +143,3 @@ UNA_%.rom: UNA_%.osimg.bin UNA_%.hbios_env.sh %.upd: %.hbios_rom.bin %.osimg.bin %.osimg1.bin %.imgpad2.bin cat $(*F).hbios_rom.bin $(*F).osimg.bin $(*F).osimg1.bin $(*F).imgpad2.bin >$@ - diff --git a/Source/HBIOS/cfg_DUO.asm b/Source/HBIOS/cfg_DUO.asm index 7b73bd0d..0168729b 100644 --- a/Source/HBIOS/cfg_DUO.asm +++ b/Source/HBIOS/cfg_DUO.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_DUO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_DUO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -244,7 +244,7 @@ CVDUMODE .SET CVDUMODE_MBC ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_DUO ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_DUO ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_DYNO.asm b/Source/HBIOS/cfg_DYNO.asm index 6d2c1d00..29f41163 100644 --- a/Source/HBIOS/cfg_DYNO.asm +++ b/Source/HBIOS/cfg_DYNO.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -260,7 +260,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_EPITX.asm b/Source/HBIOS/cfg_EPITX.asm index 40ad1661..e7f20c08 100644 --- a/Source/HBIOS/cfg_EPITX.asm +++ b/Source/HBIOS/cfg_EPITX.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_EPITX ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_EPITX ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -256,7 +256,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_EZZ80.asm b/Source/HBIOS/cfg_EZZ80.asm index e2463064..6d5114e2 100644 --- a/Source/HBIOS/cfg_EZZ80.asm +++ b/Source/HBIOS/cfg_EZZ80.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_EZZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_EZZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -265,7 +265,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_GMZ180.asm b/Source/HBIOS/cfg_GMZ180.asm index e2aadd64..d5e0f1da 100644 --- a/Source/HBIOS/cfg_GMZ180.asm +++ b/Source/HBIOS/cfg_GMZ180.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_GMZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_GMZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -255,7 +255,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_HEATH.asm b/Source/HBIOS/cfg_HEATH.asm index 6146432c..83fec71b 100644 --- a/Source/HBIOS/cfg_HEATH.asm +++ b/Source/HBIOS/cfg_HEATH.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_HEATH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_HEATH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -265,7 +265,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_MASTER.asm b/Source/HBIOS/cfg_MASTER.asm index a882246b..250feea3 100644 --- a/Source/HBIOS/cfg_MASTER.asm +++ b/Source/HBIOS/cfg_MASTER.asm @@ -49,7 +49,7 @@ ; #INCLUDE "hbios.inc" ; -PLATFORM .EQU PLT_NONE ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .EQU PLT_NONE ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .EQU CPU_NONE ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .EQU FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .EQU BIOS_NONE ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -339,7 +339,7 @@ GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) GDCMODE .EQU GDCMODE_RPH ; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH] GDCMON .EQU GDCMON_EGA ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA] TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .EQU FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) @@ -559,4 +559,3 @@ CHNATIVEEZ80 .EQU FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE _CH376_DATA_PORT .EQU $FF88 ; CH376: DATA PORT _CH376_COMMAND_PORT .EQU $FF89 ; CH376: COMMAND PORT _USB_MODULE_LEDS .EQU $FF8A ; CH376: LED CONTROL PORT - diff --git a/Source/HBIOS/cfg_MBC.asm b/Source/HBIOS/cfg_MBC.asm index 3ae28e03..16eec5f5 100644 --- a/Source/HBIOS/cfg_MBC.asm +++ b/Source/HBIOS/cfg_MBC.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -237,7 +237,7 @@ CVDUMODE .SET CVDUMODE_MBC ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_MK4.asm b/Source/HBIOS/cfg_MK4.asm index 25c72ed7..42e30f20 100644 --- a/Source/HBIOS/cfg_MK4.asm +++ b/Source/HBIOS/cfg_MK4.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -248,7 +248,7 @@ CVDUMODE .SET CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .SET CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_MON.asm b/Source/HBIOS/cfg_MON.asm index db29c120..fd7789d4 100644 --- a/Source/HBIOS/cfg_MON.asm +++ b/Source/HBIOS/cfg_MON.asm @@ -51,7 +51,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_MON ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_MON ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -262,7 +262,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_MSX.asm b/Source/HBIOS/cfg_MSX.asm index 72cd4974..1eb44a71 100644 --- a/Source/HBIOS/cfg_MSX.asm +++ b/Source/HBIOS/cfg_MSX.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_MSX ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80|MSX] +PLATFORM .SET PLT_MSX ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80|MSX|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET TRUE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -268,7 +268,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSXMKY ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSXMKY ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9938/V9958 TMSTIMENABLE .SET TRUE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_N8.asm b/Source/HBIOS/cfg_N8.asm index eced079a..a640f73b 100644 --- a/Source/HBIOS/cfg_N8.asm +++ b/Source/HBIOS/cfg_N8.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -250,7 +250,7 @@ CVDUMODE .SET CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .SET CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_N8PC.asm b/Source/HBIOS/cfg_N8PC.asm new file mode 100644 index 00000000..bb5d0f7a --- /dev/null +++ b/Source/HBIOS/cfg_N8PC.asm @@ -0,0 +1,387 @@ +; +;================================================================================================== +; ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: N8PC +;================================================================================================== +; +; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM +; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, +; YOU SHOULD OVERRIDE SETTINGS YOU WANT USING A CONFIGURATION FILE IN +; THE CONFIG DIRECTORY UNDER THIS DIRECTORY. +; +; THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. IT IS MAINTAINED BY THE +; AUTHORS OF ROMWBW. TO OVERRIDE SETTINGS YOU SHOULD USE A +; CONFIGURATION FILE IN THE CONFIG DIRECTORY UNDER THIS DIRECTORY. +; +; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW: +; +; cfg_MASTER.asm - MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS +; | +; +-> cfg_.asm - PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM +; | +; +-> Config/_std.asm - BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD +; | +; +-> Config/_.asm - USER: CUSTOM USER BUILD SETTINGS +; +; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW +; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE +; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY +; OVERRIDE THESE SETTINGS AS DESIRED. +; +; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT +; FILE (SEE #INCLUDE STATEMENT BELOW). THE TOP TWO FILES SHOULD NOT BE +; MODIFIED. TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THE +; DEFAULT BUILD SETTINGS (Config/_std.asm) OR PREFERABLY +; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT +; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm). +; +; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE +; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST +; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES. +; +; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE +; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT +; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". +; +#DEFINE PLATFORM_NAME "N8PC", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES +#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE +#DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED +#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION +; +#INCLUDE "cfg_MASTER.asm" +; +PLATFORM .SET PLT_N8PC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] +CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] +NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) +BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] +BATCOND .SET FALSE ; ENABLE LOW BATTERY WARNING MESSAGE +HBIOS_MUTEX .SET FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD) +USELZSA2 .SET FALSE ; ENABLE FONT COMPRESSION +TICKFREQ .SET 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ) +; +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_DELAY .SET 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +BT_REC_TYPE .SET BT_REC_NONE ; BOOT RECOVERY METHOD TO USE: BT_REC_[NONE|FORCE|SBCB0|SBC1B|SBCRI|DUORI] +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +STRICTPART .SET TRUE ; ENFORCE STRICT PARTITION TABLE VALIDATION +; +CPUSPDCAP .SET SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO +CPUSPDDEF .SET SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW +CPUOSC .SET 9216000 ; CPU OSC FREQ IN MHZ +INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) +; +RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) +ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) +ROMFONTS .SET FALSE ; LOAD FONTS FROM ROM +APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) +MEMMGR .SET MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512] +RAMBIAS .SET 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE +; +Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS +Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 +Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3) +Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) +Z180_TIMER .SET TRUE ; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER +; +N8_PPI0 .SET $84 ; N8: FIRST PARALLEL PORT REGISTERS BASE ADR +N8_ACR .SET $94 ; N8: AUXILLARY CONTROL REGISTER (ACR) ADR +N8_RMAP .SET $96 ; N8: ROM PAGE REGISTER ADR +N8_DEFACR .SET $1B ; N8: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE) +; +RTCIO .SET $88 ; RTC LATCH REGISTER ADR +; +KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT +KIOBASE .SET $80 ; KIO BASE I/O ADDRESS +; +CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT +CTCBASE .SET $B0 ; CTC BASE I/O ADDRESS +CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER +; +PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER +; +EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION +; +SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES +; +WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] +; +FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS +FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS +FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED +FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS +FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES +FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES +FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED +; +DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING +; +LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED) +LEDMODE .SET LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] +LEDPORT .SET N8_ACR ; STATUS LED PORT ADDRESS +LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED +; +DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY +DSKYDSKACT .SET TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY +ICMENABLE .SET FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218) +ICMPPIBASE .SET N8_PPI0 ; BASE I/O ADDRESS OF ICM PPI +PKDENABLE .SET FALSE ; ENABLES DSKY NG PKD DRIVER (8259) +PKDPPIBASE .SET N8_PPI0 ; BASE I/O ADDRESS OF PKD PPI +PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) +H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY +LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER +GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD +; +BOOTCON .SET 0 ; BOOT CONSOLE DEVICE +SECCON .SET $FF ; SECONDARY CONSOLE DEVICE +CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +VDAEMU .SET EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI] +VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD +ANSITRACE .SET 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PPKTRACE .SET 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +KBDTRACE .SET 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PPKKBLOUT .SET KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE] +KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] +MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] +KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS +; +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] +DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) +; +DS1501RTCENABLE .SET FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .SET $50 ; DS1501RTC: I/O BASE ADDRESS +; +BQRTCENABLE .SET FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) +BQRTC_BASE .SET $50 ; BQRTC: I/O BASE ADDRESS +; +INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) +; +RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) +; +HTIMENABLE .SET FALSE ; ENABLE SIMH TIMER SUPPORT +SIMRTCENABLE .SET FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) +; +DS7RTCENABLE .SET FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM) +DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] +; +DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) +; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; +DS12RTCENABLE .SET FALSE ; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM) +; +M6242RTCENABLE .SET TRUE ; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM) +M6242RTC_BASE .SET $A0 ; M6242RTC: I/O BASE ADDRESS +; +SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) +SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG +SSERSTATUS .SET $FF ; SSER: STATUS PORT +SSERDATA .SET $FF ; SSER: DATA PORT +SSERIRDY .SET %00000001 ; SSER: INPUT READY BIT MASK +SSERIINV .SET FALSE ; SSER: INPUT READY BIT INVERTED +SSERORDY .SET %00000010 ; SSER: OUTPUT READY BIT MASK +SSEROINV .SET FALSE ; SSER: OUTPUT READY BIT INVERTED +; +PLDSERENABLE .SET FALSE ; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM) +PLDSERCFG .SET SER_9600_8N1 ; PLDSER: SERIAL LINE CONFIG +; +TSERENABLE .SET FALSE ; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM) +TSERCFG .SET SER_9600_8N1 ; TSER: SERIAL LINE CONFIG +; +DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) +; +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +UARTCNT .SET 5 ; UART: NUMBER OF CHIPS TO DETECT (1-8) +UARTOSC .SET 1843200 ; UART: OSC FREQUENCY IN MHZ +UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 +UART4UART .SET TRUE ; UART: SUPPORT 4UART ECB BOARD +UART4UARTBASE .SET $C0 ; UART: BASE IO ADDRESS OF 4UART ECB BOARD +UART0BASE .SET $80 ; UART 0: REGISTERS BASE ADR +UART0CFG .SET DEFSERCFG ; UART 0: SERIAL LINE CONFIG +UART1BASE .SET $C0 ; UART 1: REGISTERS BASE ADR +UART1CFG .SET DEFSERCFG ; UART 1: SERIAL LINE CONFIG +UART2BASE .SET $C8 ; UART 2: REGISTERS BASE ADR +UART2CFG .SET DEFSERCFG ; UART 2: SERIAL LINE CONFIG +UART3BASE .SET $D0 ; UART 3: REGISTERS BASE ADR +UART3CFG .SET DEFSERCFG ; UART 3: SERIAL LINE CONFIG +UART4BASE .SET $D8 ; UART 4: REGISTERS BASE ADR +UART4CFG .SET DEFSERCFG ; UART 4: SERIAL LINE CONFIG +UART5BASE .SET $FF ; UART 5: REGISTERS BASE ADR +UART5CFG .SET DEFSERCFG ; UART 5: SERIAL LINE CONFIG +UART6BASE .SET $FF ; UART 6: REGISTERS BASE ADR +UART6CFG .SET DEFSERCFG ; UART 6: SERIAL LINE CONFIG +UART7BASE .SET $FF ; UART 7: REGISTERS BASE ADR +UART7CFG .SET DEFSERCFG ; UART 7: SERIAL LINE CONFIG +; +ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) +ASCIINTS .SET TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 +ASCISWAP .SET FALSE ; ASCI: SWAP CHANNELS +ASCIBOOT .SET 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED) +ASCI0CFG .SET DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG +ASCI1CFG .SET DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG +; +Z2UENABLE .SET FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) +; +ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) +; +SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT +SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) +SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP +SIOINTS .SET TRUE ; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3 +SIO0MODE .SET SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] +SIO0BASE .SET $B0 ; SIO 0: REGISTERS BASE ADR +SIO0ACLK .SET (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0ACFG .SET DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG +SIO0ACTCC .SET -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SIO0BCLK .SET (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0BCFG .SET DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG +SIO0BCTCC .SET -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +; +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) +; +XIOCFG .SET DEFSERCFG ; XIO: SERIAL LINE CONFIG +; +VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) +VDUSIZ .SET V80X25 ; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30] +CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) +CVDUMODE .SET CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] +CVDUMON .SET CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] +GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) +TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) +TMSMODE .SET TMSMODE_N8PC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] +TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 +TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) +VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) +VGASIZ .SET V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] +VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) +SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) +EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) +; +MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) +MDROM .SET TRUE ; MD: ENABLE ROM DISK +MDRAM .SET TRUE ; MD: ENABLE RAM DISK +MDTRACE .SET 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM +; +FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDMODE .SET FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] +FDCNT .SET 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2) +FDTRACE .SET 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) +FDMAUTO .SET TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS +FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +; +RFENABLE .SET FALSE ; RF: ENABLE RAM FLOPPY DRIVER +RFCNT .SET 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4) +; +IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) +IDETRACE .SET 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +IDECNT .SET 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .SET IDEMODE_DIO ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE0BASE .SET $20 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .SET $20 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .SET $28 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .SET FALSE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .SET FALSE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .SET IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE1BASE .SET $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .SET $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .SET $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .SET TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .SET TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .SET IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE2BASE .SET $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .SET $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .SET $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .SET TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .SET TRUE ; IDE 2B (MASTER): 8 BIT XFER +; +PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) +PPIDETRACE .SET 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PPIDECNT .SET 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP +PPIDE0MODE .SET PPIDEMODE_STD ; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B] +PPIDE0BASE .SET N8_PPI0 ; PPIDE 0: PPI REGISTERS BASE ADR +PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER +PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER +PPIDE1MODE .SET PPIDEMODE_STD ; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B] +PPIDE1BASE .SET $00 ; PPIDE 1: PPI REGISTERS BASE ADR +PPIDE1A8BIT .SET FALSE ; PPIDE 1A (MASTER): 8 BIT XFER +PPIDE1B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER +PPIDE2MODE .SET PPIDEMODE_STD ; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B] +PPIDE2BASE .SET $00 ; PPIDE 2: PPI REGISTERS BASE ADR +PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER +PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER +; +SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] +SDPPIBASE .SET N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE +SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 +; +CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT +; +PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +PRPSDENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT +PRPSDTRACE .SET 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PRPCONENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT +; +PPPENABLE .SET FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) +PPPBASE .SET N8_PPI0 ; PPP: PPI REGISTERS BASE ADDRESS +PPPSDENABLE .SET TRUE ; PPP: ENABLE PPP DRIVER SD CARD SUPPORT +PPPSDTRACE .SET 1 ; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PPPCONENABLE .SET TRUE ; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT +; +ESPENABLE .SET FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM) +; +HDSKENABLE .SET FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) +; +PIOENABLE .SET FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM) +PIOCNT .SET 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP +PIO0BASE .SET $B8 ; PIO 0: REGISTERS BASE ADR +PIO1BASE .SET $BC ; PIO 1: REGISTERS BASE ADR +; +LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) +; +PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) +; +IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) +; +SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) +; +ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM) +; +PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD +PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD +PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) +PIOZBASE .SET $88 ; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD +PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP +PIOSBASE .SET N8_PPI0 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI +; +UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) +UFBASE .SET $0C ; UF: REGISTERS BASE ADR +; +SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] +AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER +SN7CLK .SET 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD +SNMODE .SET SNMODE_VGM ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO] +; +AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER +AY_CLK .SET 3579545 ; AY: PSG CLOCK FREQ, ASSUME MSX STD +AYMODE .SET AYMODE_N8 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] +AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT +; +SPKENABLE .SET FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) +; +DMAENABLE .SET FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM) +DMABASE .SET $E0 ; DMA: DMA BASE ADDRESS +DMAMODE .SET DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO) +; +YM2612ENABLE .SET FALSE ; YM2612: ENABLE YM2612 DRIVER +VGMBASE .SET $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC) diff --git a/Source/HBIOS/cfg_NABU.asm b/Source/HBIOS/cfg_NABU.asm index 5e982f5b..3976ad5d 100644 --- a/Source/HBIOS/cfg_NABU.asm +++ b/Source/HBIOS/cfg_NABU.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_NABU ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_NABU ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -265,7 +265,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_NABU ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_NABU ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET TRUE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_RCEZ80.asm b/Source/HBIOS/cfg_RCEZ80.asm index 0f1b3d5e..7cf132af 100644 --- a/Source/HBIOS/cfg_RCEZ80.asm +++ b/Source/HBIOS/cfg_RCEZ80.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_RCEZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_RCEZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_EZ80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -263,7 +263,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_RCZ180.asm b/Source/HBIOS/cfg_RCZ180.asm index 49d9c257..201014d5 100644 --- a/Source/HBIOS/cfg_RCZ180.asm +++ b/Source/HBIOS/cfg_RCZ180.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -260,7 +260,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_RCZ280.asm b/Source/HBIOS/cfg_RCZ280.asm index 2e57b6de..7ba91648 100644 --- a/Source/HBIOS/cfg_RCZ280.asm +++ b/Source/HBIOS/cfg_RCZ280.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z280 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -270,7 +270,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_RCZ80.asm b/Source/HBIOS/cfg_RCZ80.asm index d69941c4..cf551e41 100644 --- a/Source/HBIOS/cfg_RCZ80.asm +++ b/Source/HBIOS/cfg_RCZ80.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -268,7 +268,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_RPH.asm b/Source/HBIOS/cfg_RPH.asm index eb0a352d..6b0280c1 100644 --- a/Source/HBIOS/cfg_RPH.asm +++ b/Source/HBIOS/cfg_RPH.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_RPH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_RPH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -238,7 +238,7 @@ GDCENABLE .SET TRUE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) GDCMODE .SET GDCMODE_RPH ; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH] GDCMON .SET GDCMON_EGA ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA] TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_SBC.asm b/Source/HBIOS/cfg_SBC.asm index d0715d67..d117d785 100644 --- a/Source/HBIOS/cfg_SBC.asm +++ b/Source/HBIOS/cfg_SBC.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -238,7 +238,7 @@ CVDUMODE .SET CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .SET CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_SCZ180.asm b/Source/HBIOS/cfg_SCZ180.asm index ec80f52f..7d2eddc0 100644 --- a/Source/HBIOS/cfg_SCZ180.asm +++ b/Source/HBIOS/cfg_SCZ180.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_SCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_SCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -260,7 +260,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_SZ180.asm b/Source/HBIOS/cfg_SZ180.asm index 9cbf1549..dfe1f5eb 100644 --- a/Source/HBIOS/cfg_SZ180.asm +++ b/Source/HBIOS/cfg_SZ180.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_SZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_SZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -250,7 +250,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_SZ80.asm b/Source/HBIOS/cfg_SZ80.asm index a752f904..1ea71320 100644 --- a/Source/HBIOS/cfg_SZ80.asm +++ b/Source/HBIOS/cfg_SZ80.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_SZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_SZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -240,7 +240,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_UNA.asm b/Source/HBIOS/cfg_UNA.asm index e652ea05..4c3ff790 100644 --- a/Source/HBIOS/cfg_UNA.asm +++ b/Source/HBIOS/cfg_UNA.asm @@ -15,7 +15,7 @@ ; #INCLUDE "../UBIOS/ubios.inc" ; -;PLATFORM .EQU PLT_UNA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +;PLATFORM .EQU PLT_UNA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] BIOS .EQU BIOS_UNA ; HARDWARE BIOS: BIOS_[WBW|UNA] ; diff --git a/Source/HBIOS/cfg_Z80RETRO.asm b/Source/HBIOS/cfg_Z80RETRO.asm index d1d80274..d01905ba 100644 --- a/Source/HBIOS/cfg_Z80RETRO.asm +++ b/Source/HBIOS/cfg_Z80RETRO.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_Z80RETRO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_Z80RETRO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -240,7 +240,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_ZETA.asm b/Source/HBIOS/cfg_ZETA.asm index 85f98aae..8b239077 100644 --- a/Source/HBIOS/cfg_ZETA.asm +++ b/Source/HBIOS/cfg_ZETA.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_ZETA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_ZETA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -209,7 +209,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/cfg_ZETA2.asm b/Source/HBIOS/cfg_ZETA2.asm index bad7c3cc..7ec8374e 100644 --- a/Source/HBIOS/cfg_ZETA2.asm +++ b/Source/HBIOS/cfg_ZETA2.asm @@ -49,7 +49,7 @@ ; #INCLUDE "cfg_MASTER.asm" ; -PLATFORM .SET PLT_ZETA2 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80] +PLATFORM .SET PLT_ZETA2 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC] CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80] NMOSCPU .SET FALSE ; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND) BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] @@ -220,7 +220,7 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) diff --git a/Source/HBIOS/ch376-native/readme.md b/Source/HBIOS/ch376-native/readme.md index f92ffd8c..c78e5bb7 100644 --- a/Source/HBIOS/ch376-native/readme.md +++ b/Source/HBIOS/ch376-native/readme.md @@ -102,7 +102,7 @@ Example configuration, combined with the TMS VDP module driver. ``` TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSXUKY ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] +TMSMODE .SET TMSMODE_MSXUKY ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET TRUE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) ``` diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 2dc64919..c2656a53 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -2069,9 +2069,11 @@ SZ180MON_SKIP: LD A,(RTCDEFVAL) LD (HB_RTCVAL),A +#IF (PLATFORM!=PLT_N8PC) EZ80_IO() OUT (RTCIO),A ; SET IT DIAG(1) ; REAPPLY CURRENT DIAG LED SETUP +#ENDIF ; ;-------------------------------------------------------------------------------------------------- ; DYNAMIC RAM SIZER (IN DEVELOPMENT) @@ -4293,6 +4295,9 @@ HB_INITTBL: ; INITALISE ONE OF THE SUPPORTED SYSTEM TIMER TICKS DRIVERS .DW EZ80_TMR_INIT #ENDIF +#IF (M6242RTCENABLE) + .DW M6242RTC_INIT +#ENDIF #IF (VDUENABLE) .DW VDU_INIT #ENDIF @@ -8948,6 +8953,15 @@ SIZ_INTRTC .EQU $ - ORG_INTRTC MEMECHO " bytes.\n" #ENDIF ; +#IF (M6242RTCENABLE) +ORG_M6242RTC .EQU $ + #INCLUDE "m6242.asm" +SIZ_M6242RTC .EQU $ - ORG_M6242RTC + .ECHO "M6242 occupies " + .ECHO SIZ_M6242RTC + .ECHO " bytes.\n" +#ENDIF +; #IF (SSERENABLE) ORG_SSER .EQU $ #INCLUDE "sser.asm" diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc index dbb8c059..6af11622 100644 --- a/Source/HBIOS/hbios.inc +++ b/Source/HBIOS/hbios.inc @@ -210,6 +210,7 @@ PLT_NABU .EQU 22 ; NABU PC W/ ROMWBW OPTION BOARD PLT_SZ80 .EQU 23 ; S100 COMPUTERS Z80 SYSTEM PLT_RCEZ80 .EQU 24 ; RCBUS W/ eZ80 PLT_MSX .EQU 25 ; MSX COMPUTER +PLT_N8PC .EQU 26 ; N8PC (HOME COMPUTER, ATX FORMAT) Z180 SBC ; ; HBIOS GLOBAL ERROR RETURN VALUES ; @@ -440,6 +441,7 @@ RTCDEV_EZ80 .EQU $07 ; EZ80 ON-CHIP RTC RTCDEV_PC .EQU $08 ; PC style parallel RTC RTCDEV_MM .EQU $09 ; NS MM58167B RTC (NO NVRAM) RTCDEV_DS12 .EQU $0A ; DS1288X +RTCDEV_M6242 .EQU $0B ; DS1288X ; ; DSKY DEVICE IDS ; diff --git a/Source/HBIOS/m6242.asm b/Source/HBIOS/m6242.asm new file mode 100644 index 00000000..8e416d6b --- /dev/null +++ b/Source/HBIOS/m6242.asm @@ -0,0 +1,326 @@ +; +;================================================================================================== +; M6242 CLOCK DRIVER +;================================================================================================== +; +M6242RTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS) +; +; RTC DEVICE INITIALIZATION ENTRY +; + +; TODO: +; set the day of week register + +;; NOTES FOR USING DRIVER IN Z-DOS +; First load the LDDS datestamper +; A:LDDS +; next prepare and drives with datestamper info: +; eg: a:putds -d=g: -V +; then view date time of files with: +; a:filedate + + +REG_1SEC .EQU $00 +REG_10SEC .EQU $01 +REG_1MIN .EQU $02 +REG_10MIN .EQU $03 +REG_1HR .EQU $04 +REG_10HR .EQU $05 +REG_1DAY .EQU $06 +REG_10DAY .EQU $07 +REG_1MNTH .EQU $08 +REG_10MNTH .EQU $09 +REG_1YEAR .EQU $0A +REG_10YEAR .EQU $0B +REG_DAYWEEK .EQU $0C ; NOT USED BY THIS DRIVER +REG_CONTROL1 .EQU $0D +REG_CONTROL2 .EQU $0E +REG_CONTROL3 .EQU $0F + + .ECHO "M6242: IO=" + .ECHO M6242RTC_BASE + .ECHO "\n" + +M6242RTC_INIT: + LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? + OR A ; SET FLAGS + RET NZ ; IF ALREADY ACTIVE, ABORT + + CALL NEWLINE ; FORMATTING + PRTS("M6242 RTC: $") + + ; PRINT RTC LATCH PORT ADDRESS + PRTS("IO=0x$") ; LABEL FOR IO ADDRESS + LD A,M6242RTC_BASE ; GET IO ADDRESS + CALL PRTHEXBYTE ; PRINT IT + CALL PC_SPACE ; FORMATTING + + ; CHECK PRESENCE STATUS + CALL M6242RTC_DETECT ; HARDWARE DETECTION + JR Z, M6242RTC_INIT1 ; IF ZERO, ALL GOOD + PRTS("NOT PRESENT$") ; NOT ZERO, H/W NOT PRESENT + OR $FF ; SIGNAL FAILURE + RET ; BAIL OUT + +M6242RTC_INIT1: +; ENSURE DEVICE IS RESET AND NOT IN TEST MODE + LD A, 05h ; TURN OFF ALL TEST MODE BITS, SET 24 HOUR + OUT (REG_CONTROL3 + M6242RTC_BASE), A + LD A, 05h ; TURN OFF ALL TEST MODE BITS, SET 24 HOUR + OUT (REG_CONTROL3 + M6242RTC_BASE), A + LD A, 04h ; TURN OFF ALL TEST MODE BITS, SET 24 HOUR + OUT (REG_CONTROL3 + M6242RTC_BASE), A + + LD A, 00h ; LET CLOCK RUN + OUT (REG_CONTROL1 + M6242RTC_BASE), A + OUT (REG_CONTROL2 + M6242RTC_BASE), A + + ; DISPLAY CURRENT TIME + LD HL, M6242RTC_BCDBUF ; POINT TO BCD BUF + CALL M6242RTC_GETTIM + CALL PRTDT +; + LD BC, M6242RTC_DISPATCH + CALL RTC_SETDISP +; + XOR A ; SIGNAL SUCCESS + RET +; +; DETECT RTC HARDWARE PRESENCE +; +M6242RTC_DETECT: + LD A, 01h ; TURN ON REST BIT + OUT (REG_CONTROL3 + M6242RTC_BASE), A + CALL DLY64 + CALL DLY64 + IN A,(REG_CONTROL3 + M6242RTC_BASE) + AND 01h + CP 01h + JR NZ, M6242RTC_DETECTERR ; IF NOT MATCH, ERROR + LD A, 00h ; TURN OFF REST BIT + OUT (REG_CONTROL3 + M6242RTC_BASE), A + CALL DLY64 + CALL DLY64 + IN A,(REG_CONTROL3 + M6242RTC_BASE) + AND 01h + CP 00h + JR NZ, M6242RTC_DETECTERR ; IF NOT MATCH, ERROR + LD A, 0 ; ASSUME OK + OR A ; SET FLAGS + RET + +M6242RTC_DETECTERR: + LD A, $FF ; ELSE STATUS IS ERROR + OR A ; SET FLAGS + RET + +; +; RTC DEVICE FUNCTION DISPATCH ENTRY +; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR +; B: FUNCTION (IN) +; +M6242RTC_DISPATCH: + LD A,B ; GET REQUESTED FUNCTION + AND $0F ; ISOLATE SUB-FUNCTION + JP Z,M6242RTC_GETTIM ; GET TIME + DEC A + JP Z,M6242RTC_SETTIM ; SET TIME + DEC A + JP Z,M6242RTC_GETBYT ; GET NVRAM BYTE VALUE + DEC A + JP Z,M6242RTC_SETBYT ; SET NVRAM BYTE VALUE + DEC A + JP Z,M6242RTC_GETBLK ; GET NVRAM DATA BLOCK VALUES + DEC A + JP Z,M6242RTC_SETBLK ; SET NVRAM DATA BLOCK VALUES + DEC A + JP Z,M6242RTC_GETALM ; GET ALARM + DEC A + JP Z,M6242RTC_SETALM ; SET ALARM + DEC A + JP Z,M6242RTC_DEVICE ; REPORT RTC DEVICE INFO + SYSCHKERR(ERR_NOFUNC) + RET +; +; RTC GET NVRAM BYTE +; C: INDEX +; E: VALUE (OUTPUT) +; A:0 IF OK, ERR_RANGE IF OUT OF RANGE +; +M6242RTC_GETBYT: +M6242RTC_SETBYT: +M6242RTC_GETBLK: +M6242RTC_SETBLK: +M6242RTC_GETALM: +M6242RTC_SETALM: + SYSCHKERR(ERR_NOTIMPL) + RET +; +; RTC GET TIME +; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR +; HL: DATE/TIME BUFFER (OUT) +; BUFFER FORMAT IS BCD: YYMMDDHHMMSS +; 24 HOUR TIME FORMAT IS ASSUMED +; +M6242RTC_GETTIM: + PUSH HL + PUSH BC + IN A,(REG_10YEAR + M6242RTC_BASE) + RLA + RLA + RLA + RLA + LD C,A + IN A,(REG_1YEAR + M6242RTC_BASE) + AND 0FH + OR C + LD (HL),A + INC HL + + IN A,(REG_10MNTH + M6242RTC_BASE) + RLA + RLA + RLA + RLA + LD C,A + IN A,(REG_1MNTH + M6242RTC_BASE) + AND 0FH + OR C + LD (HL),A + INC HL + + IN A,(REG_10DAY + M6242RTC_BASE) + RLA + RLA + RLA + RLA + LD C,A + IN A,(REG_1DAY + M6242RTC_BASE) + AND 0FH + OR C + LD (HL),A + INC HL + + IN A,(REG_10HR + M6242RTC_BASE) + RLA + RLA + RLA + RLA + LD C,A + IN A,(REG_1HR + M6242RTC_BASE) + AND 0FH + OR C + LD (HL),A + INC HL + + IN A,(REG_10MIN + M6242RTC_BASE) + RLA + RLA + RLA + RLA + LD C,A + IN A,(REG_1MIN + M6242RTC_BASE) + AND 0FH + OR C + LD (HL),A + INC HL + + IN A,(REG_10SEC + M6242RTC_BASE) + RLA + RLA + RLA + RLA + LD C,A + IN A,(REG_1SEC + M6242RTC_BASE) + AND 0FH + OR C + LD (HL),A + INC HL + + POP BC + POP HL + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN +; +; +; RTC SET TIME +; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR +; HL: DATE/TIME BUFFER (IN) +; BUFFER FORMAT IS BCD: YYMMDDHHMMSSWW +; 24 HOUR TIME FORMAT IS ASSUMED +; +M6242RTC_SETTIM: + PUSH HL + LD A, (HL) + OUT (REG_1YEAR + M6242RTC_BASE), A + RRA + RRA + RRA + RRA + OUT (REG_10YEAR + M6242RTC_BASE), A + + INC HL + LD A, (HL) + OUT (REG_1MNTH + M6242RTC_BASE), A + RRA + RRA + RRA + RRA + OUT (REG_10MNTH + M6242RTC_BASE), A + + INC HL + LD A, (HL) + OUT (REG_1DAY+ M6242RTC_BASE), A + RRA + RRA + RRA + RRA + OUT (REG_10DAY + M6242RTC_BASE), A + + INC HL + LD A, (HL) + OUT (REG_1HR + M6242RTC_BASE), A + RRA + RRA + RRA + RRA + OUT (REG_10HR + M6242RTC_BASE), A + + INC HL + LD A, (HL) + OUT (REG_1MIN + M6242RTC_BASE), A + RRA + RRA + RRA + RRA + OUT (REG_10MIN + M6242RTC_BASE), A + + INC HL + LD A, (HL) + OUT (REG_1SEC + M6242RTC_BASE), A + RRA + RRA + RRA + RRA + OUT (REG_10SEC + M6242RTC_BASE), A + POP HL + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN +; +; REPORT RTC DEVICE INFO +; +M6242RTC_DEVICE: + LD D,RTCDEV_M6242 ; D := DEVICE TYPE + LD E,0 ; E := PHYSICAL DEVICE NUMBER + LD H,0 ; H := 0, DRIVER HAS NO MODES + LD L,0 ; L := 0, NO I/O ADDRESS + XOR A ; SIGNAL SUCCESS + RET + +M6242RTC_BCDBUF: +RP5RTC_YR .DB 20 +RP5RTC_MO .DB 01 +RP5RTC_DT .DB 01 +RP5RTC_HH .DB 00 +RP5RTC_MM .DB 00 +RP5RTC_SS .DB 00 \ No newline at end of file diff --git a/Source/HBIOS/plt_pretty.inc b/Source/HBIOS/plt_pretty.inc index d0514df2..f23abaaa 100644 --- a/Source/HBIOS/plt_pretty.inc +++ b/Source/HBIOS/plt_pretty.inc @@ -40,6 +40,7 @@ ; NABU ; S100 Z80 ; RCBUS eZ80 +; N8PC ZS180 ; STR_PLT_PRETTY: ; @@ -63,7 +64,7 @@ STR_PLT_PRETTY: .DB " / / | _| | | / _ \\ / / / / / _ \\ | () |\\ ",10,13 .DB "/___| |___| |_| /_/ \\_\\ /___| /___| \\___/ \\__/",10,13 #ENDIF -#IF (PLATFORM == PLT_N8) +#IF ((PLATFORM == PLT_N8) (PLATFORM == PLT_N8PC)) .DB " _ _ ___ ____ ___ _ ___ __",10,13 .DB "| \\| | ( _ ) |_ / / __| / | ( _ ) / \\ ",10,13 .DB "| .` | / _ \\ / / \\__ \\ | | / _ \\ | () |",10,13 diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index 67dd2577..11601cf7 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -27,6 +27,7 @@ ; 23. SZ80 S100 Computers Z80-based System ; 24. RCEZ80 RCBus eZ80 ; 25. MSX MSX Computers +; 26. N8PC MSX-ish Z180 ATX SBC w/ onboard video and sound ; ; ; INCLUDE BUILD VERSION @@ -295,6 +296,7 @@ TMSMODE_COLECO .EQU 7 ; COLECOVISION PORT MAPPING TMSMODE_DUO .EQU 8 ; DUODYNE PORT MAPPING TMSMODE_NABU .EQU 9 ; NABU TMSMODE_MSXUKY .EQU 10 ; STD MSX PORTS + USB KEYBOARD +TMSMODE_N8PC .EQU 11 ; N8 BUILT-IN VIDEO + PS2 KEYBOARD ; ; CVDU VIDEO MODE SELECTIONS ; diff --git a/Source/HBIOS/tms.asm b/Source/HBIOS/tms.asm index fdfee03e..c3e8bcec 100644 --- a/Source/HBIOS/tms.asm +++ b/Source/HBIOS/tms.asm @@ -6,6 +6,8 @@ ; UPDATED BY: DEAN NETHERTON -- 5/26/2021 - V9958 SUPPORT ; UPDATED BY: JOSE L. COLLADO -- 11/15/2023 - MEMORY MAP CHANGES ; UPDATED BY: DAN WERNER -- 2/11/2024 - DUODYNE SUPPORT +; UPDATED BY: DAN WERNER -- 11/271/2025 - N8PC SUPPORT + ;====================================================================== ; ; TODO: @@ -72,6 +74,16 @@ TMSKBD .SET TMSKBD_PPK ; PPK KEYBOARD DEVECHO "N8" #ENDIF ; +#IF (TMSMODE == TMSMODE_N8PC) +TMS_DATREG .EQU $98 ; READ/WRITE DATA +TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL +TMS_KBDDATA .EQU $80 ; KBD CTLR DATA PORT +TMS_KBDST .EQU $81 ; KBD CTLR STATUS/CMD PORT +TMSKBD .SET TMSKBD_KBD ; PS2 KEYBOARD + DEVECHO "N8PC" +#ENDIF +; + #IF (TMSMODE == TMSMODE_MSX) TMS_DATREG .EQU $98 ; READ/WRITE DATA TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL diff --git a/Source/HBIOS/xio.asm b/Source/HBIOS/xio.asm index b1c15c3e..11e96aac 100644 --- a/Source/HBIOS/xio.asm +++ b/Source/HBIOS/xio.asm @@ -28,7 +28,7 @@ SIO_DLM .EQU UARTIOB + 1 ; DLAB=1: DIVISOR LATCH (MS) ; #ENDIF -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_N8PC) | (PLATFORM == PLT_MK4)) #ENDIF XIO_INIT: ; MINIMAL UART INIT @@ -37,7 +37,7 @@ XIO_INIT: ; MINIMAL UART INIT ; SHOULD UNA SERIAL I/O BE RESET HERE??? #ENDIF -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_N8PC) | (PLATFORM == PLT_MK4)) ; INIT ASCI0 WITH BASIC VALUES AND FAILSAFE DIVISOR LD A,$66 ; IGNORE CTS/DCD, NO BREAK DETECT @@ -92,7 +92,7 @@ XIO_SYNC: ; WAIT FOR FOR PENDING DATA IN FIFO TO CLEAR ; NOT SURE ANYTHING IS POSSIBLE HERE... #ENDIF -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_N8PC) | (PLATFORM == PLT_MK4)) ; IMPLEMENT THIS... OR MAYBE NOT. #ENDIF @@ -139,7 +139,7 @@ XIO_OUTC: ; OUTPUT BYTE IN A RET ; DONE #ENDIF -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_N8PC) | (PLATFORM == PLT_MK4)) PUSH AF ; SAVE INCOMING BYTE XIO_OUTC1: IN0 A,(Z180_STAT0) ; GET LINE STATUS @@ -174,7 +174,7 @@ XIO_INC: ; INPUT BYTE TO A RET ; DONE #ENDIF -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_N8PC) | (PLATFORM == PLT_MK4)) XIO_INC1: IN0 A,(Z180_STAT0) ; READ LINE STATUS AND $80 ; ISOLATE RDRF @@ -206,7 +206,7 @@ XIO_IST: ; INPUT STATUS TO A (NUM CHARS WAITING) RET ; DONE #ENDIF -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_N8PC) | (PLATFORM == PLT_MK4)) IN0 A,(Z180_STAT0) ; READ LINE STATUS AND $80 ; ISOLATE RDRF RET Z ; NO CHARS WAITING, A=0, Z SET @@ -262,7 +262,7 @@ XIO_COMPDIV: ; ; ; -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_N8PC) | (PLATFORM == PLT_MK4)) ; ; DERIVE A CNTLB VALUE BASED ON AN ENCODED BAUD RATE AND CURRENT CPU SPEED ; ENTRY: HL = ENCODED BAUD RATE diff --git a/Source/ReadMe.txt b/Source/ReadMe.txt index 2ddc1a76..e8f86b82 100644 --- a/Source/ReadMe.txt +++ b/Source/ReadMe.txt @@ -200,6 +200,7 @@ to determine the component of the configuration filename: GMZ180 Doug Jacksons' Genesis Z180 System NABU NABU w/ Les Bird's RomWBW Option Board FZ80 S100 Computers FPGA Z80 + N8PC MSX-ish Z180 ATX SBC w/ onboard video and sound Configuration files are found in the Source\HBIOS\Config directory. If you look in the this directory, you will see a @@ -341,7 +342,7 @@ the specific platform and configuration for your ROM. For platform, be sure to enter the platform identifier that corresponds to the ROM you are creating. The prompt will look something like this: - Platform [SBC|MBC|ZETA|ZETA2|RCZ80|EZZ80|UNA|N8|MK4|RCZ180|SCZ180|DYNO|RCZ280]: + Platform [SBC|MBC|ZETA|ZETA2|RCZ80|EZZ80|UNA|N8|MK4|RCZ180|SCZ180|DYNO|RCZ280|N8PC]: You will subsequently be prompted for the specific configuration that you want to build. It will display the available possibilities based