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Duodyne PS/2 Keyboard

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- Enable PS/2 keyboard input for Duodyne Media I/O board video terminal.
- Minor cleanup in TUNE to properly handle Duodyne ACR values.
This commit is contained in:
Wayne Warthen
2024-02-23 14:43:50 -08:00
parent d572a7ca32
commit 792e76b069
7 changed files with 99 additions and 54 deletions
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71
Source/Apps/Tune/tune.asm
View File

@@ -46,6 +46,7 @@
; 2021-08-17 [WBW] When playing via HBIOS, call BF_SNDRESET at end
; 2022-03-20 [DDW] Add support for MBC PSG module
; 2023-03-30 [WBW] Fix for quark delay adjustment being trashed
; 2024-02-23 [WBW] Include ACR value in config table
;_______________________________________________________________________________
;
; ToDo:
@@ -138,11 +139,10 @@ CFGSEL:
; Activate card if applicable
CALL SLOWIO ; Slow down I/O now
LD A,(ACR) ; Get ACR port address (if any)
LD C,A ; Copy to C for I/O later
INC A ; $FF -> $00 & set flags
JR Z,PROBE ; Skip ahead to probe if no ACR
DEC A ; Restore real ACR port address
LD C,A ; Put in C for I/O
LD A,$FF ; Value to activate card
JR Z,PROBE ; If no ACR, skip ahead
LD A,(ACRVAL) ; Value to activate card
OUT (C),A ; Write value to ACR
;
PROBE:
@@ -554,83 +554,83 @@ ERR2: ; without the string
;
; CONFIG TABLE, ENTRY ORDER MATCHES HBIOS PLATFORM ID
;
CFGSIZ .EQU 8
;
CFGTBL: ; PLT RSEL RDAT RIN Z180 ACR
CFGTBL: ; PLT RSEL RDAT RIN Z180 ACR ACRVAL
; DESC
.DB $01, $9A, $9B, $9A, $FF, $9C ; SBC W/ SCG
.DB $01, $9A, $9B, $9A, $FF, $9C, $FF ; SBC W/ SCG
.DW HWSTR_SCG
;
.DB $04, $9C, $9D, $9C, $40, $FF ; N8 W/ ONBOARD PSG
CFGSIZ .EQU $ - CFGTBL
;
.DB $04, $9C, $9D, $9C, $40, $FF, $FF ; N8 W/ ONBOARD PSG
.DW HWSTR_N8
;
.DB $05, $9A, $9B, $9A, $40, $9C ; MK4 W/ SCG
.DB $05, $9A, $9B, $9A, $40, $9C, $FF ; MK4 W/ SCG
.DW HWSTR_SCG
;
.DB $07, $D8, $D0, $D8, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB)
.DB $07, $D8, $D0, $D8, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DB $07, $A0, $A1, $A2, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB Rev 6)
.DB $07, $A0, $A1, $A2, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $07, $D1, $D0, $D0, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (MF)
.DB $07, $D1, $D0, $D0, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
.DB $07, $33, $32, $32, $FF, $FF ; RCZ80 W/ LINC SOUND MODULE
.DB $07, $33, $32, $32, $FF, $FF, $FF ; RCZ80 W/ LINC SOUND MODULE
.DW HWSTR_LINC
;
.DB $08, $68, $60, $68, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (EB)
.DB $08, $68, $60, $68, $C0, $FF, $FF ; RCZ180 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DB $08, $A0, $A1, $A2, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (EB Rev 6)
.DB $08, $A0, $A1, $A2, $C0, $FF, $FF ; RCZ180 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $08, $61, $60, $60, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (MF)
.DB $08, $61, $60, $60, $C0, $FF, $FF ; RCZ180 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
.DB $08, $33, $32, $32, $C0, $FF ; RCZ180 W/ LINC SOUND MODULE
.DB $08, $33, $32, $32, $C0, $FF, $FF ; RCZ180 W/ LINC SOUND MODULE
.DW HWSTR_LINC
;
.DB $09, $D8, $D0, $D8, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB)
.DB $09, $D8, $D0, $D8, $FF, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DB $09, $A0, $A1, $A2, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB Rev 6)
.DB $09, $A0, $A1, $A2, $FF, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $09, $D1, $D0, $D0, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (MF)
.DB $09, $D1, $D0, $D0, $FF, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
.DB $09, $33, $32, $32, $FF, $FF ; EZZ80 W/ LINC SOUND MODULE
.DB $09, $33, $32, $32, $FF, $FF, $FF ; EZZ80 W/ LINC SOUND MODULE
.DW HWSTR_LINC
;
.DB $0A, $68, $60, $68, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (EB)
.DB $0A, $68, $60, $68, $C0, $FF, $FF ; SCZ180 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DB $0A, $A0, $A1, $A2, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (EB Rev 6)
.DB $0A, $A0, $A1, $A2, $C0, $FF, $FF ; SCZ180 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $0A, $61, $60, $60, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (MF)
.DB $0A, $61, $60, $60, $C0, $FF, $FF ; SCZ180 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
.DB $0A, $33, $32, $32, $C0, $FF ; SCZ180 W/ LINC SOUND MODULE
.DB $0A, $33, $32, $32, $C0, $FF, $FF ; SCZ180 W/ LINC SOUND MODULE
.DW HWSTR_LINC
;
.DB $0B, $D8, $D0, $D8, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB)
.DB $0B, $D8, $D0, $D8, $FF, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DB $0B, $A0, $A1, $A2, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB Rev 6)
.DB $0B, $A0, $A1, $A2, $FF, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $0B, $D1, $D0, $D0, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (MF)
.DB $0B, $D1, $D0, $D0, $FF, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
.DB $0B, $33, $32, $32, $FF, $FF ; RCZ280 W/ LINC SOUND MODULE
.DB $0B, $33, $32, $32, $FF, $FF, $FF ; RCZ280 W/ LINC SOUND MODULE
.DW HWSTR_LINC
;
.DB 13, $A0, $A1, $A0, $FF, $A2 ; MBC
.DB 13, $A0, $A1, $A0, $FF, $A2, $FE ; MBC
.DW HWSTR_MBC
;
.DB 17, $A4, $A5, $A4, $FF, $FF ; DUODYNE
.DB 17, $A4, $A5, $A4, $FF, $A6, $FE ; DUODYNE
.DW HWSTR_DUO
;
.DB $FF ; END OF TABLE MARKER
@@ -642,7 +642,8 @@ RSEL .DB 0 ; Register selection port
RDAT .DB 0 ; Register data port
RIN .DB 0 ; Register input port
Z180 .DB 0 ; Z180 base I/O port
ACR .DB 0 ; Aux Ctrl Reg I/O port on SCG
ACR .DB 0 ; Aux Ctrl Reg I/O port (ACR)
ACRVAL .DB 0 ; ACR sound enable value
DESC .DW 0 ; Hardware description string adr
;
CURPLT .DB 0 ; Current platform id reported by HBIOS
@@ -660,8 +661,8 @@ TMP .DB 0 ; work around use of undocumented Z80
HBIOSMD .DB 0 ; NON-ZERO IF USING HBIOS SOUND DRIVER, ZERO OTHERWISE
OCTAVEADJ .DB 0 ; AMOUNT TO ADJUST OCTAVE UP OR DOWN
MSGBAN .DB "Tune Player for RomWBW v3.5a, 30-Mar-2023",0
MSGUSE .DB "Copyright (C) 2023, Wayne Warthen, GNU GPL v3",13,10
MSGBAN .DB "Tune Player for RomWBW v3.6, 23-Feb-2024",0
MSGUSE .DB "Copyright (C) 2024, Wayne Warthen, GNU GPL v3",13,10
.DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10
.DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10
.DB "Usage: TUNE <filename>.[PT2|PT3|MYM] [--hbios] [+tn|-tn]",0

5
Source/HBIOS/ay38910.asm
View File

@@ -35,7 +35,7 @@ AY_ACR .EQU $9C
AY_RSEL .EQU $9C
AY_RDAT .EQU $9D
AY_RIN .EQU AY_RSEL
AY_ACR .EQU N8_DEFACR
AY_ACR .EQU N8_ACR
.ECHO "N8"
#ENDIF
;
@@ -74,6 +74,7 @@ AY_RIN .EQU AY_RSEL
AY_ACR .EQU $A2
.ECHO "MBC"
#ENDIF
;
#IF (AYMODE == AYMODE_DUO)
AY_RSEL .EQU $A4
AY_RDAT .EQU $A5
@@ -169,6 +170,7 @@ AY38910_INIT:
#IF (AYMODE == AYMODE_MBC)
PRTS(" MODE=MBC$")
#ENDIF
;
#IF (AYMODE == AYMODE_DUO)
PRTS(" MODE=DUO$")
#ENDIF
@@ -185,6 +187,7 @@ AY38910_INIT:
LD A,$FF ; ACTIVATE DEVICE BIT 4 IS AY RESET CONTROL, BIT 3 IS ACTIVE LED
OUT (AY_ACR),A ; SET INIT AUX CONTROL REG
#ENDIF
;
#IF ((AYMODE == AYMODE_DUO))
LD A,$FE ;
OUT (AY_ACR),A ; SET INIT AUX CONTROL REG

4
Source/HBIOS/cfg_duo.asm
View File

@@ -25,7 +25,7 @@ TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
AUTOCON .EQU TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
AUTOCON .EQU FALSE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .EQU SPD_UNSUP ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -82,7 +82,7 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU TRUE ; ENABLES DSKY FUNCTIONALITY
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $88 ; BASE I/O ADDRESS OF ICM PPI

50
Source/HBIOS/hbios.asm
View File

@@ -65,6 +65,23 @@
; - [xio|mio].asm
; - unlzsa2s.asm
;
; AUXILIARY CONTROL REGISTER
; --------------------------
;
; SBC/MK4 N8 MBC VDP MBC PSG RPH DUO
; ------------ ------------ ------------ ------------ ------------ ------------
; D7 ~ROM_ENABLE ~ROM_ENABLE
; D6 TTL1_RTS TTL1_RTS
; D5 PSG_GPIO PSG_GPIO PSG_GPIO ~STATUS_LED PSG_GPIO
; D4 ~PSG_RES ~PSG_RES ~PSG_RES ROM_A19 ~PSG_RES
; D3 STATUS_LED STATUS_LED VDP_LED PSG_LED ROM_A18 PSG_LED
; D2 VDP_A14 VDP_A14 ROM_A17 VDP_LED
; D1 ~VDP_SYN ~VDP_SYN ROM_A16
; D0 ~VDP_RES ~VDP_RES VDP_RES ROM_A15 VDP_RES
;
; PORT SCG:0x9C 0x94 VDP:0x92 PSG:0xA2 0x80 MEDIA:0xA6
;
;
; INCLUDE GENERIC STUFF
;
#INCLUDE "std.asm"
@@ -2671,6 +2688,11 @@ HB_Z280BUS1:
CALL PRTDEC
CALL PRTSTRD
.TEXT "KB RAM$"
;
CALL PRTSTRD
.TEXT ", HEAP=0x$"
LD HL,BNKTOP - HB_END
CALL PRTHEXWORDHL
;
#IFDEF TESTING
;
@@ -5853,6 +5875,13 @@ HB_ADDENT:
; - DWORD: ADDRESS WHERE ALLOC WAS CALLED (VALUE ON TOP OF STACK AT CALL)
;
HB_ALLOC:
;
#IFDEF MEMDBG
CALL PRTSTRD
.TEXT "\r\n>>> ALLOC SIZE=0x$")
CALL PRTHEXWORDHL
#ENDIF
;
; SAVE ALLOC SIZE AND REFERENCE ADR FOR SUBSEQUENT HEADER CONSTRUCTION
LD (HB_TMPSZ),HL ; SAVE INCOMING SIZE REQUESTED
; USE EX (SP),HL INSTEAD????
@@ -5876,6 +5905,12 @@ HB_ALLOC:
; SAVE NEW HEAP TOP
LD DE,(CB_HEAPTOP) ; GET ORIGINAL HEAP TOP
LD (CB_HEAPTOP),HL ; SAVE NEW HEAP TOP
;
#IFDEF MEMDBG
CALL PRTSTRD
.TEXT " TOP=0x$")
CALL PRTHEXWORDHL
#ENDIF
;
; SET HEADER VALUES
EX DE,HL ; HEADER ADR TO HL
@@ -8001,14 +8036,21 @@ SLACK .EQU BNKTOP - $
.ECHO "HBIOS space remaining: "
.ECHO SLACK
.ECHO " bytes.\n"
;
; DIAGNOSE HBIOS BANK OVERFLOW
;
#IF (SLACK<0)
.ECHO "*** ERROR: HBIOS too big.\n"
.ECHO "*** ERROR: HBIOS too big!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
#IF (CCP_SIZ > SLACK)
.ECHO "*** ERROR: Insufficient space for CCP cache.\n"
; CHECK TO SEE IF WE HAVE ENOUGH HEAP TO CACHE THE CP/M CCP
; AND ONE DISK SECTOR. ALTHOUGH SOME OPERATING SYSTEMS OR APPS
; MAY NOT NEED THIS, THE MOST COMMON ONES DO. CREATING AN HBIOS
; WITHOUT SPACE FOR THIS WILL NOT BE USEFUL.
;
#IF ((CCP_SIZ + 512) > SLACK)
.ECHO "*** ERROR: Insufficient HEAP space!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;

19
Source/HBIOS/tms.asm
View File

@@ -121,9 +121,9 @@ TMS_PPIA .EQU 0 ; PPI PORT A
TMS_PPIB .EQU 0 ; PPI PORT B
TMS_PPIC .EQU 0 ; PPI PORT C
TMS_PPIX .EQU 0 ; PPI CONTROL PORT
TMS_KBDDATA .EQU $E2 ; KBD CTLR DATA PORT
TMS_KBDST .EQU $E3 ; KBD CTLR STATUS/CMD PORT
.ECHO "MBC"
TMS_KBDDATA .EQU $4C ; KBD CTLR DATA PORT
TMS_KBDST .EQU $4D ; KBD CTLR STATUS/CMD PORT
.ECHO "DUO"
#ENDIF
;
.ECHO ", IO="
@@ -158,8 +158,8 @@ TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER
PPKENABLE .SET TRUE ; INCLUDE PPK KEYBOARD SUPPORT
#ENDIF
;
#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC))
PPKENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
#ENDIF
;
; TMS_IODELAY IS USED TO ADD RECOVERY TIME TO TMS9918/V9958 ACCESSES
@@ -205,10 +205,9 @@ TMS_INIT:
#IF ((TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
LD A,$FE
OUT (TMS_ACR),A ; INIT AUX CONTROL REG
OUT (TMS_ACR),A ; CLEAR VDP RESET
#ENDIF
;
LD IY,TMS_IDAT ; POINTER TO INSTANCE DATA
;
#IF (TMSMODE == TMSMODE_SCG)
@@ -254,7 +253,7 @@ TMS_INIT1:
#IF (TMSMODE == TMSMODE_N8)
CALL PPK_INIT ; INITIALIZE PPI KEYBOARD DRIVER
#ENDIF
#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC))
#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
CALL KBD_INIT ; INITIALIZE 8242 KEYBOARD DRIVER
#ENDIF
#IF MKYENABLE
@@ -309,7 +308,7 @@ TMS_FNTBL:
.DW PPK_FLUSH
.DW PPK_READ
#ELSE
#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) )
#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
.DW KBD_STAT
.DW KBD_FLUSH
.DW KBD_READ

2
Source/ver.inc
View File

@@ -2,7 +2,7 @@
#DEFINE RMN 5
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.5.0-dev.15"
#DEFINE BIOSVER "3.5.0-dev.16"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib
View File

@@ -3,5 +3,5 @@ rmn equ 5
rup equ 0
rtp equ 0
biosver macro
db "3.5.0-dev.15"
db "3.5.0-dev.16"
endm