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https://github.com/wwarthen/RomWBW.git
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Duodyne PS/2 Keyboard
- Enable PS/2 keyboard input for Duodyne Media I/O board video terminal. - Minor cleanup in TUNE to properly handle Duodyne ACR values.
This commit is contained in:
Wayne Warthen
@@ -46,6 +46,7 @@
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; 2021-08-17 [WBW] When playing via HBIOS, call BF_SNDRESET at end
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; 2022-03-20 [DDW] Add support for MBC PSG module
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; 2023-03-30 [WBW] Fix for quark delay adjustment being trashed
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; 2024-02-23 [WBW] Include ACR value in config table
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;_______________________________________________________________________________
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;
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; ToDo:
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@@ -138,11 +139,10 @@ CFGSEL:
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; Activate card if applicable
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CALL SLOWIO ; Slow down I/O now
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LD A,(ACR) ; Get ACR port address (if any)
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LD C,A ; Copy to C for I/O later
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INC A ; $FF -> $00 & set flags
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JR Z,PROBE ; Skip ahead to probe if no ACR
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DEC A ; Restore real ACR port address
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LD C,A ; Put in C for I/O
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LD A,$FF ; Value to activate card
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JR Z,PROBE ; If no ACR, skip ahead
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LD A,(ACRVAL) ; Value to activate card
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OUT (C),A ; Write value to ACR
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;
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PROBE:
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@@ -554,83 +554,83 @@ ERR2: ; without the string
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;
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; CONFIG TABLE, ENTRY ORDER MATCHES HBIOS PLATFORM ID
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;
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CFGSIZ .EQU 8
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;
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CFGTBL: ; PLT RSEL RDAT RIN Z180 ACR
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CFGTBL: ; PLT RSEL RDAT RIN Z180 ACR ACRVAL
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; DESC
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.DB $01, $9A, $9B, $9A, $FF, $9C ; SBC W/ SCG
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.DB $01, $9A, $9B, $9A, $FF, $9C, $FF ; SBC W/ SCG
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.DW HWSTR_SCG
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;
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.DB $04, $9C, $9D, $9C, $40, $FF ; N8 W/ ONBOARD PSG
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CFGSIZ .EQU $ - CFGTBL
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;
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.DB $04, $9C, $9D, $9C, $40, $FF, $FF ; N8 W/ ONBOARD PSG
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.DW HWSTR_N8
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;
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.DB $05, $9A, $9B, $9A, $40, $9C ; MK4 W/ SCG
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.DB $05, $9A, $9B, $9A, $40, $9C, $FF ; MK4 W/ SCG
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.DW HWSTR_SCG
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;
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.DB $07, $D8, $D0, $D8, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB)
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.DB $07, $D8, $D0, $D8, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB)
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.DW HWSTR_RCEB
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;
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.DB $07, $A0, $A1, $A2, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB Rev 6)
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.DB $07, $A0, $A1, $A2, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB Rev 6)
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.DW HWSTR_RCEB6
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;
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.DB $07, $D1, $D0, $D0, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (MF)
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.DB $07, $D1, $D0, $D0, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (MF)
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.DW HWSTR_RCMF
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;
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.DB $07, $33, $32, $32, $FF, $FF ; RCZ80 W/ LINC SOUND MODULE
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.DB $07, $33, $32, $32, $FF, $FF, $FF ; RCZ80 W/ LINC SOUND MODULE
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.DW HWSTR_LINC
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;
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.DB $08, $68, $60, $68, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (EB)
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.DB $08, $68, $60, $68, $C0, $FF, $FF ; RCZ180 W/ RC SOUND MODULE (EB)
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.DW HWSTR_RCEB
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;
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.DB $08, $A0, $A1, $A2, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (EB Rev 6)
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.DB $08, $A0, $A1, $A2, $C0, $FF, $FF ; RCZ180 W/ RC SOUND MODULE (EB Rev 6)
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.DW HWSTR_RCEB6
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;
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.DB $08, $61, $60, $60, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (MF)
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.DB $08, $61, $60, $60, $C0, $FF, $FF ; RCZ180 W/ RC SOUND MODULE (MF)
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.DW HWSTR_RCMF
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;
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.DB $08, $33, $32, $32, $C0, $FF ; RCZ180 W/ LINC SOUND MODULE
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.DB $08, $33, $32, $32, $C0, $FF, $FF ; RCZ180 W/ LINC SOUND MODULE
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.DW HWSTR_LINC
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;
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.DB $09, $D8, $D0, $D8, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB)
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.DB $09, $D8, $D0, $D8, $FF, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB)
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.DW HWSTR_RCEB
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;
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.DB $09, $A0, $A1, $A2, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB Rev 6)
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.DB $09, $A0, $A1, $A2, $FF, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB Rev 6)
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.DW HWSTR_RCEB6
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;
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.DB $09, $D1, $D0, $D0, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (MF)
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.DB $09, $D1, $D0, $D0, $FF, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (MF)
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.DW HWSTR_RCMF
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;
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.DB $09, $33, $32, $32, $FF, $FF ; EZZ80 W/ LINC SOUND MODULE
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.DB $09, $33, $32, $32, $FF, $FF, $FF ; EZZ80 W/ LINC SOUND MODULE
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.DW HWSTR_LINC
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;
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.DB $0A, $68, $60, $68, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (EB)
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.DB $0A, $68, $60, $68, $C0, $FF, $FF ; SCZ180 W/ RC SOUND MODULE (EB)
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.DW HWSTR_RCEB
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;
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.DB $0A, $A0, $A1, $A2, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (EB Rev 6)
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.DB $0A, $A0, $A1, $A2, $C0, $FF, $FF ; SCZ180 W/ RC SOUND MODULE (EB Rev 6)
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.DW HWSTR_RCEB6
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;
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.DB $0A, $61, $60, $60, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (MF)
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.DB $0A, $61, $60, $60, $C0, $FF, $FF ; SCZ180 W/ RC SOUND MODULE (MF)
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.DW HWSTR_RCMF
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;
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.DB $0A, $33, $32, $32, $C0, $FF ; SCZ180 W/ LINC SOUND MODULE
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.DB $0A, $33, $32, $32, $C0, $FF, $FF ; SCZ180 W/ LINC SOUND MODULE
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.DW HWSTR_LINC
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;
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.DB $0B, $D8, $D0, $D8, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB)
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.DB $0B, $D8, $D0, $D8, $FF, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB)
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.DW HWSTR_RCEB
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;
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.DB $0B, $A0, $A1, $A2, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB Rev 6)
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.DB $0B, $A0, $A1, $A2, $FF, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (EB Rev 6)
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.DW HWSTR_RCEB6
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;
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.DB $0B, $D1, $D0, $D0, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (MF)
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.DB $0B, $D1, $D0, $D0, $FF, $FF, $FF ; RCZ280 W/ RC SOUND MODULE (MF)
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.DW HWSTR_RCMF
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;
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.DB $0B, $33, $32, $32, $FF, $FF ; RCZ280 W/ LINC SOUND MODULE
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.DB $0B, $33, $32, $32, $FF, $FF, $FF ; RCZ280 W/ LINC SOUND MODULE
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.DW HWSTR_LINC
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;
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.DB 13, $A0, $A1, $A0, $FF, $A2 ; MBC
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.DB 13, $A0, $A1, $A0, $FF, $A2, $FE ; MBC
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.DW HWSTR_MBC
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;
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.DB 17, $A4, $A5, $A4, $FF, $FF ; DUODYNE
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.DB 17, $A4, $A5, $A4, $FF, $A6, $FE ; DUODYNE
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.DW HWSTR_DUO
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;
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.DB $FF ; END OF TABLE MARKER
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@@ -642,7 +642,8 @@ RSEL .DB 0 ; Register selection port
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RDAT .DB 0 ; Register data port
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RIN .DB 0 ; Register input port
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Z180 .DB 0 ; Z180 base I/O port
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ACR .DB 0 ; Aux Ctrl Reg I/O port on SCG
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ACR .DB 0 ; Aux Ctrl Reg I/O port (ACR)
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ACRVAL .DB 0 ; ACR sound enable value
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DESC .DW 0 ; Hardware description string adr
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;
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CURPLT .DB 0 ; Current platform id reported by HBIOS
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@@ -660,8 +661,8 @@ TMP .DB 0 ; work around use of undocumented Z80
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HBIOSMD .DB 0 ; NON-ZERO IF USING HBIOS SOUND DRIVER, ZERO OTHERWISE
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OCTAVEADJ .DB 0 ; AMOUNT TO ADJUST OCTAVE UP OR DOWN
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MSGBAN .DB "Tune Player for RomWBW v3.5a, 30-Mar-2023",0
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MSGUSE .DB "Copyright (C) 2023, Wayne Warthen, GNU GPL v3",13,10
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MSGBAN .DB "Tune Player for RomWBW v3.6, 23-Feb-2024",0
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MSGUSE .DB "Copyright (C) 2024, Wayne Warthen, GNU GPL v3",13,10
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.DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10
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.DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10
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.DB "Usage: TUNE <filename>.[PT2|PT3|MYM] [--hbios] [+tn|-tn]",0
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