MirrorRepos
/
RomWBW
mirror of https://github.com/wwarthen/RomWBW.git
1
0
Fork 1
Code Issues Projects Releases Wiki Activity
Browse Source

Merge pull request #64 from wwarthen/master 

Resync
pull/459/head
b1ackmai1er 2 years ago
committed by GitHub
parent
7fe0312359 49025dca44
commit
7b5f1f3884
No known key found for this signature in database GPG Key ID: B5690EEEBB952194
43 changed files with 232 additions and 155 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Unified View
Diff Options
Show Stats Download Patch File Download Diff File
  1. BIN
      Doc/RomWBW Applications.pdf
  2. BIN
      Doc/RomWBW Disk Catalog.pdf
  3. BIN
      Doc/RomWBW Errata.pdf
  4. BIN
      Doc/RomWBW ROM Applications.pdf
  5. BIN
      Doc/RomWBW System Guide.pdf
  6. BIN
      Doc/RomWBW User Guide.pdf
  7. 2
      ReadMe.md
  8. 2
      ReadMe.txt
  9. 10
      Source/Doc/SystemGuide.md
  10. 10
      Source/Doc/UserGuide.md
  11. 2
      Source/HBIOS/cfg_duo.asm
  12. 2
      Source/HBIOS/cfg_dyno.asm
  13. 2
      Source/HBIOS/cfg_epitx.asm
  14. 2
      Source/HBIOS/cfg_heath.asm
  15. 2
      Source/HBIOS/cfg_master.asm
  16. 2
      Source/HBIOS/cfg_mbc.asm
  17. 2
      Source/HBIOS/cfg_mk4.asm
  18. 2
      Source/HBIOS/cfg_mon.asm
  19. 2
      Source/HBIOS/cfg_n8.asm
  20. 2
      Source/HBIOS/cfg_rcz180.asm
  21. 2
      Source/HBIOS/cfg_rcz280.asm
  22. 2
      Source/HBIOS/cfg_rcz80.asm
  23. 2
      Source/HBIOS/cfg_rph.asm
  24. 2
      Source/HBIOS/cfg_s100.asm
  25. 2
      Source/HBIOS/cfg_sbc.asm
  26. 2
      Source/HBIOS/cfg_scz180.asm
  27. 2
      Source/HBIOS/cfg_z80retro.asm
  28. 2
      Source/HBIOS/cfg_zeta.asm
  29. 2
      Source/HBIOS/cfg_zeta2.asm
  30. 20
      Source/HBIOS/cvdu.asm
  31. 93
      Source/HBIOS/dsrtc.asm
  32. 14
      Source/HBIOS/ef.asm
  33. 3
      Source/HBIOS/gdc.asm
  34. 32
      Source/HBIOS/hbios.asm
  35. 6
      Source/HBIOS/sn76489.asm
  36. 5
      Source/HBIOS/std.asm
  37. 37
      Source/HBIOS/term.asm
  38. 50
      Source/HBIOS/tms.asm
  39. 13
      Source/HBIOS/vdu.asm
  40. 23
      Source/HBIOS/vga.asm
  41. 25
      Source/HBIOS/vrc.asm
  42. 2
      Source/ver.inc
  43. 2
      Source/ver.lib

BIN
Doc/RomWBW Applications.pdf
View File

Binary file not shown.

BIN
Doc/RomWBW Disk Catalog.pdf
View File

Binary file not shown.

BIN
Doc/RomWBW Errata.pdf
View File

Binary file not shown.

BIN
Doc/RomWBW ROM Applications.pdf
View File

Binary file not shown.

BIN
Doc/RomWBW System Guide.pdf
View File

Binary file not shown.

BIN
Doc/RomWBW User Guide.pdf
View File

Binary file not shown.

2
ReadMe.md
View File

@ -3,7 +3,7 @@
**RomWBW ReadMe** \ **RomWBW ReadMe** \
Version 3.5 \ Version 3.5 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \ Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
28 Feb 2024
03 Apr 2024
# Overview # Overview

2
ReadMe.txt
View File

@ -1,6 +1,6 @@
RomWBW ReadMe RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com) Wayne Warthen (wwarthen@gmail.com)
28 Feb 2024
03 Apr 2024

10
Source/Doc/SystemGuide.md
View File

@ -1327,7 +1327,7 @@ specified (set to 0 for default/not specified). Video Mode (E) values
are specific to each VDA. The returned Status (A) is a standard HBIOS are specific to each VDA. The returned Status (A) is a standard HBIOS
result code. result code.
If the hardware and driver support it, you can specify a Font Bitmap
If the hardware and driver supports it, you can specify a Font Bitmap
(HL) buffer address containing the character bitmap data to be loaded (HL) buffer address containing the character bitmap data to be loaded
into the video processor. The buffer **must** be located entirely in the into the video processor. The buffer **must** be located entirely in the
top 32K of the CPU memory space. HL must be set to zero if no character top 32K of the CPU memory space. HL must be set to zero if no character
@ -1372,10 +1372,10 @@ data, then Font Bitmap (HL) will be set to zero on return.
| B: 0x42 | A: Status | | B: 0x42 | A: Status |
| C: Video Unit | | | C: Video Unit | |
Performs a soft reset of the specified Video Unit (C). Will clear the
screen, home the cursor, and restore active attribute/color to defaults.
Keyboard will be flushed. The current video mode will not be changed.
The returned Status (A) is a standard HBIOS result code.
Performs a non-destructive reset of the specified Video Unit (C).
Should re-initialize the video hardware without destroying the screen
contents or cursor position. The current video mode will not be
changed. The returned Status (A) is a standard HBIOS result code.
### Function 0x43 -- Video Device (VDADEV) ### Function 0x43 -- Video Device (VDADEV)

10
Source/Doc/UserGuide.md
View File

@ -5680,6 +5680,16 @@ S- MD: TYPE=RAM
##### Notes: ##### Notes:
- Z180 SBC SW2 (IOBYTE) Dip Switches:
| Bit | Setting | Function |
|-----|---------|-------------------------------------|
| 0 | Off | Use Z180 ASCI Channel A for console |
| | On | Use Propeller Console |
| | | |
| 1 | Off | Boot to RomWBW Boot Loader |
| | On | Boot to S100 Monitor |
`\clearpage`{=latex} `\clearpage`{=latex}
### Duodyne Z80 System ### Duodyne Z80 System

2
Source/HBIOS/cfg_duo.asm
View File

@ -105,7 +105,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_dyno.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_epitx.asm
View File

@ -109,7 +109,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_heath.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_master.asm
View File

@ -136,7 +136,7 @@ MKYENABLE .EQU FALSE ; MSX 8255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_mbc.asm
View File

@ -102,7 +102,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_mk4.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_mon.asm
View File

@ -102,7 +102,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_n8.asm
View File

@ -109,7 +109,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_rcz180.asm
View File

@ -113,7 +113,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_rcz280.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_rcz80.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_rph.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_s100.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_sbc.asm
View File

@ -102,7 +102,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_scz180.asm
View File

@ -107,7 +107,7 @@ MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VD
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_z80retro.asm
View File

@ -100,7 +100,7 @@ ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
; ;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_zeta.asm
View File

@ -89,7 +89,7 @@ ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

2
Source/HBIOS/cfg_zeta2.asm
View File

@ -100,7 +100,7 @@ ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
; ;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC|K80W]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
; ;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)

20
Source/HBIOS/cvdu.asm
View File

@ -148,6 +148,15 @@ CVDU_VDAINI:
; RESET VDA ; RESET VDA
; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA ; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA
CALL CVDU_VDARES ; RESET VDA CALL CVDU_VDARES ; RESET VDA
LD A,$0E ; ATTRIBUTE IS STANDARD WHITE ON BLACK
LD (CVDU_ATTR),A ; SAVE IT
LD DE,0 ; ROW = 0, COL = 0
CALL CVDU_XY ; SEND CURSOR TO TOP LEFT
LD A,' ' ; BLANK THE SCREEN
LD DE,$800 ; FILL ENTIRE BUFFER
CALL CVDU_FILL ; DO IT
LD DE,0 ; ROW = 0, COL = 0
CALL CVDU_XY ; SEND CURSOR TO TOP LEFT
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
RET RET
@ -160,17 +169,6 @@ CVDU_VDAQRY:
RET RET
CVDU_VDARES: CVDU_VDARES:
LD A,$0E ; ATTRIBUTE IS STANDARD WHITE ON BLACK
LD (CVDU_ATTR),A ; SAVE IT
LD DE,0 ; ROW = 0, COL = 0
CALL CVDU_XY ; SEND CURSOR TO TOP LEFT
LD A,' ' ; BLANK THE SCREEN
LD DE,$800 ; FILL ENTIRE BUFFER
CALL CVDU_FILL ; DO IT
LD DE,0 ; ROW = 0, COL = 0
CALL CVDU_XY ; SEND CURSOR TO TOP LEFT
XOR A XOR A
RET RET

93
Source/HBIOS/dsrtc.asm
View File

@ -66,28 +66,28 @@
; RTC LATCH WRITE ; RTC LATCH WRITE
; --------------- ; ---------------
; ;
; BIT SBC SBC-004 MFPIC N8 N8-CSIO MK4 SC130 SC131 SC126 MBC RPH
; ----- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- -------
; D7 RTC_OUT RTC_OUT -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT RTC_OUT
; D6 RTC_CLK RTC_CLK -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK
; D5 /RTC_WE /RTC_WE -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE
; D4 RTC_CE RTC_CE -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE
; D3 NC CLKSEL /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL --
; D2 NC SPK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK --
; D1 -- -- RTC_WE SPI_CLK NC NC -- -- FS LED1 --
; D0 -- -- RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0 --
;
; RTC LATCH READ
; --------------
;
; D7 -- -- -- -- -- -- -- -- I2C_SDA -- --
; D6 CFG CFG -- SPI_DO CFG -- -- -- -- CFG --
; D5 -- -- -- -- -- -- -- -- -- -- --
; D4 -- -- -- -- -- -- -- -- -- -- --
; D3 -- -- -- -- -- -- -- -- -- -- --
; D2 -- -- -- -- -- -- -- -- -- -- --
; D1 ---- -- -- -- -- -- -- -- -- CLKSEL --
; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN RTC_IN
; BIT SBC RCBUS SBC-004 MFPIC K80W N8 N8-CSIO MK4 SC130 SC131 SC126 MBC RPH
; ----- ------- ------- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- -------
; D7 RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT RTC_OUT
; D6 RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK
; D5 /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE
; D4 RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE
; D3 NC NC CLKSEL /RTC_CE /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL --
; D2 NC NC SPK RTC_CLK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK --
; D1 -- -- -- RTC_WE RTC_WE SPI_CLK NC NC -- -- FS LED1 --
; D0 -- -- -- RTC_OUT RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0 --
;
; RTC LATCH READTCH READ
; ----------------------
;
; D7 -- -- -- -- -- -- -- -- -- -- I2C_SDA -- --
; D6 CFG -- CFG -- -- SPI_DO CFG -- -- -- -- CFG --
; D5 -- -- -- -- -- -- -- -- -- -- -- -- --
; D4 -- -- -- -- -- -- -- -- -- -- -- -- --
; D3 -- -- -- -- -- -- -- -- -- -- -- -- --
; D2 -- -- -- -- -- -- -- -- -- -- -- -- --
; D1 -- -- -- -- -- -- -- -- -- -- -- CLKSEL --
; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN RTC_IN
; ;
.ECHO "DSRTC: MODE=" .ECHO "DSRTC: MODE="
; ;
@ -106,15 +106,6 @@ DSRTC_IDLE .EQU %00100000 ; QUIESCENT STATE
RTCDEF .SET RTCDEF | DSRTC_IDLE ; FOR HBIOS MAINLINE RTCDEF .SET RTCDEF | DSRTC_IDLE ; FOR HBIOS MAINLINE
; ;
#DEFINE DSRTC_OPRVAL HB_RTCVAL #DEFINE DSRTC_OPRVAL HB_RTCVAL
;
; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
;
DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
DS1d4k .EQU %10100110 ; 1 DIODE 4K RESISTOR
DS1d8k .EQU %10100111 ; 1 DOIDE 8K RESISTOR
DS2d2k .EQU %10101001 ; 2 DIODES 2K RESISTOR
DS2d4k .EQU %10101010 ; 2 DIODES 4K RESISTOR
DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
; ;
.ECHO "STD" .ECHO "STD"
; ;
@ -137,11 +128,38 @@ DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE
.ECHO "MFPIC" .ECHO "MFPIC"
; ;
#ENDIF #ENDIF
;
#IF (DSRTCMODE == DSRTCMODE_K80W)
;
DSRTC_IO .EQU RTCIO ; RTC PORT
;
DSRTC_DATA .EQU %00000001 ; BIT 0 IS RTC DATA OUT
DSRTC_CLK .EQU %00000100 ; BIT 2 IS RTC CLOCK (CLK)
DSRTC_WR .EQU %00000010 ; BIT 1 IS DATA DIRECTION (WE)
DSRTC_CE .EQU %00001000 ; BIT 3 CHIP ENABLE (/CE)
;
DSRTC_MASK .EQU %00001111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE
;
#DEFINE DSRTC_OPRVAL HB_RTCVAL
;
.ECHO "K80W"
;
#ENDIF
; ;
.ECHO ", IO=" .ECHO ", IO="
.ECHO DSRTC_IO .ECHO DSRTC_IO
.ECHO "\n" .ECHO "\n"
; ;
; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
;
DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
DS1d4k .EQU %10100110 ; 1 DIODE 4K RESISTOR
DS1d8k .EQU %10100111 ; 1 DOIDE 8K RESISTOR
DS2d2k .EQU %10101001 ; 2 DIODES 2K RESISTOR
DS2d4k .EQU %10101010 ; 2 DIODES 4K RESISTOR
DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
;
DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW) DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
; ;
; RTC DEVICE PRE-INITIALIZATION ENTRY ; RTC DEVICE PRE-INITIALIZATION ENTRY
@ -190,6 +208,9 @@ DSRTC_INIT:
#IF (DSRTCMODE == DSRTCMODE_MFPIC) #IF (DSRTCMODE == DSRTCMODE_MFPIC)
PRTS("MFPIC$") PRTS("MFPIC$")
#ENDIF #ENDIF
#IF (DSRTCMODE == DSRTCMODE_K80W)
PRTS("K80W$")
#ENDIF
; ;
; PRINT RTC LATCH PORT ADDRESS ; PRINT RTC LATCH PORT ADDRESS
PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
@ -598,7 +619,7 @@ DSRTC_CMD:
LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE
OUT (DSRTC_IO),A ; WRITE TO PORT OUT (DSRTC_IO),A ; WRITE TO PORT
CALL DLY2 ; DELAY 2 * 27 T-STATES CALL DLY2 ; DELAY 2 * 27 T-STATES
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
#IF ((DSRTCMODE == DSRTCMODE_MFPIC) | (DSRTCMODE == DSRTCMODE_K80W))
AND ~DSRTC_CE ; ASSERT CE (LOW) AND ~DSRTC_CE ; ASSERT CE (LOW)
#ELSE #ELSE
OR DSRTC_CE ; ASSERT CE (HIGH) OR DSRTC_CE ; ASSERT CE (HIGH)
@ -624,7 +645,7 @@ DSRTC_CMD:
; ;
DSRTC_PUT: DSRTC_PUT:
LD B,8 ; LOOP FOR 8 BITS LD B,8 ; LOOP FOR 8 BITS
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
#IF ((DSRTCMODE == DSRTCMODE_MFPIC) | (DSRTCMODE == DSRTCMODE_K80W))
OR DSRTC_WR ; SET WRITE MODE OR DSRTC_WR ; SET WRITE MODE
#ELSE #ELSE
AND ~DSRTC_RD ; SET WRITE MODE AND ~DSRTC_RD ; SET WRITE MODE
@ -634,7 +655,7 @@ DSRTC_PUT1:
OUT (DSRTC_IO),A ; DO IT OUT (DSRTC_IO),A ; DO IT
CALL DLY1 ; DELAY 27 T-STATES CALL DLY1 ; DELAY 27 T-STATES
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
#IF ((DSRTCMODE == DSRTCMODE_MFPIC) | (DSRTCMODE == DSRTCMODE_K80W))
RRA ; PREP ACCUM TO GET DATA BIT IN CARRY RRA ; PREP ACCUM TO GET DATA BIT IN CARRY
RR E ; ROTATE NEXT BIT TO SEND INTO CARRY RR E ; ROTATE NEXT BIT TO SEND INTO CARRY
RLA ; ROTATE BITS BACK TO CORRECT POSTIIONS RLA ; ROTATE BITS BACK TO CORRECT POSTIIONS
@ -667,7 +688,7 @@ DSRTC_PUT1:
DSRTC_GET: DSRTC_GET:
LD E,0 ; INITIALIZE WORKING VALUE TO 0 LD E,0 ; INITIALIZE WORKING VALUE TO 0
LD B,8 ; LOOP FOR 8 BITS LD B,8 ; LOOP FOR 8 BITS
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
#IF ((DSRTCMODE == DSRTCMODE_MFPIC) | (DSRTCMODE == DSRTCMODE_K80W))
AND ~DSRTC_WR ; SET READ MODE AND ~DSRTC_WR ; SET READ MODE
#ELSE #ELSE
OR DSRTC_RD ; SET READ MODE OR DSRTC_RD ; SET READ MODE
@ -724,7 +745,7 @@ DSRTC_END:
DSRTC_STAT .DB 0 ; DEVICE STATUS (0=OK) DSRTC_STAT .DB 0 ; DEVICE STATUS (0=OK)
DSRTC_TEMP .DB 0 ; TEMP VALUE STORAGE DSRTC_TEMP .DB 0 ; TEMP VALUE STORAGE
; ;
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
#IF ((DSRTCMODE == DSRTCMODE_MFPIC) | (DSRTCMODE == DSRTCMODE_K80W))
DSRTC_RTCVAL .DB DSRTC_IDLE ; LOCAL LATCH SHADOW FOR MFPIC DSRTC_RTCVAL .DB DSRTC_IDLE ; LOCAL LATCH SHADOW FOR MFPIC
#ENDIF #ENDIF
; ;

14
Source/HBIOS/ef.asm
View File

@ -570,6 +570,13 @@ EF_VDAINI:
LD A,L LD A,L
OR H OR H
CALL NZ,EF_LOADFONTS CALL NZ,EF_LOADFONTS
CALL EF_CLEARALL
CALL EF_LOADCSTYLE
LD DE,0
LD (EF_VDA_OFFSET),DE
CALL EF_VDASCP
XOR A XOR A
RET RET
; ;
@ -586,13 +593,8 @@ EF_VDAQRY:
; ;
EF_VDARES: EF_VDARES:
; VIDEO RESET ; VIDEO RESET
; SOFT RESET, CLEAR SCREEN, HOME CURSOR, RESTORE ATTRIBUTE/COLOR DEFAULTS
; SOFT RESET
; ;
CALL EF_CLEARALL
CALL EF_LOADCSTYLE
LD DE,0
LD (EF_VDA_OFFSET),DE
CALL EF_VDASCP
XOR A XOR A
RET RET
; ;

3
Source/HBIOS/gdc.asm
View File

@ -161,8 +161,7 @@ GDC_VDAQRY: ; VIDEO INFORMATION QUERY
RET RET
; ;
GDC_VDARES: ; VIDEO SYSTEM RESET GDC_VDARES: ; VIDEO SYSTEM RESET
; *** TODO: RESET VIDEO SYSTEM HERE, CLEAR SCREEN,
; CURSOR TO TOP LEFT, CLEAR ATTRIBUTES
; *** TODO: RESET VIDEO SYSTEM HERE
XOR A XOR A
RET RET
; ;

32
Source/HBIOS/hbios.asm
View File

@ -298,9 +298,9 @@ ROM_SIG:
.DW DESC ; POINTER TO LONGER DESCRIPTION OF ROM .DW DESC ; POINTER TO LONGER DESCRIPTION OF ROM
.DB 0, 0, 0, 0, 0, 0 ; RESERVED FOR FUTURE USE; MUST BE ZERO .DB 0, 0, 0, 0, 0, 0 ; RESERVED FOR FUTURE USE; MUST BE ZERO
; ;
NAME .DB "ROMWBW v", BIOSVER, ", ", TIMESTAMP, 0
NAME .DB "ROMWBW v", BIOSVER, ", ", CONFIG, ", ", TIMESTAMP, 0
AUTH .DB "WBW",0 AUTH .DB "WBW",0
DESC .DB "ROMWBW v", BIOSVER, ", Copyright (C) 2020, Wayne Warthen, GNU GPL v3", 0
DESC .DB "Copyright (C) 2024, Wayne Warthen, GNU GPL v3", 0
; ;
.FILL ($100 - $),$FF ; PAD REMAINDER OF PAGE ZERO .FILL ($100 - $),$FF ; PAD REMAINDER OF PAGE ZERO
; ;
@ -1877,17 +1877,6 @@ SAVE_REC_M:
LD A,0 ; BIT 6 LD A,0 ; BIT 6
JR Z,SAVE_REC_M ; IS RECOVERY MODE JR Z,SAVE_REC_M ; IS RECOVERY MODE
LD A,1 LD A,1
SAVE_REC_M:
LD (HB_BOOT_REC),A ; SAVE FOR LATER
#ENDIF
#ENDIF
#IF ((PLATFORM == PLT_DUO)
#IF (BT_REC_TYPE == BT_REC_DUORI)
IN A,($78 + 6) ; UART_MSR MODEM
BIT 6,A ; STATUS REGISTER
LD A,0 ; BIT 6
JR Z,SAVE_REC_M ; IS RECOVERY MODE
LD A,1
SAVE_REC_M: SAVE_REC_M:
LD (HB_BOOT_REC),A ; SAVE FOR LATER LD (HB_BOOT_REC),A ; SAVE FOR LATER
#ENDIF #ENDIF
@ -1978,19 +1967,19 @@ HB_CPU1:
LD (RTC_DISPACT),A ; RTC DEVICE LD (RTC_DISPACT),A ; RTC DEVICE
LD (DSKY_DISPACT),A ; DSKY DEVICE LD (DSKY_DISPACT),A ; DSKY DEVICE
; ;
#IF (SN76489ENABLE)
CALL SN76489_PREINIT
#ENDIF
#IF (DSRTCENABLE) #IF (DSRTCENABLE)
CALL DSRTC_PREINIT CALL DSRTC_PREINIT
#ENDIF #ENDIF
;
#IF (DSKYENABLE) #IF (DSKYENABLE)
#IF (ICMENABLE) #IF (ICMENABLE)
CALL ICM_PREINIT CALL ICM_PREINIT
#ENDIF #ENDIF
;
#IF (PKDENABLE) #IF (PKDENABLE)
CALL PKD_PREINIT CALL PKD_PREINIT
#ENDIF #ENDIF
;
#IF (H8PENABLE) #IF (H8PENABLE)
CALL H8P_PREINIT CALL H8P_PREINIT
#ENDIF #ENDIF
@ -3236,7 +3225,7 @@ CALLDUMMY:
#IF (BT_REC_TYPE != BT_REC_NONE) #IF (BT_REC_TYPE != BT_REC_NONE)
; ;
HB_PCINIT_REC: HB_PCINIT_REC:
#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC) | (PLATFORM == PLT_DUO))
#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC))
.DW UART_PREINIT .DW UART_PREINIT
; .DW CALLDUMMY ; .DW CALLDUMMY
#ENDIF #ENDIF
@ -3248,10 +3237,6 @@ HB_INIT_REC:
.DW MD_INIT .DW MD_INIT
.DW PPIDE_INIT .DW PPIDE_INIT
#ENDIF #ENDIF
#IF ((PLATFORM == PLT_DUO)
.DW UART_INIT
.DW MD_INIT
#ENDIF
HB_INITRLEN .EQU (($ - HB_INIT_REC) / 2) HB_INITRLEN .EQU (($ - HB_INIT_REC) / 2)
; ;
#ENDIF #ENDIF
@ -4284,6 +4269,8 @@ SYS_RESCOLD:
SYS_RESUSER: SYS_RESUSER:
; ;
#IF (CPUFAM == CPU_Z180) #IF (CPUFAM == CPU_Z180)
;
; IF Z180 CPU, CHECK FOR INVALID OPCODE FLAG AND HANDLE IF SO
; ;
IN0 A,(Z180_ITC) ; GET ITC REGISTER IN0 A,(Z180_ITC) ; GET ITC REGISTER
XOR $80 ; PRECLEAR TRAP BIT XOR $80 ; PRECLEAR TRAP BIT
@ -4320,6 +4307,9 @@ SYS_RESUSER2:
JP NEWLINE ; FORMATTING & EXIT JP NEWLINE ; FORMATTING & EXIT
; ;
#ENDIF #ENDIF
;
; RESET ACTIVE VIDEO DISPLAY ATTACHED TO EMULATOR
CALL TERM_RESET
; ;
RET ; ELSE RETURN WITH USER RESET VECTOR IN HL RET ; ELSE RETURN WITH USER RESET VECTOR IN HL
; ;

6
Source/HBIOS/sn76489.asm
View File

@ -56,6 +56,12 @@ CHANNEL_3_SILENT .EQU $FF
; ;
#INCLUDE "audio.inc" #INCLUDE "audio.inc"
; ;
; BLINDLY RESET THE PSG AS SOON AS WE CAN AFTER BOOT BECAUSE IT
; DOES NOT RESET ITSELF AT POWER ON AND MAKES UGLY NOISE.
;
SN76489_PREINIT:
JR SN7_RESET
;
SN76489_INIT: SN76489_INIT:
LD IY, SN7_IDAT ; POINTER TO INSTANCE DATA LD IY, SN7_IDAT ; POINTER TO INSTANCE DATA
LD BC, SN7_FNTBL ; BC := FUNCTION TABLE ADDRESS LD BC, SN7_FNTBL ; BC := FUNCTION TABLE ADDRESS

5
Source/HBIOS/std.asm
View File

@ -21,7 +21,7 @@
; 17. DUO Andrew Lynch's Duodyne Computer ; 17. DUO Andrew Lynch's Duodyne Computer
; 18. HEATH Les Bird's Heath Z80 Board ; 18. HEATH Les Bird's Heath Z80 Board
; 19. EPITX Alan Cox' Mini-ITX System ; 19. EPITX Alan Cox' Mini-ITX System
; 20. MON Jacques Pelletier's Monsputer
; 20. MON Jacques Pelletier's Monsputer
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; ;
@ -87,8 +87,6 @@ BT_REC_FORCE .EQU 1 ; FORCE BOOT RECOVERY MODE
BT_REC_SBC01 .EQU 2 ; ECB-SBCV2 - BIT 1 RTC HIGH BT_REC_SBC01 .EQU 2 ; ECB-SBCV2 - BIT 1 RTC HIGH
BT_REC_SBC1B .EQU 3 ; ECB-SBCV2 - 1-BIT IO PORT BT_REC_SBC1B .EQU 3 ; ECB-SBCV2 - 1-BIT IO PORT
BT_REC_SBCRI .EQU 4 ; ECB-SBCV2 - 16550 UART RING INDICATOR LINE BT_REC_SBCRI .EQU 4 ; ECB-SBCV2 - 16550 UART RING INDICATOR LINE
BT_REC_DUORI .EQU 5 ; DUO MULTI I/O - TL16C2552FN UART RING INDICATOR LINE
; ;
BT_REC_TYPE .EQU BT_REC_NONE ; BOOT RECOVERY METHOD TO USE BT_REC_TYPE .EQU BT_REC_NONE ; BOOT RECOVERY METHOD TO USE
; ;
@ -121,6 +119,7 @@ CTCMODE_TIM256 .EQU 3 ; CTC TIMER W/ DIV 256
DSRTCMODE_NONE .EQU 0 ; NO DSRTC DSRTCMODE_NONE .EQU 0 ; NO DSRTC
DSRTCMODE_STD .EQU 1 ; ORIGINAL DSRTC CIRCUIT (SBC, ZETA, MK4) DSRTCMODE_STD .EQU 1 ; ORIGINAL DSRTC CIRCUIT (SBC, ZETA, MK4)
DSRTCMODE_MFPIC .EQU 2 ; MF/PIC VARIANT DSRTCMODE_MFPIC .EQU 2 ; MF/PIC VARIANT
DSRTCMODE_K80W .EQU 3 ; K80W
; ;
; DS1307 RTC MODE SELECTIONS ; DS1307 RTC MODE SELECTIONS
; ;

37
Source/HBIOS/term.asm
View File

@ -31,6 +31,8 @@ TERM_PREINIT:
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
RET ; DONE RET ; DONE
; ;
#IF (TERMENABLE)
;
;====================================================================== ;======================================================================
; TERMINAL DRIVER - ATTACH ; TERMINAL DRIVER - ATTACH
;====================================================================== ;======================================================================
@ -47,13 +49,14 @@ TERM_PREINIT:
; DE: VDA DRIVER'S DISPATCH ADDRESS ; DE: VDA DRIVER'S DISPATCH ADDRESS
; HL: VDA DRIVER'S INSTANCE DATA ; HL: VDA DRIVER'S INSTANCE DATA
; ;
#IF (TERMENABLE)
;
TERM_ATTACH: TERM_ATTACH:
; ;
LD A,(TERM_DEVCNT) ; GET NEXT DEVICE NUMBER TO USE LD A,(TERM_DEVCNT) ; GET NEXT DEVICE NUMBER TO USE
LD B,A ; PUT IT IN B LD B,A ; PUT IT IN B
PUSH HL ; SAVE VDA INSTANCE DATA PTR PUSH HL ; SAVE VDA INSTANCE DATA PTR
;
LD A,C ; VIDEO UNIT TO A
LD (TERM_VDADEV),A ; SAVE IT
; ;
; SETUP EMULATOR MODULE FUNC TBL ADDRESS BASED ON DESIRED EMULATION ; SETUP EMULATOR MODULE FUNC TBL ADDRESS BASED ON DESIRED EMULATION
; EMULATOR PASSES BACK IT'S FUNC TBL ADDRESS IN DE ; EMULATOR PASSES BACK IT'S FUNC TBL ADDRESS IN DE
@ -83,10 +86,34 @@ TERM_ATTACH:
RET ; RETURN RET ; RETURN
; ;
;====================================================================== ;======================================================================
; TERMINAL DRIVER - RESET
;======================================================================
;
; RESET THE FULL EMULATION STACK INCLUDING THE UNDERLYING VDA.
; THIS IS USED TO RECOVER FROM APPLICATIONS THAT REPROGRAM THE
; VIDEO CHIP.
;
TERM_RESET:
; ABORT IF NOTHING ATTACHED
LD A,(TERM_DEVCNT)
OR A
JR NZ,TERM_RESET1
OR $FF
RET
;
TERM_RESET1:
; RESET THE ATTACHED VDA DEVICE
LD B,BF_VDARES ; FUNC: RESET
LD A,(TERM_VDADEV) ; GET VDA UNIT NUM
LD C,A ; PUT IN C
JP ANSI_VDADISP ; CALL THE VDA DRIVER
;
;======================================================================
; TERMINAL DRIVER PRIVATE DATA ; TERMINAL DRIVER PRIVATE DATA
;====================================================================== ;======================================================================
; ;
TERM_DEVCNT .DB 0 ; TERMINAL DEVICE COUNT TERM_DEVCNT .DB 0 ; TERMINAL DEVICE COUNT
TERM_VDADEV .DB 0 ; ATTACHED VDA UNIT
; ;
;====================================================================== ;======================================================================
; EMULATION MODULES ; EMULATION MODULES
@ -95,4 +122,10 @@ TERM_DEVCNT .DB 0 ; TERMINAL DEVICE COUNT
#INCLUDE "tty.asm" #INCLUDE "tty.asm"
#INCLUDE "ansi.asm" #INCLUDE "ansi.asm"
; ;
#ELSE
;
TERM_RESET:
XOR A
RET
;
#ENDIF #ENDIF

50
Source/HBIOS/tms.asm
View File

@ -249,7 +249,7 @@ TMS_INIT:
TMS_INIT1: TMS_INIT1:
CALL TMS_CRTINIT ; SETUP THE TMS CHIP REGISTERS CALL TMS_CRTINIT ; SETUP THE TMS CHIP REGISTERS
CALL TMS_LOADFONT ; LOAD FONT DATA FROM ROM TO TMS STRORAGE CALL TMS_LOADFONT ; LOAD FONT DATA FROM ROM TO TMS STRORAGE
CALL TMS_VDARES1
CALL TMS_CLEAR ; CLEAR SCREEN, HOME CURSOR
#IF (TMSMODE == TMSMODE_N8) #IF (TMSMODE == TMSMODE_N8)
CALL PPK_INIT ; INITIALIZE PPI KEYBOARD DRIVER CALL PPK_INIT ; INITIALIZE PPI KEYBOARD DRIVER
#ENDIF #ENDIF
@ -335,6 +335,7 @@ TMS_VDAINI:
; RESET VDA ; RESET VDA
; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA ; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA
CALL TMS_VDARES ; RESET VDA CALL TMS_VDARES ; RESET VDA
CALL TMS_CLEAR ; CLEAR SCREEN
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
RET RET
@ -350,20 +351,17 @@ TMS_VDARES:
#IF (CPUFAM == CPU_Z180) #IF (CPUFAM == CPU_Z180)
CALL TMS_Z180IO CALL TMS_Z180IO
#ENDIF #ENDIF
TMS_VDARES1: ; ENTRY POINT TO AVOID TMS_Z180IO RECURSION
LD DE,0 ; ROW = 0, COL = 0
CALL TMS_XY ; SEND CURSOR TO TOP LEFT
LD A,' ' ; BLANK THE SCREEN
LD DE,TMS_ROWS * TMS_COLS ; FILL ENTIRE BUFFER
CALL TMS_FILL ; DO IT
LD DE,0 ; ROW = 0, COL = 0
CALL TMS_XY ; SEND CURSOR TO TOP LEFT
CALL TMS_CRTINIT1A
#IF (!USELZSA2)
; WE WANT TO RELOAD THE FONT ON RESET, BUT THIS IS NOT CURRENTLY
; POSSIBLE WHEN FONT COMPRESSION IS IN USE.
CALL TMS_CLRCUR ; CLEAR CURSOR
CALL TMS_LOADFONT ; RELOAD FONT
LD A,$FF ; REMOVE
LD (TMS_CURSAV),A ; ... SAVED CURSOR CHAR
CALL TMS_SETCUR ; RESTORE CURSOR
#ENDIF
XOR A XOR A
DEC A
LD (TMS_CURSAV),A
CALL TMS_SETCUR ; SET CURSOR
XOR A ; SIGNAL SUCCESS
RET RET
TMS_VDADEV: TMS_VDADEV:
@ -624,6 +622,8 @@ TMS_CRTINIT1:
LD A,D LD A,D
OR E OR E
JR NZ,TMS_CRTINIT1 JR NZ,TMS_CRTINIT1
;
TMS_CRTINIT1A:
; ;
; INITIALIZE VDU REGISTERS ; INITIALIZE VDU REGISTERS
LD C,0 ; START WITH REGISTER 0 LD C,0 ; START WITH REGISTER 0
@ -645,6 +645,26 @@ TMS_CRTINIT2:
RET RET
; ;
;---------------------------------------------------------------------- ;----------------------------------------------------------------------
; CLEAR SCREEN AND HOME CURSOR
;----------------------------------------------------------------------
;
TMS_CLEAR:
LD DE,0 ; ROW = 0, COL = 0
CALL TMS_XY ; SEND CURSOR TO TOP LEFT
LD A,' ' ; BLANK THE SCREEN
LD DE,TMS_ROWS * TMS_COLS ; FILL ENTIRE BUFFER
CALL TMS_FILL ; DO IT
LD DE,0 ; ROW = 0, COL = 0
CALL TMS_XY ; SEND CURSOR TO TOP LEFT
XOR A
DEC A
LD (TMS_CURSAV),A
CALL TMS_SETCUR ; SET CURSOR
;
XOR A ; SIGNAL SUCCESS
RET
;
;----------------------------------------------------------------------
; LOAD FONT DATA ; LOAD FONT DATA
;---------------------------------------------------------------------- ;----------------------------------------------------------------------
; ;
@ -697,7 +717,7 @@ TMS_STACK .DW 0
; ;
; VIRTUAL CURSOR IS GENERATED BY DYNAMICALLY CHANGING FONT GLYPH ; VIRTUAL CURSOR IS GENERATED BY DYNAMICALLY CHANGING FONT GLYPH
; FOR CHAR 255 TO BE THE INVERSE OF THE GLYPH OF THE CHARACTER UNDER ; FOR CHAR 255 TO BE THE INVERSE OF THE GLYPH OF THE CHARACTER UNDER
; THE CURRENT CURSOR POSITION. THE CHARACTER CODE IS THEN SWITCH TO
; THE CURRENT CURSOR POSITION. THE CHARACTER CODE IS THEN SWITCHED TO
; THE VALUE 255 AND THE ORIGINAL VALUE IS SAVED. WHEN THE DISPLAY ; THE VALUE 255 AND THE ORIGINAL VALUE IS SAVED. WHEN THE DISPLAY
; NEEDS TO BE CHANGED THE PROCESS IS UNDONE. IT IS ESSENTIAL THAT ; NEEDS TO BE CHANGED THE PROCESS IS UNDONE. IT IS ESSENTIAL THAT
; ALL DISPLAY CHANGES BE BRACKETED WITH CALLS TO TMS_CLRCUR PRIOR TO ; ALL DISPLAY CHANGES BE BRACKETED WITH CALLS TO TMS_CLRCUR PRIOR TO

13
Source/HBIOS/vdu.asm
View File

@ -165,6 +165,12 @@ VDU_VDAINI:
; RESET VDA ; RESET VDA
; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA ; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA
CALL VDU_VDARES ; RESET VDA CALL VDU_VDARES ; RESET VDA
LD DE,0
LD (VDU_OFFSET),DE
CALL VDU_XY
LD A,' '
LD DE,1024*16
CALL VDU_FILL
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
RET RET
@ -176,13 +182,6 @@ VDU_VDAQRY:
RET RET
VDU_VDARES: VDU_VDARES:
LD DE,0
LD (VDU_OFFSET),DE
CALL VDU_XY
LD A,' '
LD DE,1024*16
CALL VDU_FILL
XOR A XOR A
RET RET

23
Source/HBIOS/vga.asm
View File

@ -180,18 +180,7 @@ VGA_VDAINI:
; RESET VDA ; RESET VDA
; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA ; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA
CALL VGA_VDARES ; RESET VDA CALL VGA_VDARES ; RESET VDA
XOR A ; SIGNAL SUCCESS
RET
VGA_VDAQRY:
LD C,$00 ; MODE ZERO IS ALL WE KNOW
LD D,VGA_ROWS ; ROWS
LD E,VGA_COLS ; COLS
LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
XOR A ; SIGNAL SUCCESS
RET
VGA_VDARES:
LD A,$07 ; ATTRIBUTE IS STANDARD WHITE ON BLACK LD A,$07 ; ATTRIBUTE IS STANDARD WHITE ON BLACK
LD (VGA_ATTR),A ; SAVE IT LD (VGA_ATTR),A ; SAVE IT
XOR A ; ZERO (REVERSE, UNDERLINE, BLINK) XOR A ; ZERO (REVERSE, UNDERLINE, BLINK)
@ -205,6 +194,18 @@ VGA_VDARES:
LD DE,0 ; ROW = 0, COL = 0 LD DE,0 ; ROW = 0, COL = 0
CALL VGA_XY ; SEND CURSOR TO TOP LEFT CALL VGA_XY ; SEND CURSOR TO TOP LEFT
XOR A ; SIGNAL SUCCESS
RET
VGA_VDAQRY:
LD C,$00 ; MODE ZERO IS ALL WE KNOW
LD D,VGA_ROWS ; ROWS
LD E,VGA_COLS ; COLS
LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
XOR A ; SIGNAL SUCCESS
RET
VGA_VDARES:
LD HL,$0404 | VGA_89BIT; SET VIDEO ENABLE BIT LD HL,$0404 | VGA_89BIT; SET VIDEO ENABLE BIT
CALL VGA_SETCFG ; DO IT CALL VGA_SETCFG ; DO IT

25
Source/HBIOS/vrc.asm
View File

@ -117,18 +117,6 @@ VRC_VDAINI:
; RESET VDA ; RESET VDA
; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA ; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA
CALL VRC_VDARES ; RESET VDA CALL VRC_VDARES ; RESET VDA
XOR A ; SIGNAL SUCCESS
RET
VRC_VDAQRY:
LD C,$00 ; MODE ZERO IS ALL WE KNOW
LD D,VRC_ROWS ; ROWS
LD E,VRC_COLS ; COLS
LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
XOR A ; SIGNAL SUCCESS
RET
VRC_VDARES:
XOR A ; CLEAR ATTRIBUTES (REV VIDEO OFF) XOR A ; CLEAR ATTRIBUTES (REV VIDEO OFF)
LD (VRC_ATTR),A ; SAVE IT LD (VRC_ATTR),A ; SAVE IT
DEC A ; INIT CUR NESTING, INIT TO HIDDEN DEC A ; INIT CUR NESTING, INIT TO HIDDEN
@ -143,7 +131,18 @@ VRC_VDARES:
LD DE,0 ; ROW = 0, COL = 0 LD DE,0 ; ROW = 0, COL = 0
CALL VRC_XY ; SEND CURSOR TO TOP LEFT CALL VRC_XY ; SEND CURSOR TO TOP LEFT
CALL VRC_SHOWCUR ; NOW SHOW THE CURSOR CALL VRC_SHOWCUR ; NOW SHOW THE CURSOR
;
XOR A ; SIGNAL SUCCESS
RET
VRC_VDAQRY:
LD C,$00 ; MODE ZERO IS ALL WE KNOW
LD D,VRC_ROWS ; ROWS
LD E,VRC_COLS ; COLS
LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
XOR A ; SIGNAL SUCCESS
RET
VRC_VDARES:
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
RET RET

2
Source/ver.inc
View File

@ -2,7 +2,7 @@
#DEFINE RMN 5 #DEFINE RMN 5
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.5.0-dev.19"
#DEFINE BIOSVER "3.5.0-dev.25"
#define rmj RMJ #define rmj RMJ
#define rmn RMN #define rmn RMN
#define rup RUP #define rup RUP

2
Source/ver.lib
View File

@ -3,5 +3,5 @@ rmn equ 5
rup equ 0 rup equ 0
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.5.0-dev.19"
db "3.5.0-dev.25"
endm endm

Write Preview
Loading…
Cancel
Save