Browse Source

Reintegrate wbw -> trunk

pull/3/head
wayne 13 years ago
parent
commit
7c2a1b447b
  1. 4
      Apps/Source/Build.cmd
  2. 4
      Apps/Source/applvers.h
  3. 6
      Apps/Source/applvers.lib
  4. 153
      Apps/Source/cnamept1.c
  5. 5
      Apps/Source/cnfgdata.h
  6. 203
      Apps/Source/cpmname.c
  7. 9
      Apps/Source/syscfg.h
  8. 187
      Source/asci.asm
  9. 28
      Source/cbios.asm
  10. 6
      Source/config_n8_2312.asm
  11. 6
      Source/config_n8_2511.asm
  12. 2
      Source/config_n8vem_cvdu.asm
  13. 2
      Source/config_n8vem_dide.asm
  14. 2
      Source/config_n8vem_diskio.asm
  15. 2
      Source/config_n8vem_diskio3.asm
  16. 2
      Source/config_n8vem_dsd.asm
  17. 2
      Source/config_n8vem_ppide.asm
  18. 2
      Source/config_n8vem_ppisd.asm
  19. 2
      Source/config_n8vem_propio.asm
  20. 2
      Source/config_n8vem_simh.asm
  21. 2
      Source/config_n8vem_std.asm
  22. 2
      Source/config_n8vem_vdu.asm
  23. 2
      Source/config_zeta_ppp.asm
  24. 2
      Source/config_zeta_std.asm
  25. 28
      Source/hbios.asm
  26. 10
      Source/loader.asm
  27. 2
      Source/std.asm
  28. 9
      Source/syscfg.asm
  29. 172
      Source/uart.asm
  30. 4
      Source/ver.inc

4
Apps/Source/Build.cmd

@ -63,9 +63,7 @@ set TGT=cpmname.com
if exist %TGT% del %TGT%
zx cz --o cpmname.a80 --DTINY cpmname
zx as cpmname.a80
zx cz --o cnamept1.a80 --DTINY cnamept1
zx as cnamept1.a80
zx ln cpmname.o cnamept1.o --ldwg --lt --lc
zx ln cpmname.o --ldwg --lt --lc
if not exist %TGT% echo *** Failed to build %TGT% *** && pause
echo.

4
Apps/Source/applvers.h

@ -5,10 +5,10 @@
#define A_RMJ 2
#define A_RMN 5
#define A_RUP 0
#define A_RTP 9
#define A_RTP 10
#define A_MONTH 5
#define A_DAY 16
#define A_DAY 17
#define A_YEAR 2013
#define A_YR 13

6
Apps/Source/applvers.lib

@ -3,14 +3,14 @@
A$RMJ equ 2
A$RMN equ 5
A$RUP equ 0
A$RTP equ 9
A$RTP equ 10
A$MONTH equ 5
A$DAY equ 16
A$DAY equ 17
A$YEAR equ 2013
date macro
dat db ' 5/16/2013$'
dat db ' 5/17/2013$'
endm
serial macro

153
Apps/Source/cnamept1.c

@ -1,153 +0,0 @@
/* cnamept1.c 5/24/2012 dwg - added bootlu */
#include "stdio.h"
#include "stdlib.h"
#include "portab.h"
#include "std.h"
#include "cnfgdata.h"
#include "syscfg.h"
extern pager();
extern char * fmthexbyte();
extern char * fmthexword();
extern char * fmtbool();
extern char * fmtenable();
extern putscpm();
char None[] = "*NONE*";
char * PltName[] = {None, "N8VEM Z80", "ZETA Z80", "N8 Z180"};
char * CIOName[] = {"UART", "ASCI", "VDU", "CVDU", "UPD7220",
"N8V", "PRPCON", "PPPCON", "CRT", "BAT", "NUL"};
char * DIOName[] = {"MD", "FD", "IDE", "ATAPI", "PPIDE",
"SD", "PRPSD", "PPPSD", "HDSK"};
char * VDAName[] = {None, "VDU", "CVDU", "UPD7220", "N8V"};
char * EmuName[] = {None, "TTY", "ANSI"};
char * TermName[] = {"TTY", "ANSI", "WYSE", "VT52"};
char * DiskMapName[] = {None, "ROM", "RAM", "FD", "IDE",
"PPIDE", "SD", "PRPSD", "PPPSD", "HDSK"};
char * ClrRamName[] = {"Never", "Auto", "Always"};
char * FDModeName[] = {None, "DIO", "ZETA", "DIDE", "N8", "DIO3"};
char * FDMediaName[] = {"720K", "1.44M", "360k", "1.2M", "1.11M"};
char * IDEModeName[] = {None, "DIO", "DIDE"};
cnamept1(pSysCfg)
struct SYSCFG * pSysCfg;
{
struct CNFGDATA * pCfg;
char buf[5];
char buf2[5];
pCfg = &(pSysCfg->cnfgdata);
printf("%s @ %dMHz, RAM=%dMB, ROM=%dMB",
PltName[pCfg->platform],
pCfg->freq,
pCfg->ramsize,
pCfg->romsize);
pager();
printf("RomWBW Version %d.%d.%d.%d, ",
pCfg->rmj, pCfg->rmn,
pCfg->rup, pCfg->rtp);
putscpm((unsigned int)pSysCfg + (unsigned int)pSysCfg->tstloc);
pager();
if (pCfg->diskboot)
printf("Disk Boot Device=%s, Unit=%d, LU=%d",
DIOName[pCfg->devunit >> 4],
pCfg->devunit & 0xF, pCfg->bootlu);
else
printf("ROM Boot");
pager();
pager();
printf("Default Console: %s, Alternate Console: %s",
CIOName[pCfg->defcon], CIOName[pCfg->altcon]);
pager();
printf ("Default Video Display: %s, Default Emulation: %s",
VDAName[pCfg->defvda], EmuName[pCfg->defemu]);
pager();
printf ("Current Terminal Type: %s",
TermName[pCfg->termtype]);
pager();
printf("Default IO Byte: 0x%s, Alternate IO Byte: 0x%s",
fmthexbyte(pCfg->defiobyte, buf),
fmthexbyte(pCfg->altiobyte, buf2));
pager();
printf("Disk Write Caching=%s, Disk IO Tracing=%s",
fmtbool(pCfg->wrtcache), fmtbool(pCfg->dsktrace));
pager();
printf("Disk Mapping Priority: %s, Clear RAM Disk: %s",
DiskMapName[pCfg->dskmap], ClrRamName[pCfg->clrramdsk]);
pager();
pager();
printf("DSKY %s", fmtenable(pCfg->dskyenable));
pager();
printf("UART %s, FIFO=%s, AFC=%s, Baudrate=0x%s",
fmtenable(pCfg->uartenable),
fmtbool(pCfg->uartfifo), fmtbool(pCfg->uartafc),
fmthexword(pCfg->baudrate, buf));
pager();
printf("VDU %s", fmtenable(pCfg->vduenable));
pager();
printf("CVDU %s", fmtenable(pCfg->cvduenable));
pager();
printf("UPD7220 %s", fmtenable(pCfg->upd7220enable));
pager();
printf("N8V %s", fmtenable(pCfg->n8venable));
pager();
pager();
printf("FD %s, Mode=%s, TraceLevel=%d, Media=%s/%s, Auto=%s",
fmtenable(pCfg->fdenable), FDModeName[pCfg->fdmode],
pCfg->fdtrace,
FDMediaName[pCfg->fdmedia], FDMediaName[pCfg->fdmediaalt],
fmtbool(pCfg->fdmauto));
pager();
printf("IDE %s, Mode=%s, TraceLevel=%d, 8bit=%s, Size=%dMB",
fmtenable(pCfg->ideenable), IDEModeName[pCfg->idemode],
pCfg->idetrace, fmtbool(pCfg->ide8bit), pCfg->idecapacity);
pager();
printf("PPIDE %s, Mode=%s, TraceLevel=%d, 8bit=%s, Slow=%s, Size=%dMB",
fmtenable(pCfg->ppideenable), IDEModeName[pCfg->ppidemode],
pCfg->ppidetrace, fmtbool(pCfg->ppide8bit),
fmtbool(pCfg->ppideslow), pCfg->ppidecapacity);
pager();
printf("PRP %s, SD %s, TraceLevel=%d, Size=%dMB, Console %s",
fmtenable(pCfg->prpenable), fmtenable(pCfg->prpsdenable),
pCfg->prpsdtrace, pCfg->prpsdcapacity,
fmtenable(pCfg->prpconenable));
pager();
printf("PPP %s, SD %s, TraceLevel=%d, Size=%dMB, Console %s",
fmtenable(pCfg->pppenable), fmtenable(pCfg->pppsdenable),
pCfg->pppsdtrace, pCfg->pppsdcapacity,
fmtenable(pCfg->pppconenable));
pager();
printf("HDSK %s, TraceLevel=%d, Size=%dMB",
fmtenable(pCfg->hdskenable),
pCfg->hdsktrace, pCfg->hdskcapacity);
pager();
pager();
printf("PPK %s, TraceLevel=%d",
fmtenable(pCfg->ppkenable), pCfg->ppktrace);
pager();
printf("KBD %s, TraceLevel=%d",
fmtenable(pCfg->kbdenable), pCfg->kbdtrace);
pager();
pager();
printf("TTY %s", fmtenable(pCfg->ttyenable));
pager();
printf("ANSI %s, TraceLevel=%d",
fmtenable(pCfg->ansienable), pCfg->ansitrace);
pager();
}
/********************/
/* eof - cnamecp1.c */
/********************/


5
Apps/Source/cnfgdata.h

@ -51,7 +51,10 @@ struct CNFGDATA {
unsigned char uartenable;
unsigned char uartfifo;
unsigned char uartafc;
unsigned int baudrate;
unsigned char ascienable;
unsigned int baudrate; /* actual baudrate / 10 */
unsigned char vduenable;

203
Apps/Source/cpmname.c

@ -1,11 +1,5 @@
/* cpmname.c 5/21/2012 dwg - */
#include "stdio.h"
#include "stdlib.h"
#include "portab.h"
#include "memory.h"
#include "globals.h"
#include "cpmbind.h"
#include "applvers.h"
#include "infolist.h"
#include "cnfgdata.h"
@ -13,22 +7,39 @@
#include "diagnose.h"
#include "std.h"
#define HIGHSEG 0x0C000 /* memory address of system config */
#define GETSYSCFG 0x0F000 /* HBIOS function for Get System Configuration */
extern cnamept1();
int line = 1;
#define HIGHSEG 0xC000 /* memory address of system config */
#define GETSYSCFG 0xF000 /* HBIOS function for Get System Configuration */
char None[] = "*None*";
char * PltName[] = {None, "N8VEM Z80", "ZETA Z80", "N8 Z180"};
char * CIOName[] = {"UART", "ASCI", "VDU", "CVDU", "UPD7220",
"N8V", "PRPCON", "PPPCON", "CRT", "BAT", "NUL"};
char * DIOName[] = {"MD", "FD", "IDE", "ATAPI", "PPIDE",
"SD", "PRPSD", "PPPSD", "HDSK"};
char * VDAName[] = {None, "VDU", "CVDU", "UPD7220", "N8V"};
char * EmuName[] = {None, "TTY", "ANSI"};
char * TermName[] = {"TTY", "ANSI", "WYSE", "VT52"};
char * DiskMapName[] = {None, "ROM", "RAM", "FD", "IDE",
"PPIDE", "SD", "PRPSD", "PPPSD", "HDSK"};
char * ClrRamName[] = {"Never", "Auto", "Always"};
char * FDModeName[] = {None, "DIO", "ZETA", "DIDE", "N8", "DIO3"};
char * FDMediaName[] = {"720K", "1.44M", "360K", "1.2M", "1.11M"};
char * IDEModeName[] = {None, "DIO", "DIDE"};
char hexchar(val, bitoff)
{
static char hexmap[] = "0123456789ABCDEF";
char hexmap[] = "0123456789ABCDEF";
return hexmap[(val >> bitoff) & 0xF];
}
char * fmthexbyte(val, buf)
unsigned char val;
char * buf;
{
buf[0] = hexmap[(val >> 4) & 0xF];
buf[1] = hexmap[(val >> 0) & 0xF];
buf[0] = hexchar(val, 4);
buf[1] = hexchar(val, 0);
buf[2] = '\0';
return buf;
@ -38,12 +49,10 @@ char * fmthexword(val, buf)
unsigned int val;
char * buf;
{
buf[0] = hexmap[(val >> 12) & 0xF];
buf[1] = hexmap[(val >> 8) & 0xF];
buf[2] = hexmap[(val >> 4) & 0xF];
buf[3] = hexmap[(val >> 0) & 0xF];
buf[4] = '\0';
buf[0] = hexchar(val, 12);
buf[1] = hexchar(val, 8);
fmthexbyte(val, buf + 2);
return buf;
}
@ -68,6 +77,7 @@ putscpm(p)
pager()
{
static int line = 1;
int i;
line++;
@ -84,36 +94,155 @@ pager()
}
}
prtcfg(pSysCfg)
struct SYSCFG * pSysCfg;
{
struct CNFGDATA * pCfg;
char buf[5];
char buf2[5];
pCfg = &(pSysCfg->cnfgdata);
printf("%s @ %dMHz, RAM=%dMB, ROM=%dMB",
PltName[pCfg->platform],
pCfg->freq,
pCfg->ramsize,
pCfg->romsize);
pager();
printf("RomWBW Version %d.%d.%d.%d, ",
pCfg->rmj, pCfg->rmn,
pCfg->rup, pCfg->rtp);
putscpm((unsigned int)pSysCfg + (unsigned int)pSysCfg->tstloc);
pager();
if (pCfg->diskboot)
printf("Disk Boot Device=%s, Unit=%d, LU=%d",
DIOName[pCfg->devunit >> 4],
pCfg->devunit & 0xF, pCfg->bootlu);
else
printf("ROM Boot");
pager();
pager();
printf("Default Console: %s, Alternate Console: %s",
CIOName[pCfg->defcon], CIOName[pCfg->altcon]);
pager();
printf ("Default Video Display: %s, Default Emulation: %s",
VDAName[pCfg->defvda], EmuName[pCfg->defemu]);
pager();
printf ("Current Terminal Type: %s",
TermName[pCfg->termtype]);
pager();
printf("Default IO Byte=0x%s, Alternate IO Byte=0x%s",
fmthexbyte(pCfg->defiobyte, buf),
fmthexbyte(pCfg->altiobyte, buf2));
pager();
printf("Disk Write Caching=%s, Disk IO Tracing=%s",
fmtbool(pCfg->wrtcache), fmtbool(pCfg->dsktrace));
pager();
printf("Disk Mapping Priority: %s, Clear RAM Disk: %s",
DiskMapName[pCfg->dskmap], ClrRamName[pCfg->clrramdsk]);
pager();
pager();
printf("DSKY %s", fmtenable(pCfg->dskyenable));
pager();
printf("UART %s, FIFO=%s, AFC=%s, Baudrate=%d0",
fmtenable(pCfg->uartenable), fmtbool(pCfg->uartfifo),
fmtbool(pCfg->uartafc), pCfg->baudrate);
pager();
printf("ASCI %s, Baudrate=%d0",
fmtenable(pCfg->ascienable), pCfg->baudrate);
pager();
printf("VDU %s", fmtenable(pCfg->vduenable));
pager();
printf("CVDU %s", fmtenable(pCfg->cvduenable));
pager();
printf("UPD7220 %s", fmtenable(pCfg->upd7220enable));
pager();
printf("N8V %s", fmtenable(pCfg->n8venable));
pager();
pager();
printf("FD %s, Mode=%s, TraceLevel=%d, Media=%s/%s, Auto=%s",
fmtenable(pCfg->fdenable), FDModeName[pCfg->fdmode],
pCfg->fdtrace,
FDMediaName[pCfg->fdmedia], FDMediaName[pCfg->fdmediaalt],
fmtbool(pCfg->fdmauto));
pager();
printf("IDE %s, Mode=%s, TraceLevel=%d, 8bit=%s, Size=%dMB",
fmtenable(pCfg->ideenable), IDEModeName[pCfg->idemode],
pCfg->idetrace, fmtbool(pCfg->ide8bit), pCfg->idecapacity);
pager();
printf("PPIDE %s, Mode=%s, TraceLevel=%d, 8bit=%s, Slow=%s, Size=%dMB",
fmtenable(pCfg->ppideenable), IDEModeName[pCfg->ppidemode],
pCfg->ppidetrace, fmtbool(pCfg->ppide8bit),
fmtbool(pCfg->ppideslow), pCfg->ppidecapacity);
pager();
printf("PRP %s, SD %s, TraceLevel=%d, Size=%dMB, Console %s",
fmtenable(pCfg->prpenable), fmtenable(pCfg->prpsdenable),
pCfg->prpsdtrace, pCfg->prpsdcapacity,
fmtenable(pCfg->prpconenable));
pager();
printf("PPP %s, SD %s, TraceLevel=%d, Size=%dMB, Console %s",
fmtenable(pCfg->pppenable), fmtenable(pCfg->pppsdenable),
pCfg->pppsdtrace, pCfg->pppsdcapacity,
fmtenable(pCfg->pppconenable));
pager();
printf("HDSK %s, TraceLevel=%d, Size=%dMB",
fmtenable(pCfg->hdskenable),
pCfg->hdsktrace, pCfg->hdskcapacity);
pager();
pager();
printf("PPK %s, TraceLevel=%d",
fmtenable(pCfg->ppkenable), pCfg->ppktrace);
pager();
printf("KBD %s, TraceLevel=%d",
fmtenable(pCfg->kbdenable), pCfg->kbdtrace);
pager();
pager();
printf("TTY %s", fmtenable(pCfg->ttyenable));
pager();
printf("ANSI %s, TraceLevel=%d",
fmtenable(pCfg->ansienable), pCfg->ansitrace);
pager();
}
int main(argc,argv)
int argc;
char *argv[];
{
hregbc = GETSYSCFG; /* function = Get System Config */
hregde = HIGHSEG; /* addr of dest (must be high) */
diagnose(); /* invoke the HBIOS function */
struct INFOLIST * pInfoList;
struct SYSCFG * pSysCfg;
printf("CPMNAME.COM %d/%d/%d v%d.%d.%d (%d)",
A_MONTH,A_DAY,A_YEAR,A_RMJ,A_RMN,A_RUP,A_RTP);
printf(" dwg - Display System Configuration");
pager();
pager();
ireghl = pGETINFO;
bioscall();
pINFOLIST = ireghl;
putscpm(pINFOLIST->banptr);
pInfoList = bioshl(20, 0, 0);
putscpm(pInfoList->banptr);
pager();
pager();
hregbc = 0xF000;
hregde = HIGHSEG;
diagnose();
cnamept1(HIGHSEG);
pSysCfg = HIGHSEG;
hregbc = GETSYSCFG; /* function = Get System Config */
hregde = pSysCfg; /* addr of dest (must be high) */
diagnose(); /* invoke the HBIOS function */
if (pSysCfg->marker != CFGMARKER)
{
printf("*** Invalid configuration data ***\r\n");
return;
}
prtcfg(pSysCfg);
}
/********************/
/* eof - ccpmname.c */
/********************/


9
Apps/Source/syscfg.h

@ -1,13 +1,7 @@
/* syscfg.h 5/23/2012 dwg - declarations for the syscfg block */
struct JMP_TAG {
unsigned char opcode;
unsigned int address;
};
struct SYSCFG {
struct JMP_TAG jmp;
unsigned int marker;
void * cnfloc;
void * tstloc;
void * varloc;
@ -16,6 +10,7 @@ struct SYSCFG {
char filler[256-3-2-2-2-sizeof(struct CNFGDATA)];
};
#define CFGMARKER 0xA33A
/******************/
/* eof - syscfg.h */

187
Source/asci.asm

@ -0,0 +1,187 @@
;
;==================================================================================================
; ASCI DRIVER (Z180 SERIAL PORTS)
;==================================================================================================
;
; CHARACTER DEVICE DRIVER ENTRY
; A: RESULT (OUT), CF=ERR
; B: FUNCTION (IN)
; C: CHARACTER (IN/OUT)
; E: DEVICE/UNIT (IN)
;
;
ASCI_DISPATCH:
LD A,C ; GET DEVICE/UNIT
AND $0F ; ISOLATE UNIT
JP Z,ASCI0
DEC A
JP Z,ASCI1
CALL PANIC
;
ASCI0:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JP Z,ASCI0_IN
DEC A
JP Z,ASCI0_OUT
DEC A
JP Z,ASCI0_IST
DEC A
JP Z,ASCI0_OST
CALL PANIC
;
;
;
ASCI_INIT:
; ASCI0
PRTS("ASCI0: IO=0x$")
LD A,CPU_TDR0
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR0
CALL PRTHEXBYTE
PRTS(" BAUD=$")
LD HL,BAUDRATE / 10
CALL PRTDEC
PRTC('0')
LD A,66H
OUT0 (CPU_ASEXT0),A
LD A,64H
OUT0 (CPU_CNTLA0),A
LD A,Z180_CNTLB0
OUT0 (CPU_CNTLB0),A
; ASCI1
CALL NEWLINE
PRTS("ASCI1: IO=0x$")
LD A,CPU_TDR1
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR1
CALL PRTHEXBYTE
PRTS(" BAUD=$")
LD HL,BAUDRATE / 10
CALL PRTDEC
PRTC('0')
LD A,66H
OUT0 (CPU_ASEXT1),A
LD A,64H
OUT0 (CPU_CNTLA1),A
LD A,Z180_CNTLB1
OUT0 (CPU_CNTLB1),A
RET
;
;
;
ASCI0_IN:
CALL ASCI0_IST
OR A
JR Z,ASCI0_IN
IN0 A,(CPU_RDR0) ; READ THE CHAR FROM THE ASCI
LD E,A
RET
;
;
;
ASCI0_IST:
; CHECK FOR ERROR FLAGS
IN0 A,(CPU_STAT0)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,ASCI0_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA0)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (CPU_CNTLA0),A
ASCI0_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT0) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
RET
;
;
;
ASCI0_OUT:
CALL ASCI0_OST
OR A
JR Z,ASCI0_OUT
LD A,E
OUT0 (CPU_TDR0),A
RET
;
ASCI0_OST:
IN0 A,(CPU_STAT0)
AND $02
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET
;
;
;
ASCI1:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JR Z,ASCI0_IN
DEC A
JR Z,ASCI0_OUT
DEC A
JR Z,ASCI0_IST
DEC A
JR Z,ASCI0_OST
CALL PANIC
;
;
;
ASCI1_IN:
CALL ASCI1_IST
OR A
JR Z,ASCI1_IN
IN0 A,(CPU_RDR1) ; READ THE CHAR FROM THE ASCI
LD E,A
RET
;
;
;
ASCI1_IST:
; CHECK FOR ERROR FLAGS
IN0 A,(CPU_STAT1)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,ASCI1_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA1)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (CPU_CNTLA1),A
ASCI1_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT1) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
RET
;
;
;
ASCI1_OUT:
CALL ASCI1_OST
OR A
JR Z,ASCI1_OUT
LD A,E
OUT0 (CPU_TDR1),A
RET
;
ASCI1_OST:
IN0 A,(CPU_STAT1)
AND $02
JR Z,ASCI1_OST
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET

28
Source/cbios.asm

@ -1933,21 +1933,27 @@ DSK_CNT .EQU DPH_CNT
;
; MAP LOGICAL TO PHYSICAL DEVICES
;
LD_TTY .EQU CIODEV_UART
#IF (PLATFORM == PLT_N8)
TTYDEV .EQU CIODEV_ASCI
#ELSE
TTYDEV .EQU CIODEV_UART
#ENDIF
;
LD_TTY .EQU TTYDEV
LD_CRT .EQU CIODEV_CRT
LD_BAT .EQU CIODEV_BAT
LD_UC1 .EQU CIODEV_UART
LD_PTR .EQU CIODEV_UART
LD_UR1 .EQU CIODEV_UART
LD_UR2 .EQU CIODEV_UART
LD_PTP .EQU CIODEV_UART
LD_UP1 .EQU CIODEV_UART
LD_UP2 .EQU CIODEV_UART
LD_LPT .EQU CIODEV_UART
LD_UL1 .EQU CIODEV_UART
LD_UC1 .EQU TTYDEV
LD_PTR .EQU TTYDEV
LD_UR1 .EQU TTYDEV
LD_UR2 .EQU TTYDEV
LD_PTP .EQU TTYDEV
LD_UP1 .EQU TTYDEV
LD_UP2 .EQU TTYDEV
LD_LPT .EQU TTYDEV
LD_UL1 .EQU TTYDEV
;
#IF (PLATFORM == PLT_N8)
LD_UC1 .SET CIODEV_UART + 1
LD_UC1 .SET CIODEV_ASCI + 1
#ENDIF
;
#IF (VDUENABLE)

6
Source/config_n8_2312.asm

@ -7,7 +7,7 @@
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, DIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, DIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -19,10 +19,12 @@ DSKMAP .EQU DM_RAM ; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD,
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

6
Source/config_n8_2511.asm

@ -7,7 +7,7 @@
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, DIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, DIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -19,10 +19,12 @@ DSKMAP .EQU DM_RAM ; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD,
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_cvdu.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_dide.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_diskio.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_diskio3.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_dsd.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_ppide.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_ppisd.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_propio.asm

@ -24,6 +24,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_simh.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU FALSE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_std.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_n8vem_vdu.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU TRUE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_zeta_ppp.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

2
Source/config_zeta_std.asm

@ -23,6 +23,8 @@ UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT

28
Source/hbios.asm

@ -15,6 +15,12 @@
;
#INCLUDE "std.asm"
;
#IF (PLATFORM == PLT_N8)
BOOTCON .EQU CIODEV_ASCI
#ELSE
BOOTCON .EQU CIODEV_UART
#ENDIF
;
;==================================================================================================
; SYSTEM INITIALIZATION
;==================================================================================================
@ -46,10 +52,10 @@ INITSYS:
LD BC,HB_SIZ ; SIZE
LDIR ; DO THE COPY
;
; DURING INITIALIZATION, CONSOLE IS UART!
; DURING INITIALIZATION, CONSOLE IS ALWAYS PRIMARY SERIAL PORT
; POST-INITIALIZATION, WILL BE SWITCHED TO USER CONFIGURED CONSOLE
;
LD A,CIODEV_UART
LD A,BOOTCON
LD (CONDEV),A
;
; PERFORM DEVICE INITIALIZATION
@ -107,6 +113,9 @@ HB_INITTBL:
#IF (UARTENABLE)
.DW UART_INIT
#ENDIF
#IF (ASCIENABLE)
.DW ASCI_INIT
#ENDIF
#IF (VDUENABLE)
.DW VDU_INIT
#ENDIF
@ -219,6 +228,10 @@ CIO_DISPATCH:
CP CIODEV_UART
JP Z,UART_DISPATCH
#ENDIF
#IF (ASCIENABLE)
CP CIODEV_ASCI
JP Z,ASCI_DISPATCH
#ENDIF
#IF (PRPENABLE & PRPCONENABLE)
CP CIODEV_PRPCON
JP Z,PRPCON_DISPATCH
@ -603,6 +616,15 @@ SIZ_UART .EQU $ - ORG_UART
.ECHO " bytes.\n"
#ENDIF
;
#IF (ASCIENABLE)
ORG_ASCI .EQU $
#INCLUDE "asci.asm"
SIZ_ASCI .EQU $ - ORG_ASCI
.ECHO "ASCI occupies "
.ECHO SIZ_ASCI
.ECHO " bytes.\n"
#ENDIF
;
#IF (VDUENABLE)
ORG_VDU .EQU $
#INCLUDE "vdu.asm"
@ -746,7 +768,7 @@ SIZ_ANSI .EQU $ - ORG_ANSI
; HBIOS GLOBAL DATA
;==================================================================================================
;
CONDEV .DB CIODEV_UART
CONDEV .DB BOOTCON
;
IDLECOUNT .DB 0
;

10
Source/loader.asm

@ -67,7 +67,7 @@ DB_BOOTLOOP:
;
; CHECK FOR CONSOLE BOOT KEYPRESS
;
#IF (UARTENABLE | VDUENABLE | (PRPENABLE & PRPCONENABLE) | (PPPENABLE & PPPCONENABLE))
#IF (UARTENABLE | ASCIENABLE | VDUENABLE | (PRPENABLE & PRPCONENABLE) | (PPPENABLE & PPPCONENABLE))
CALL CST
OR A
JR Z,DB_CONEND
@ -75,7 +75,7 @@ DB_BOOTLOOP:
CP 'S' ; SETUP
JR Z,GOSETUP
CP 'M' ; MONITOR
JR Z,GOMONUART
JR Z,GOMON
CP 'R' ; ROM BOOT
JR Z,GOROM
CP 'A' ; A-P, DISK BOOT
@ -130,7 +130,7 @@ DB_DSKYEND:
; TIMEOUT EXPIRED, PERFORM DEFAULT BOOT ACTION
LD A,BOOT_DEFAULT
CP 'M' ; MONITOR
JR Z,GOMONUART
JR Z,GOMON
CP 'R' ; ROM BOOT
JR Z,GOROM
CP 'A' ; A-P, DISK BOOT
@ -155,10 +155,10 @@ GOSETUP:
CALL WRITESTR
JP DOSETUPMENU
;
GOMONUART:
GOMON:
LD DE,STR_BOOTMON
CALL WRITESTR
JP MON_UART
JP MON_SERIAL
;
GOMONDSKY:
LD DE,STR_BOOTMON

2
Source/std.asm

@ -309,7 +309,7 @@ MON_LOC .EQU 0C000H ; LOCATION OF MONITOR FOR RUNNING SYSTEM
MON_SIZ .EQU 01000H ; SIZE OF MONITOR BINARY IMAGE
MON_END .EQU MON_LOC + MON_SIZ
MON_DSKY .EQU MON_LOC ; MONITOR ENTRY (DSKY)
MON_UART .EQU MON_LOC + 3 ; MONITOR ENTRY (UART)
MON_SERIAL .EQU MON_LOC + 3 ; MONITOR ENTRY (SERIAL PORT)
;
CBIOS_BOOT .EQU CBIOS_LOC + 0
CBIOS_WBOOT .EQU CBIOS_LOC + 3

9
Source/syscfg.asm

@ -6,9 +6,9 @@
;
#INCLUDE "std.asm"
;
.ORG 0 ; ALL ADDRESSES GENERATED WILL BE ZERO BASED
.ORG 0 ; ALL ADDRESSES GENERATED WILL BE ZERO BASED
;
JP 0 ; DUMMY JP INSTRUCTION FOR COMPATIBILITY
.DW $A33A ; MARKER TO VERIFY START OF CONFIG DATA
;
; Reserved for Configuration Information
;
@ -75,7 +75,10 @@ BOOTTIME .DB 0,0,0,0,0,0 ; SYSTEM STARTUP TIME (YY,MM,DD,HH,MM,SS)
.DB UARTENABLE
.DB UARTFIFO
.DB UARTAFC
.DW BAUDRATE
.DB ASCIENABLE
.DW BAUDRATE / 10
.DB VDUENABLE

172
Source/uart.asm

@ -3,9 +3,7 @@
; UART DRIVER (SERIAL PORT)
;==================================================================================================
;
#IF (PLATFORM != PLT_N8)
UART0_DIV .EQU (1843200 / (16 * BAUDRATE))
#ENDIF
;
; CHARACTER DEVICE DRIVER ENTRY
; A: RESULT (OUT), CF=ERR
@ -15,16 +13,6 @@ UART0_DIV .EQU (1843200 / (16 * BAUDRATE))
;
;
UART_DISPATCH:
#IF (PLATFORM == PLT_N8)
LD A,C ; GET DEVICE/UNIT
AND $0F ; ISOLATE UNIT
JP Z,UART0
DEC A
JP Z,UART1
CALL PANIC
#ENDIF
;
UART0:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JP Z,UART0_IN
@ -39,71 +27,13 @@ UART0:
;
;
UART_INIT:
#IF (PLATFORM == PLT_N8)
; ASCI0
PRTS("ASCI0: IO=0x$")
LD A,CPU_TDR0
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR0
CALL PRTHEXBYTE
PRTS(" BAUD=$")
#IF ((BAUDRATE / 100) > 0)
LD HL,BAUDRATE / 100
CALL PRTDEC
#ENDIF
#IF ((BAUDRATE % 100) < 10)
PRTC("0")
#ENDIF
LD HL,BAUDRATE % 100
CALL PRTDEC
LD A,66H
OUT0 (CPU_ASEXT0),A
LD A,64H
OUT0 (CPU_CNTLA0),A
LD A,Z180_CNTLB0
OUT0 (CPU_CNTLB0),A
; ASCI1
CALL NEWLINE
PRTS("ASCI1: IO=0x$")
LD A,CPU_TDR1
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR1
CALL PRTHEXBYTE
PRTS(" BAUD=$")
#IF ((BAUDRATE / 100) > 0)
LD HL,BAUDRATE / 100
CALL PRTDEC
#ENDIF
#IF ((BAUDRATE % 100) < 10)
PRTC("0")
#ENDIF
LD HL,BAUDRATE % 100
CALL PRTDEC
LD A,66H
OUT0 (CPU_ASEXT1),A
LD A,64H
OUT0 (CPU_CNTLA1),A
LD A,Z180_CNTLB1
OUT0 (CPU_CNTLB1),A
#ELSE
PRTS("UART0: IO=0x$")
LD A,SIO_BASE
CALL PRTHEXBYTE
PRTS(" BAUD=$")
#IF ((BAUDRATE / 100) > 0)
LD HL,BAUDRATE / 100
CALL PRTDEC
#ENDIF
#IF ((BAUDRATE % 100) < 10)
PRTC("0")
#ENDIF
LD HL,BAUDRATE % 100
LD HL,BAUDRATE / 10
CALL PRTDEC
PRTC('0')
LD A,80H
OUT (SIO_LCR),A ; DLAB ON
@ -142,8 +72,6 @@ UART_AFC2:
LD A,01H ; ENABLE AND RESET FIFOS
OUT (SIO_FCR),A ; ENABLE FIFOS
PRTS(" FIFO$")
#ENDIF
#ENDIF
RET
;
@ -153,35 +81,15 @@ UART0_IN:
CALL UART0_IST
OR A
JR Z,UART0_IN
#IF (PLATFORM == PLT_N8)
IN0 A,(CPU_RDR0) ; READ THE CHAR FROM THE UART
#ELSE
IN A,(SIO_RBR) ; READ THE CHAR FROM THE UART
#ENDIF
LD E,A
RET
;
;
;
UART0_IST:
#IF (PLATFORM == PLT_N8)
; CHECK FOR ERROR FLAGS
IN0 A,(CPU_STAT0)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,UART0_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA0)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (CPU_CNTLA0),A
UART0_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT0) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
#ELSE
IN A,(SIO_LSR) ; READ LINE STATUS REGISTER
AND $01 ; TEST IF DATA IN RECEIVE BUFFER
#ENDIF
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
@ -194,89 +102,13 @@ UART0_OUT:
OR A
JR Z,UART0_OUT
LD A,E
#IF (PLATFORM == PLT_N8)
OUT0 (CPU_TDR0),A
#ELSE
OUT (SIO_THR),A ; THEN WRITE THE CHAR TO UART
#ENDIF
RET
;
UART0_OST:
#IF (PLATFORM == PLT_N8)
IN0 A,(CPU_STAT0)
AND $02
#ELSE
IN A,(SIO_LSR) ; READ LINE STATUS REGISTER
AND $20
#ENDIF
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET
;
;
;
#IF (PLATFORM == PLT_N8)
;
UART1:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JR Z,UART0_IN
DEC A
JR Z,UART0_OUT
DEC A
JR Z,UART0_IST
DEC A
JR Z,UART0_OST
CALL PANIC
;
;
;
UART1_IN:
CALL UART1_IST
OR A
JR Z,UART1_IN
IN0 A,(CPU_RDR1) ; READ THE CHAR FROM THE UART
LD E,A
RET
;
;
;
UART1_IST:
; CHECK FOR ERROR FLAGS
IN0 A,(CPU_STAT1)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,UART1_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA1)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (CPU_CNTLA1),A
UART1_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT1) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
RET
;
;
;
UART1_OUT:
CALL UART1_OST
OR A
JR Z,UART1_OUT
LD A,E
OUT0 (CPU_TDR1),A
RET
;
UART1_OST:
IN0 A,(CPU_STAT1)
AND $02
JR Z,UART1_OST
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET
#ENDIF

4
Source/ver.inc

@ -1,6 +1,6 @@
#DEFINE RMJ 2
#DEFINE RMN 5
#DEFINE RUP 0
#DEFINE RTP 9
#DEFINE BIOSVER "2.5 - Beta 9"
#DEFINE RTP 10
#DEFINE BIOSVER "2.5 - Beta 10"
#DEFINE REVISION 412

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