diff --git a/Source/HBIOS/cfg_nabu.asm b/Source/HBIOS/cfg_nabu.asm index 786d7390..372a26cd 100644 --- a/Source/HBIOS/cfg_nabu.asm +++ b/Source/HBIOS/cfg_nabu.asm @@ -192,7 +192,7 @@ CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) TMSMODE .EQU TMSMODE_NABU80 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] -TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) +TMSTIMENABLE .EQU TRUE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) diff --git a/Source/HBIOS/nabu.asm b/Source/HBIOS/nabu.asm index ec3a1cf7..bb4db4f4 100644 --- a/Source/HBIOS/nabu.asm +++ b/Source/HBIOS/nabu.asm @@ -81,7 +81,11 @@ NABU_SETPSG: LD A,14 ; PSG R14 (PORT A DATA) OUT (NABU_RSEL),A ; SELECT IT #IF (INTMODE > 0) + #IF (TMSTIMENABLE == TRUE) + LD A,%00110000 ; ENABLE NABU KB & VDP INTS + #ELSE LD A,%00100000 ; ENABLE NABU KB INTS + #ENDIF #ELSE XOR A #ENDIF diff --git a/Source/HBIOS/tms.asm b/Source/HBIOS/tms.asm index 0fd7fac3..7b0d7815 100644 --- a/Source/HBIOS/tms.asm +++ b/Source/HBIOS/tms.asm @@ -120,7 +120,7 @@ TMS_CMDREG .EQU $A1 ; READ STATUS / WRITE REG SEL ; DEVECHO ", IO=" DEVECHO TMS_DATREG -#IF TMSTIMENABLE +#IF (TMSTIMENABLE & (INTMODE > 0)) DEVECHO ", INTERRUPTS ENABLED" #ENDIF DEVECHO "\n" @@ -268,17 +268,26 @@ TMS_INIT1: CALL NABUKB_INIT ; INITIALIZE NABU KEYBOARD DRIVER #ENDIF -#IF (INTMODE == 1 & TMSTIMENABLE) +#IF (TMSTIMENABLE & (INTMODE > 0)) +; + #IF (INTMODE == 1) ; ADD IM1 INT CALL LIST ENTRY - LD HL, TMS_TSTINT ; GET INT VECTOR + LD HL,TMS_TSTINT ; GET INT VECTOR CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST - + #ELSE + ; INSTALL VECTOR + LD HL,TMS_TSTINT + LD (IVT(INT_VDP)),HL ; IVT INDEX + #ENDIF +; LD A, (TMS_INITVDU_REG_1) SET TMSINTEN,A ; SET INTERRUPT ENABLE BIT LD (TMS_INITVDU_REG_1),A LD C, TMSCTRL1 CALL TMS_SET +; #ENDIF + ; ; ADD OURSELVES TO VDA DISPATCH TABLE LD BC,TMS_FNTBL ; BC := FUNCTION TABLE ADDRESS @@ -534,12 +543,14 @@ TMS_READ: ;---------------------------------------------------------------------- ; TMS_SET: + HB_DI OUT (TMS_CMDREG),A ; WRITE IT TMS_IODELAY LD A,C ; GET THE DESIRED REGISTER OR $80 ; SET BIT 7 OUT (TMS_CMDREG),A ; SELECT THE DESIRED REGISTER TMS_IODELAY + HB_EI RET ; ;---------------------------------------------------------------------- @@ -551,12 +562,14 @@ TMS_SET: TMS_WR: #IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO) | (TMSMODE == TMSMODE_NABU80)) ; CLEAR R#14 FOR V9958 + HB_DI XOR A OUT (TMS_CMDREG), A TMS_IODELAY LD A, $80 | 14 OUT (TMS_CMDREG), A TMS_IODELAY + HB_EI #ENDIF PUSH HL @@ -566,12 +579,14 @@ TMS_WR: RET ; TMS_RD: + HB_DI LD A,L OUT (TMS_CMDREG),A TMS_IODELAY LD A,H OUT (TMS_CMDREG),A TMS_IODELAY + HB_EI RET ; ;---------------------------------------------------------------------- @@ -1045,11 +1060,11 @@ TMS_Z180IOX: ; #ENDIF -#IF (INTMODE == 1 & TMSTIMENABLE) +#IF (TMSTIMENABLE & (INTMODE > 0)) TMS_TSTINT: - IN A, (TMS_CMDREG) ; TEST FOR INT FLAG + IN A,(TMS_CMDREG) ; TEST FOR INT FLAG AND $80 - JR NZ, TMS_INTHNDL + JR NZ,TMS_INTHNDL AND $00 ; RETURN Z - NOT HANDLED RET diff --git a/Source/ver.inc b/Source/ver.inc index 9971ed7e..93f95abc 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,7 +2,7 @@ #DEFINE RMN 5 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.5.0-dev.37" +#DEFINE BIOSVER "3.5.0-dev.38" #define rmj RMJ #define rmn RMN #define rup RUP diff --git a/Source/ver.lib b/Source/ver.lib index 4feb605b..d00f1741 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 5 rup equ 0 rtp equ 0 biosver macro - db "3.5.0-dev.37" + db "3.5.0-dev.38" endm