Tweaks to SIO and SCC Drivers

Minor improvements to hardware detection.

Source/HBIOS/scc.asm

@@ -17,6 +17,7 @@ SCC_BUFSZ	.EQU	32		; RECEIVE RING BUFFER SIZE
 ;
 SCC_NONE	.EQU	0
 SCC_SCC		.EQU	1
+SCC_ESCC	.EQU	2
 ;
 SCC_DEFBAUD	.EQU	38400		; FAILSAFE BAUD RATE
 SCC_DEFCLK	.EQU	4915200		; FAILSAVE BAUD CLOCK
@@ -43,7 +44,7 @@ SCC1_VEC	.EQU	VEC(INT_SCC1)
 #ENDIF
 ;
 #IF (SCC0MODE == SCCMODE_STD)
-SCC0A_CMD	.EQU	SCC0BASE + $01	
+SCC0A_CMD	.EQU	SCC0BASE + $01
 SCC0A_DAT	.EQU	SCC0BASE + $00
 SCC0B_CMD	.EQU	SCC0BASE + $03
 SCC0B_DAT	.EQU	SCC0BASE + $02
@@ -785,16 +786,6 @@ SCC_PROBE:
 	LD	HL,SCC_MAP		; HL POINTS TO BITMAP
 	XOR	A			; ZERO
 	LD	(SCC_MAP),A		; CLEAR CHIP PRESENT BITMAP
-	; INIT THE INT VEC REGISTER OF ALL POSSIBLE CHIPS
-	; TO ZERO.  A IS STILL ZERO.
-	LD	B,2			; WR2 REGISTER (INT VEC)
-	LD	C,SCC0B_CMD		; FIRST CHIP
-	CALL	SCC_WR			; WRITE ZERO TO CHIP REG
-#IF (SCCCNT >= 2)
-	LD	C,SCC1B_CMD		; SECOND CHIP
-	CALL	SCC_WR			; WRITE ZERO TO CHIP REG
-#ENDIF
-	; FIRST POSSIBLE CHIP
 	LD	C,SCC0B_CMD		; FIRST CHIP CMD/STAT PORT
 	CALL	SCC_PROBECHIP		; PROBE IT
 	JR	NZ,SCC_PROBE1		; IF NOT ZERO, NOT FOUND
@@ -812,18 +803,17 @@ SCC_PROBE2:
 	RET
 ;
 SCC_PROBECHIP:
-	; READ WR2 TO ENSURE IT IS ZERO (AVOID PHANTOM PORTS)
-	CALL	SCC_RD			; GET VALUE
-	AND	$F0			; ONLY TOP NIBBLE
-	RET	NZ			; ABORT IF NOT ZERO
-	; WRITE INT VEC VALUE TO WR2
-	LD	A,$FF			; TEST VALUE
+	LD	B,12			; R12 (LOW BYTE OF BRG)
+	LD	A,$A5			; TEST VAL
 	CALL	SCC_WR			; WRITE IT
-	; READ WR2 TO CONFIRM VALUE WRITTEN
-	CALL	SCC_RD			; REREAD VALUE
-	AND	$F0			; ONLY TOP NIBBLE
-	CP	$F0			; COMPARE
-	RET				; DONE, Z IF FOUND, NZ IF MISCOMPARE
+	CALL	SCC_RD			; READ IT
+	CP	$A5			; CORRECT VALUE RETURNED?
+	RET	NZ			; ABORT IF NOT
+	LD	A,$5A			; NEXT TEST VAL
+	CALL	SCC_WR			; WRITE IT
+	CALL	SCC_RD			; READ IT
+	CP	$5A			; CORRECT VALUE RETURNED?
+	RET				; RET W ZF SET AS NEEDED
 ;
 ; READ/WRITE CHIP REGISTER.  ENTER CHIP CMD/STAT PORT ADR IN C
 ; AND CHIP REGISTER NUMBER IN B.  VALUE TO WRITE IN A OR VALUE
@@ -855,8 +845,21 @@ SCC_DETECT1:
 	; RETURN CHIP TYPE
 	LD	A,SCC_NONE		; ASSUME NOTHING HERE
 	RET	NC			; IF CF NOT SET, RETURN
+	; CHECK FOR ESCC
+	LD	C,(IY+3)		; CMD/STATUS PORT
+	LD	B,9			; R9
+	LD	A,%11000000		; RESET CHIP
+	CALL	SCC_WR			; DO IT
+	LD	B,15			; R15
+	CALL	SCC_RD			; READ IT
+	CALL	PRTHEXBYTE
+	CP	$01			; ESCC?
+	JR	Z,SCC_DETECT2		; IF SO, JUMP AHEAD
 	LD	A,SCC_SCC		; CHIP TYPE IS SCC
 	RET				; DONE
+SCC_DETECT2:
+	LD	A,SCC_ESCC		; CHIP TYPE IS ESCC
+	RET
 ;
 ; COMPUTE DIVISOR TO BC
 ;
@@ -936,9 +939,11 @@ SCC_PRTCFG:
 SCC_TYPE_MAP:
 	.DW	SCC_STR_NONE
 	.DW	SCC_STR_SCC
+	.DW	SCC_STR_ESCC
 
 SCC_STR_NONE	.DB	"<NOT PRESENT>$"
-SCC_STR_SCC	.DB	"SCC$"
+SCC_STR_SCC	.DB	"8530$"
+SCC_STR_ESCC	.DB	"85230$"
 ;
 ; WORKING VARIABLES
 ;

Source/HBIOS/sio.asm

@@ -1033,16 +1033,30 @@ SIO_PROBE2:
 SIO_PROBECHIP:
 	; READ WR2 TO ENSURE IT IS ZERO (AVOID PHANTOM PORTS)
 	CALL	SIO_RD			; GET VALUE
-	AND	$F0			; ONLY TOP NIBBLE
+	AND	$F1			; AVOID VECTOR STATUS BITS
 	RET	NZ			; ABORT IF NOT ZERO
 	; WRITE INT VEC VALUE TO WR2
 	LD	A,$FF			; TEST VALUE
 	CALL	SIO_WR			; WRITE IT
 	; READ WR2 TO CONFIRM VALUE WRITTEN
 	CALL	SIO_RD			; REREAD VALUE
-	AND	$F0			; ONLY TOP NIBBLE
-	CP	$F0			; COMPARE
-	RET				; DONE, Z IF FOUND, NZ IF MISCOMPARE
+	AND	$F1			; AVOID VECTOR STATUS BITS
+	CP	$FF & $F1		; COMPARE
+	RET	NZ			; ABORT IF NOT ZERO
+	; AVOID SCC (SIO HAS NO R12)
+	PUSH	BC			; SAVE PORT/REG
+	LD	B,12			; R12 (LOW BYTE OF BRG)
+	LD	A,$A5			; TEST VAL
+	CALL	SIO_WR			; WRITE IT
+	CALL	SIO_RD			; READ IT
+	POP	BC			; RESTORE PORT/REG
+	CP	$A5			; CORRECT VALUE RETURNED?
+	JR	NZ,SIO_PROBECHIP1	; MISMATCH EXPECTED
+	OR	$FF			; SIGNAL FAILURE
+	RET				; RETURN WITH NZ
+SIO_PROBECHIP1:
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
 ;
 ; READ/WRITE CHIP REGISTER.  ENTER CHIP CMD/STAT PORT ADR IN C
 ; AND CHIP REGISTER NUMBER IN B.  VALUE TO WRITE IN A OR VALUE
@@ -1120,7 +1134,7 @@ SIO_TYPE_MAP:
 	.DW	SIO_STR_SIO
 
 SIO_STR_NONE	.DB	"<NOT PRESENT>$"
-SIO_STR_SIO	.DB	"SIO$"
+SIO_STR_SIO	.DB	"8440$"
 ;
 ; WORKING VARIABLES
 ;