diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 13be47f2..551e3362 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -12,6 +12,8 @@ Version 3.5 - WBW: Added Cowgol disk image based on the work of Ladislau Szilagyi - WBW: Added support for CP/NET on Duodyne Disk I/O - DDW: Added support for Duodyne Media board +- WBW: Auto restore TMS video on user reset (CP/M warm boot) +- L?B: Added support for NABU w/ RomWBW Option Board Version 3.4 ----------- diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf index e24171c4..ea50c203 100644 Binary files a/Doc/RomWBW Applications.pdf and b/Doc/RomWBW Applications.pdf differ diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf index 9d9afff3..99872a35 100644 Binary files a/Doc/RomWBW Disk Catalog.pdf and b/Doc/RomWBW Disk Catalog.pdf differ diff --git a/Doc/RomWBW Errata.pdf b/Doc/RomWBW Errata.pdf index 9e2d3491..3ec0d57b 100644 Binary files a/Doc/RomWBW Errata.pdf and b/Doc/RomWBW Errata.pdf differ diff --git a/Doc/RomWBW ROM Applications.pdf b/Doc/RomWBW ROM Applications.pdf index 12f702d6..d04b6903 100644 Binary files a/Doc/RomWBW ROM Applications.pdf and b/Doc/RomWBW ROM Applications.pdf differ diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf index 42bf05e3..7ec5c43e 100644 Binary files a/Doc/RomWBW System Guide.pdf and b/Doc/RomWBW System Guide.pdf differ diff --git a/Doc/RomWBW User Guide.pdf b/Doc/RomWBW User Guide.pdf index 66812307..20925a21 100644 Binary files a/Doc/RomWBW User Guide.pdf and b/Doc/RomWBW User Guide.pdf differ diff --git a/ReadMe.md b/ReadMe.md index ab035b5b..c91cec6d 100644 --- a/ReadMe.md +++ b/ReadMe.md @@ -3,7 +3,7 @@ **RomWBW ReadMe** \ Version 3.5 \ Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \ -03 Apr 2024 +03 May 2024 # Overview @@ -229,6 +229,8 @@ let me know if I missed you! - Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol that leverages RomWBW memory banking. +- Les Bird has contributed support for the NABU w/ Option Board + Contributions of all kinds to RomWBW are very welcome. # Licensing diff --git a/ReadMe.txt b/ReadMe.txt index c47f3d10..bb14f64f 100644 --- a/ReadMe.txt +++ b/ReadMe.txt @@ -1,6 +1,6 @@ RomWBW ReadMe Wayne Warthen (wwarthen@gmail.com) -03 Apr 2024 +03 May 2024 @@ -230,6 +230,8 @@ let me know if I missed you! - Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol that leverages RomWBW memory banking. +- Les Bird has contributed support for the NABU w/ Option Board + Contributions of all kinds to RomWBW are very welcome. diff --git a/Source/Apps/FAT/ReadMe.md b/Source/Apps/FAT/ReadMe.md index c54eda9f..1c76023b 100644 --- a/Source/Apps/FAT/ReadMe.md +++ b/Source/Apps/FAT/ReadMe.md @@ -1,7 +1,7 @@ # RomWBW HBIOS CP/M FAT Utility ("FAT.COM") Author: Wayne Warthen \ -Updated: 6-Jan-2024 +Updated: 6-May-2024 This application allows copying files between CP/M filesystems and FAT filesystems (DOS, Windows, Mac, Linux, etc.). The application runs on @@ -72,6 +72,38 @@ creation. - Wildcard matching in FAT filesystems is a bit unusual as implemented by FatFs. See FatFs documentation. + - The `FAT FORMAT` command will not perform a physical format on + floppy disks. You must use FDU to do this prior to using + `FAT FORMAT`. + + - Formatting (`FAT FORMAT`) of floppies does not work well. The + underlying FatFs library uses some non-standard fields. The + resulting floppy may or may not be useable on other systems. It is + best to format a FAT floppy on a Windows or DOS system. You should + have no problems copying files to/from such a floppy using `FAT`. + +### Known Issues + + - CP/M (and workalike) OSes have significant restrictions on filename + characters. The FAT application will block any attempt to create a + file on the CP/M filesystem containing any of these prohibited + characters: + +| `< > . , ; : ? * [ ] |/ \` + + The operation will be aborted with "`Error: Invalid Path Name`" if such + a filename character is encountered. + + Since MS-DOS does allow some of these characters, you can have + issues when copying files from MS-DOS to CP/M if the MS-DOS filenames + use these characters. Unfortunately, FAT is not yet smart enough to + substitute illegal characters with legal ones. So, you will need to + clean the filenames before trying to copy them to CP/M. + + - The FAT application does try to detect the scenario where you are + copying a file to itself. However, this detection is not perfect and + can corrupt a file if it occurs. Be careful to avoid this. + ### License: GNU GPLv3 (see file LICENSE.txt) @@ -123,3 +155,4 @@ creation. | 12-Oct-2023 | v0.9.9 | (beta) handle updated HBIOS Disk Device call | | 6-Jan-2024 | v1.0.0 | updated to latest FsFat (v0.15) | | | | updated to latest SDCC (v4.3) | +| 6-May-2024 | v1.1.0 | improve floppy format boot record | diff --git a/Source/Apps/FAT/fat.com b/Source/Apps/FAT/fat.com index 004760fb..9c6d2f2c 100644 Binary files a/Source/Apps/FAT/fat.com and b/Source/Apps/FAT/fat.com differ diff --git a/Source/Apps/Tune/tune.asm b/Source/Apps/Tune/tune.asm index 19f9334c..8a9d1800 100644 --- a/Source/Apps/Tune/tune.asm +++ b/Source/Apps/Tune/tune.asm @@ -47,6 +47,8 @@ ; 2022-03-20 [DDW] Add support for MBC PSG module ; 2023-03-30 [WBW] Fix for quark delay adjustment being trashed ; 2024-02-23 [WBW] Include ACR value in config table +; 2024-04-16 [WBW] Add support for NABU AY-3-8910 +; 2024-05-10 [WBW] Hack to avoid corrupting bits 6&7 of PSG R7 for NABU! ;_______________________________________________________________________________ ; ; ToDo: @@ -632,6 +634,9 @@ CFGSIZ .EQU $ - CFGTBL ; .DB 17, $A4, $A5, $A4, $FF, $A6, $FE ; DUODYNE .DW HWSTR_DUO +; + .DB 22, $41, $40, $40, $FF, $FF, $FF ; NABU + .DW HWSTR_NABU ; .DB $FF ; END OF TABLE MARKER ; @@ -661,7 +666,7 @@ TMP .DB 0 ; work around use of undocumented Z80 HBIOSMD .DB 0 ; NON-ZERO IF USING HBIOS SOUND DRIVER, ZERO OTHERWISE OCTAVEADJ .DB 0 ; AMOUNT TO ADJUST OCTAVE UP OR DOWN -MSGBAN .DB "Tune Player for RomWBW v3.6, 23-Feb-2024",0 +MSGBAN .DB "Tune Player for RomWBW v3.8, 10-May-2024",0 MSGUSE .DB "Copyright (C) 2024, Wayne Warthen, GNU GPL v3",13,10 .DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10 .DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10 @@ -687,6 +692,7 @@ HWSTR_RCMF .DB "RCBus Sound Module (MF)",0 HWSTR_LINC .DB "Z50 LiNC Sound Module",0 HWSTR_MBC .DB "NHYODYNE Sound Module",0 HWSTR_DUO .DB "DUODYNE Sound Module",0 +HWSTR_NABU .DB "NABU Onboard Sound",0 MSGUNSUP .db "MYM files not supported with HBIOS yet!\r\n", 0 @@ -2080,8 +2086,23 @@ LOUT OUT (C),A LD HL, AYREGS ; START OF VALUE LIST LOUT OUT (C), A ; SELECT REGISTER LD C, D ; POINT TO DATA PORT - OUTI ; WRITE (HL) TO DATA PORT, BUMP HL - LD C, E ; POINT TO ADDRESS PORT + + ; UGLINESS FOR NABU! WE NEED TO KEEP BIT 7 = 0, AND BIT 6 = 1 + ; FOR PSG REG 7 + CP 7 ; PSG REG 7? + JR NZ,LOUT1 ; SKIP SPECIAL PROCESSING + PUSH AF ; SAVE AF + LD A,(HL) ; GET VALUE BYTE + AND %00111111 ; FIX BITS 6 & 7 + OR %01000000 ; ... FOR NABU! + OUT (C),A ; SEND THE FIXED VALUE + DEC B ; SIMULATE THE RESET + INC HL ; ... OF OUTI + POP AF ; RESTORE AF + JR LOUT1A ; RESUME LOOP + +LOUT1 OUTI ; WRITE (HL) TO DATA PORT, BUMP HL +LOUT1A LD C, E ; POINT TO ADDRESS PORT INC A ; NEXT REGISTER CP 13 ; REG 13? JR NZ, LOUT ; IF NOT, LOOP @@ -2091,6 +2112,7 @@ LOUT OUT (C), A ; SELECT REGISTER JP M, LOUT2 ; IF BIT 7 SET, RETURN W/O WRITING VALUE LD C, D ; SELECT DATA PORT OUT (C), A ; WRITE VALUE TO REGISTER 13 + LOUT2 CALL NORMIO EI RET ; AND DONE @@ -2537,8 +2559,23 @@ upsg1: ld hl,(psource) psglp: ld c, e ; C := RSEL out (c), a ; Select register ld c, d ; C := RDAT - outi ; Set register value - inc a ; Next register + + ; ugliness for nabu! we need to keep bit 7 = 0, and bit 6 = 1 + ; for psg reg 7 + cp 7 ; psg reg 7? + jr nz,psglp1 ; if not, skip special processing + push af ; save af + ld a,(hl) ; get value byte + and %00111111 ; fix bits 6 & 7 + or %01000000 ; ... for NABU! + out (c),a ; send the fixed value + dec b ; simulate the rest + inc hl ; ... of outi + pop af ; restore af + jr psglp2 ; resume loop + +psglp1: outi ; Set register value +psglp2: inc a ; Next register ld bc, (3 * FRAG) - 1 ; Bytes to skip before next reg-1 add hl, bc ; Update HL diff --git a/Source/CBIOS/cbios.asm b/Source/CBIOS/cbios.asm index b12d859f..d1320ae0 100644 --- a/Source/CBIOS/cbios.asm +++ b/Source/CBIOS/cbios.asm @@ -2266,13 +2266,7 @@ INIT: RST 08 ; DO IT, DE=MAJ/MIN/UP/PAT LD A,D ; A := MAJ/MIN CP ((RMJ << 4) | RMN) ; MATCH? - JR NZ,INIT1 ; HANDLE VER MISMATCH - LD A,E ; A := OS UP/PAT - AND $F0 ; PAT NOT INCLUDED IN MATCH - CP (RUP << 4) ; MATCH? - JR NZ,INIT1 ; HANDLE VER MISMATCH - JR INIT2 ; ALL GOOD, CONTINUE -INIT1: + JR Z,INIT2 ; ALL GOOD, CONTINUE ; DISPLAY VERSION MISMATCH CALL NEWLINE2 ; FORMATTING LD DE,STR_VERMIS ; VERSION MISMATCH diff --git a/Source/CPM3/boot.z80 b/Source/CPM3/boot.z80 index b6f4c08d..dbb42907 100644 --- a/Source/CPM3/boot.z80 +++ b/Source/CPM3/boot.z80 @@ -96,13 +96,7 @@ init$2: rst 08 ; do it, de=maj/min/up/pat ld a,d ; a := maj/min cp ((rmj << 4) | rmn) ; match? - jr nz,init$3 ; handle ver mismatch - ld a,e ; a := os up/pat - and 0F0h ; pat not included in match - cp (rup << 4) ; match? - jr nz,init$3 ; handle ver mismatch - jr init$4 ; all good, continue -init$3: + jr z,init$4 ; all good, continue ; display version mismatch ld hl,vermis$msg ; version mismatch call ?pmsg ; display it diff --git a/Source/Doc/Applications.md b/Source/Doc/Applications.md index 5c0f03bb..a972b53e 100644 --- a/Source/Doc/Applications.md +++ b/Source/Doc/Applications.md @@ -48,8 +48,9 @@ found: | RTC | Yes | Yes | Yes | | TIMER | Yes | Yes | Yes | | CPUSPD | Yes | Yes | Yes | +| FAT | Yes | Yes | Yes | +| CLRDIR | Yes | Yes | Yes | | INTTEST | No | Yes | Yes | -| FAT | No | Yes | Yes | | TUNE | No | Yes | Yes | | WDATE | No | Yes | Yes | | HTALK | No | Yes | Yes | @@ -545,7 +546,7 @@ distribution in the Doc/Contrib directory. The application supports a significant number of EEPROM parts. It should automatically detect your part. If it does not recognize your chip, make sure that you do not have a write protect jumper set -- -this jumper can prevent the ROM chip from being recognized. +this jumper will prevent the ROM chip from being recognized. Reprogramming a ROM chip in-place is inherently dangerous. If anything goes wrong, you will be left with a non-functional system and no @@ -921,6 +922,15 @@ Files written are not verified. Wildcard matching in FAT filesystems is a bit unusual as implemented by FatFs. See FatFs documentation. +The `FAT FORMAT` command will not perform a physical format on floppy +disks. You must use FDU to do this prior to using `FAT FORMAT`. + +Formatting (`FAT FORMAT`) of floppies does not work well. The +underlying FatFs library uses some non-standard fields. The resulting +floppy may or may not be useable on other systems. It is best to format +a FAT floppy on a Windows or DOS system. You should have no problems +copying files to/from such a floppy using `FAT`. + ## Etymology The `FAT` application is an original RomWBW work, but utilizes the @@ -953,6 +963,60 @@ can corrupt a file if it occurs. Be careful to avoid this. `\clearpage`{=latex} +# CLRDIR + +`CLRDIR` is used to initialize a CP/M filesystem. This is frequently +used to prepare RomWBW disk slices for use. If there is any data +on the filesystem, it will be destroyed. `CLRDIR` works on CP/M +drive letters. To initialize a RomWBW slice, the slice must first be +assigned to a CP/M drive letter. + + +This application is provided by Max Scane. + +## Syntax + +| `CLRDIR `*``*` [options]` + +*``* is the CP/M drive letter to be cleared (e.g., "A:") + + +Options: + +| `-D`: Enable debug output +| `-Y`: Do not ask for confirmation + +## Usage + +This application has a command line interface only. Type an +appropriately formatted command at the command prompt at any of the +RomWBW CP/M operatings systems (CP/M 2.2, ZSDOS, CP/M 3, etc.). + +You will be prompted for confirmation to continue. You must type a +**capital** 'Y' to proceed. The application will confirm that the +drive has been cleared. + +If used under ZSDOS, you should issue a `RELOG` command after using +`CLRDIR` to ensure that CP/M relogs the cleared drive. + +## Notes + +This command is inherently dangerous. It will completely destroy the +directory area of the target drive. Be very careful to ensure you do +not target a drive that contains useful data. + +`CLRDIR` understands the directory formats of all of the RomWBW +CPM-like operating systems and devices including floppy disks, CF/SD +Cards, etc. + +## Etymology + +This application was written and provided by Max Scane. He +provides it in binary format and is included in the RomWBW +distribution as a binary file. + +`\clearpage`{=latex} + # TUNE If your RomWBW system has a sound card based on either an AY-3-8190 or diff --git a/Source/Doc/ROM_Applications.md b/Source/Doc/ROM_Applications.md index 7a3f1a83..cfb8ae5f 100644 --- a/Source/Doc/ROM_Applications.md +++ b/Source/Doc/ROM_Applications.md @@ -10,7 +10,7 @@ programming languages. `\clearpage`{=latex} -# ROMWBW Monitor +# RomWBW Monitor The Monitor program is a low level utility that can be used for testing and programming. It allows programs to be entered, @@ -339,8 +339,8 @@ A comprehensive instruction manual is available in the Doc\\Contrib directory. ## ROMWBW unsupported features -- Cassette loading -- Cassette saving +- This ROM-hosted implementation does not support cassette or disk + access for loading and saving programs. # TastyBASIC @@ -350,10 +350,12 @@ original source can be found here [https://github.com/dimitrit/tastybasic](https ## Features / Limitations - Integer arithmetic, numbers -32767 to 32767 - Singles letter variables A-Z - 1-dimensional array support - Strings are not supported +- This ROM-hosted implementation does not support disk access for + loading and saving programs. +- Integer arithmetic, numbers -32767 to 32767 +- Singles letter variables A-Z +- 1-dimensional array support +- Strings are not supported ## Direct Commands @@ -494,7 +496,8 @@ Due to different platform processor speeds, serials speeds and flow control cap See the ROMWBW Applications guide for additional information on performing upgrades. - ## Console Options +## Console Options + Option ( C ) - Set Console Device Option ( S ) - Set Serial Device @@ -576,7 +579,7 @@ Can be used to verify if a ROM image has been transferred and flashed correctly. In Windows, right clicking on a file should also give you a context menu option CRC SHA which will allow you to select a CRC32 calculation to be done on the selected file. -## Teraterm macro configuration +## Tera Term macro configuration Macros are a useful tool for automatic common tasks. There are a number of instances where using macros to facilitate the update process could be worthwhile if you are: @@ -595,20 +598,21 @@ crc32file crc '\\desktop\users\phillip\documents\github\romwbw\binary\sbc_std_cu sprintf '0x%08x' crc messagebox inputstr 'crc32' ``` + ## Serial speed guidelines As identified in the introduction, there are limitations on serial speed depending on processor speed and flow control settings. Listed below are some of the results identified during testing. Platform / Configuration | Processor Speed | Maximum Serial Speed -------------------------------|-----------------|--------------------- -Sbc-v2 uart no flow control | 2mhz | 9600 -sbc-v2 uart no flow control | 4mhz | 19200 -sbc-v2 uart no flow control | 5mhz | 19200 -sbc-v2 uart no flow control | 8mhz | 38400 -sbc-v2 uart no flow control | 10mhz | 38400 -sbc-v2 usb-fifo 2mhz+ | | n/a -sbc-mk4 asci no flow control | 18.432mhz | 9600 -sbc-mk4 asci with flow control | 18.432mhz | 38400 +SBC-V2 UART no flow control | 2mhz | 9600 +SBC-V2 UART no flow control | 4mhz | 19200 +SBC-V2 UART no flow control | 5mhz | 19200 +SBC-V2 UART no flow control | 8mhz | 38400 +SBC-V2 UART no flow control | 10mhz | 38400 +SBC-V2 USB-FIFO 2mhz+ | | n/a +SBC-MK4 ASCI no flow control | 18.432mhz | 9600 +SBC-MK4 ASCI with flow control | 18.432mhz | 38400 The **Set Recommend Baud Rate** option in the Updater menu follows the following guidelines. @@ -623,9 +627,9 @@ These can be customized in the updater.asm source code in the CLKTBL table if d Feedback to the ROMWBW developers on these guidelines would be appreciated. ## Notes: -All testing was done with Teraterm x-modem, Forcing checksum mode using macros was found to give the most reliable transfer. -Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before being written. -An SBC V2-005 MegaFlash or Z80 MBC required for 1mb flash support. The Updater assumes both chips are same type -Failure handling has not been tested. -Timing broadly calibrated on a Z80 SBC-v2 -Unabios not supported +- All testing was done with Teraterm x-modem, Forcing checksum mode using macros was found to give the most reliable transfer. +- Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before being written. +- An SBC V2-005 MegaFlash or Z80 MBC required for 1mb flash support. The Updater assumes both chips are same type +- Failure handling has not been tested. +- Timing broadly calibrated on a Z80 SBC-v2 +- UNA BIOS not supported diff --git a/Source/Doc/ReadMe.md b/Source/Doc/ReadMe.md index 81a18cf7..61783118 100644 --- a/Source/Doc/ReadMe.md +++ b/Source/Doc/ReadMe.md @@ -220,6 +220,8 @@ please let me know if I missed you! * Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol that leverages RomWBW memory banking. +* Les Bird has contributed support for the NABU w/ Option Board + Contributions of all kinds to RomWBW are very welcome. # Licensing diff --git a/Source/Doc/UserGuide.md b/Source/Doc/UserGuide.md index 21084d99..04ba281f 100644 --- a/Source/Doc/UserGuide.md +++ b/Source/Doc/UserGuide.md @@ -263,6 +263,7 @@ is discussed in [Customizing RomWBW]. | [Duodyne Z80 System]^1^ | Duo | DUO_std.rom | 38400 | | [Heath H8 Z80 System]^10^ | H8 | HEATH_std.rom | 115200 | | [EP Mini-ITX Z180]^11^ | RCBus? | EPITX_std.rom | 115200 | +| [NABU w/ RomWBW Option Board]^10^ | NABU | NABU_std.rom | 115200 | | ^1^Designed by Andrew Lynch | ^2^Designed by Sergey Kiselev @@ -630,6 +631,7 @@ prompt: | CP/M 2.2 | Digital Research CP/M 2.2 OS | | Z-System | ZSDOS 1.1 w/ ZCPR 1 (Enhanced CP/M compatible OS) | | Forth | Brad Rodriguez's ANSI compatible Forth language | +| BASIC | Microsoft ROM BASIC | | Tasty BASIC | Dimitri Theuling's Tiny BASIC implementation | | Play | A simple video game (requires ANSI terminal emulation) | | Network Boot | Boot system via Wiznet MT011 device | @@ -649,9 +651,17 @@ in the ROM (CP/M 2.2 & Z-System) are described in the Operating Systems chapter of this document. In general, the command to exit any of these applications and restart -the system is `BYE`. The exceptions are the Monitor which uses `B` and +the system is `BYE`. The exceptions are the Monitor which uses `X` and Play which uses `Q`. +**NOTE:** Of the ROM Applications, only the operating systems (CP/M and +Z-System) have the ability to interact with disk drives. So, other than +these 2 OSes, the ROM Applications do **not** have any way to save or +load data from peristent/disk storage. For example, if you launch BASIC +from the Boot Loader, you will not be able to save or load your +programs. You will need to start an operating system first and then run +BASIC in order to save or load programs. + Two of the ROM Applications are, in fact, complete operating systems. Specifically, "CP/M 2.2" and "Z-System" are provided so that you can actually start either operating system directly from your ROM. This @@ -1108,11 +1118,11 @@ system. The drive letter assignments **do not** change during an OS session unless you use the `ASSIGN` command yourself to do it. Additionally, the - assignments at boot will stay the same on each boot as long as you do +assignments at boot will stay the same on each boot as long as you do not make changes to your hardware configuration. Note that the assignments **are** dependent on the media currently inserted in hard disk drives when the operating system is started. So, notice that if you - insert or remove an SD Card, CF Card or USB Drive, the drive +insert or remove an SD Card, CF Card or USB Drive, the drive assignments will change. Since drive letter assignments can change, you must be careful when doing destructive things like using `CLRDIR` to make sure the drive letter you use is referring to the desired media. @@ -1394,15 +1404,24 @@ filesystem format used is 8MB. This ensures any filesystem will be accessible to any of the operating systems. Since storage devices today are quite large, RomWBW implements a -mechanism called slicing to allow up to 256 8MB filesystems on a -single large storage device. This allows up to 2GB of usable space on +mechanism called slicing to allow up to 256 8MB CP/M filesystems on a +single large storage device. To say it another way, the media is +"sliced up" into many 8MB CP/M filesystems. Each slice is a complete +CP/M filesystem. This allows up to 2GB of usable space on one media. You can think of slices as a way to refer to any of -the first 256 8MB chunks of space on a single media. +the first 256 8MB chunks of space on a single media. Each chunk +is a CP/M filesystem. + +Note that slices are **not** the same thing as a hard disk partition. +In fact, these slices all live inside of a single hard disk partition. +Normally, a RomWBW hard disk will have one partition (called the +RomWBW partition) containing 64 slices. Optionally, there may be +a second partition which contains a FAT filesystem. For now, we +are just talking about the slices within the single RomWBW partition. -Note that although you can use up to 256 slices per physical disk, this -large number of slices is rarely used. The recommended RomWBW disk -layout provides for 64 slices which is more than enough for most -use cases. +Although you can use up to 256 slices per physical disk, this large +number of slices is rarely used. The recommended RomWBW disk layout +provides for 64 slices which is more than enough for most use cases. Of course, the problem is that CP/M-like operating systems have only 16 drive letters (A:-P:) available. Under the covers, RomWBW allows @@ -1438,22 +1457,28 @@ the same device/slice at the same time. Second, there must always be a drive assigned to A:. Any attempt to violate these rules will be blocked by the `ASSIGN` command. +As you see, the name of a slice does not reference the hard disk +partition containing the slices. Since there can only be a single +RomWBW partition containing slices on any disk, the partition is +determined automatically. + In case this wasn't already clear, you **cannot** refer directly to slices using CP/M. CP/M only understands drive letters, so to access a given slice, you must assign a drive letter to it first. -While it may be obvious, you cannot use slices on any media less -than 8MB in size. Specifically, you cannot slice RAM disks, ROM -disks, floppy disks, etc. All of these are considered to have a single -slice and any attempt to ASSIGN a drive letter to a slice beyond that -will result in an error message. +While it may be obvious, you cannot use slices on any media less than +8MB in size. Specifically, you cannot slice RAM disks, ROM disks, floppy + disks, etc. All of these are considered to have a single slice (slice +0) and any attempt to ASSIGN a drive letter to a slice beyond that will +fail and produce an error message. It is very important to understand that RomWBW slices are not individually created or allocated on your hard disk. RomWBW uses a -single, large chunk of space on your hard disk to contain the slices. -You should think of slices as just an index into a sequential set of 8MB -areas that exist in this large chunk of space. The next section will -go into more detail on how slices are located on your hard disk. +single, large chunk of space (partition) on your hard disk to contain +the slices. You should think of slices as just an index into a +sequential set of 8MB areas that exist in this large chunk of space. +The next section will go into more detail on how slices are located on +your hard disk. Although you do not need to allocate slices individually, you do need to initialize each slice for CP/M to use it. This is somewhat analogous @@ -1465,10 +1490,10 @@ absolutely sure you know what media and slice are assigned to that drive letter before using `CLRDIR` because CLRDIR will wipe out any pre-existing contents of the slice. -**WARNING**: The `CLRDIR` application does not appear to check for -disk errors when it runs. If you attempt to run `CLRDIR` on a drive -that is mapped to a slice that does not actually fit on the physical -disk, it may behave erratically. +**WARNING**: Earlier versions of the `CLRDIR` application does not +appear to check for disk errors when it runs. If you attempt to run +`CLRDIR` on a drive that is mapped to a slice that does not actually fit +on the physical disk, it may behave erratically. Here is an example of using `CLRDIR`. In this example, the `ASSIGN` command is used to show the current drive letter assignments. Then @@ -1488,10 +1513,10 @@ B>assign H:=IDE0:3 B>clrdir G: -CLRDIR Version 1.2 April 2020 by Max Scane +CLRDIR Version 1.2B May 2024 by Max Scane Warning - this utility will overwrite the directory sectors of Drive: G -Type Y to proceed, any key other key to exit. Y +Type CAPITAL Y to proceed, any key other key to exit. Y Directory cleared. B> ``` @@ -1695,9 +1720,9 @@ transferring your files over individually. You use your modern computer (Windows, Linux, MacOS) to write the disk image onto the disk media, then just move the media over to your system. -The disk image files are found in the Binary directory of the -distribution. Floppy disk images are prefixed with "fd_" and hard -disk images are prefixed with either "hd512_" or "hd1k_" depending on the +The disk image files are found in the Binary directory of the +distribution. Floppy disk images are prefixed with "fd_" and hard disk +images are prefixed with either "hd512_" or "hd1k_" depending on the hard disk layout they are for. Each disk image has the complete set of normal applications and tools @@ -1968,10 +1993,12 @@ custom hard disk image file, it will need to be written to the media using your modern computer. Note that you **do not** run `CLRDIR` or `SYSCOPY` on the slices that contain the data. When using this method, the disk will be partitioned and setup with 1 or more slices containing -ready-to-run bootable operating systems. +ready-to-run bootable operating systems. You **do** need to run +`CLRDIR` and optionally `SYSCOPY` on slices that are not part of the +image (slices beyond the ones included with the image). To write a hard disk image file onto your actual media (actual hard disk - or CF/SD/USB Media), you need to use an image writing utility on your +or CF/SD/USB Media), you need to use an image writing utility on your modern computer. Your modern computer will need to have an appropriate interface or slot that accepts the media. To actually copy the image, you can use the `dd` command on Linux or MacOS. On Windows, in the @@ -2254,7 +2281,7 @@ significant improvements such as date/time stamping of files. Z-System is a somewhat ambiguous term because there are multiple generations of this software. RomWBW Z-System is a combination of both -ZCPR-DJ (the CCP) and ZSDOS 1.1 (the BDOS) when referring to Z-System. +ZCPR-DJ (the CCP) and ZSDOS 1.1 (the BDOS) when referring to Z-System. The latest version of Z-System (ZCPR 3.4) is also provided with RomWBW via the NZ-COM adaptation (see below). @@ -2469,7 +2496,7 @@ CP/M 3 and ZCPR 3. To create (or update) a ZPM3 boot drive, you must place `ZPMLDR.SYS` on the system track of the disk. You must also place `CPM3.SYS`, `ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM` on the target drive as -regular files. Do **not** place CPM3.SYS on the boot track. +regular files. Do **not** place CPM3.SYS on the boot track. `ZPMLDR.SYS` chain loads `CPM3.SYS` which must exist as a regular file on the disk. Subsequently, `CPM3.SYS` loads `CCP.COM`. @@ -2548,9 +2575,9 @@ the QP/M components. To do this, you can perform the following steps: 1. Use RomWBW `SYSCOPY` to place the stock RomWBW CP/M OS image onto the system tracks of the QP/M boot disk: - + `SYSCOPY A:=x:CPM.SYS` - + where x is the drive letter of your ROM Disk. 1. Run `QINSTALL` to overlay the QP/M OS components on your @@ -2708,11 +2735,11 @@ To boot into Fuzix: ``` RCBus [RCZ180_nat_wbw] Boot Loader FP Switches = 0x00 - + Boot [H=Help]: 2 - + Booting Disk Unit 2, Slice 0, Sector 0x00000000... - + Volume "Fuzix 126 Loader" [0xF200-0xF400, entry @ 0xF200]... FUZIX version 0.4 Copyright (c) 1988-2002 by H.F.Bower, D.Braun, S.Nitschke, H.Peraza @@ -2741,13 +2768,13 @@ To boot into Fuzix: Enter new date: Current time is 13:30:24 Enter new time: - + ^ ^ n n Fuzix 0.4 >@< Welcome to Fuzix m m - + login: ``` @@ -2756,7 +2783,7 @@ To boot into Fuzix: ``` login: root - + Welcome to FUZIX. # ``` @@ -2840,7 +2867,7 @@ This application understands both FAT filesystems as well as CP/M filesystems. characters are **not permitted** in a CP/M filename: `< > . , ; : = ? * [ ] _ % | ( ) / \` - + The FAT application does not auto-rename files when it encounters invalid filenames. It will just issue an error and quit. Additionally, the error message is not very clear about the problem. @@ -2915,8 +2942,8 @@ computer and access it using `FAT` based on its RomWBW unit number. **WARNING**: Microsoft Windows will sometimes suggest reformatting partitions that it does not recognize. If you are prompted to format a partition of your SD/CF/USB Media when inserting the card into a Windows - computer, you probably want to select Cancel. - +computer, you probably want to select Cancel. + ## FAT Application Usage Complete instructions for the `FAT` application are found in $doc_apps$. @@ -3392,7 +3419,7 @@ The document is called "dri-cpnet.pdf". Under CP/M 2.2, you will start the networking client using the command `CPNETLDR`. Under CP/M 3, you use the command `NDOS3`. If that works, you can map network drives as local drives using the `NETWORK` command. -The `CPNETSTS` command is useful for displaying the current status. +The `CPNETSTS` command is useful for displaying the current status. Here is a sample session from CP/M 2.2: ``` @@ -4183,6 +4210,8 @@ please let me know if I missed you! * Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol that leverages RomWBW memory banking. +* Les Bird has contributed support for the NABU w/ Option Board + Contributions of all kinds to RomWBW are very welcome. # Licensing @@ -5820,6 +5849,36 @@ S- MD: TYPE=RAM `\clearpage`{=latex} +### NABU w/ RomWBW Option Board + +#### ROM Image File: NABU_std.rom + +| | | +|-------------------|---------------| +| Default CPU Speed | 3.580 MHz | +| Interrupts | Mode 1 | +| System Timer | None | +| Serial Default | 115200 Baud | +| Memory Manager | Z2 | +| ROM Size | 512 KB | +| RAM Size | 512 KB | + +##### Supported Hardware (see [Appendix B - Device Summary]): + +- UART: MODE=NABU, IO=72 +- TMS: MODE=NABU, IO=160 +- MD: TYPE=RAM +- MD: TYPE=ROM +- PPIDE: IO=96, MASTER +- PPIDE: IO=96, SLAVE +- AY38910: MODE=NABU, IO=65, CLOCK=1789772 HZ + +##### Notes: + +- TMS video assumes F18A replacement for TMS9918 + +`\clearpage`{=latex} + ## Appendix B - Device Summary The table below briefly describes each of the possible devices that diff --git a/Source/HBIOS/Bank Layout.txt b/Source/HBIOS/Bank Layout.txt index 01bff19a..a3a40d57 100644 --- a/Source/HBIOS/Bank Layout.txt +++ b/Source/HBIOS/Bank Layout.txt @@ -27,7 +27,7 @@ Bank ID Module Start Size 0x04 - N ROM Disk Data -Typical ROM Bank Layout +Typical ROM Bank Layout (512K) Bank ID Usage ------- ------ @@ -35,22 +35,43 @@ Bank ID Usage 0x01 ROM Loader, Monitor, ROM OSes 0x02 ROM Applications 0x03 Reserved -0x04-0x0F ROM Disk Banks +0x04-0x0F ROM Disk Banks (12) -Typical RAM Bank Layout +Standard RAM Bank Layout (512K) Bank ID Usage ------- ------ 0x80 RomWBW HBIOS -0x81-0x8B RAM Disk Data +0x81-0x88 RAM Disk Data (3) +0x89-0x8B App Banks (8) 0x8C CP/M 3 Buffers 0x8D CP/M 3 OS 0x8E User TPA 0x8F Common +Large RAM Bank Layout (2048K) -Typical ROMless Bank Layout +Bank ID Usage +------- ------ +0x80 RomWBW HBIOS +0x81-0xB0 RAM Disk Data (30) +0xB1-0xBB App Banks (11) +0xBC CP/M 3 Buffers +0x8D CP/M 3 OS +0x8E User TPA +0x8F Common + +Tiny RAM Bank Layout (128K) + +Bank ID Usage +------- ------ +0x80 RomWBW HBIOS +0x81 CP/M 3 OS +0x82 User TPA +0x83 Common + +ROMless Standard Bank Layout (512K) Bank ID Usage ------- ------ @@ -58,7 +79,7 @@ Bank ID Usage 0x81 Loader, DbgMon, CP/M 2.2, ZSDOS 0x82 ROM Apps 0x83 More ROM Apps -0x84-0x8B RAM Disk Data +0x84-0x8B RAM Disk Data (8) 0x8C CP/M 3 Buffers 0x8D CP/M 3 OS 0x8E User TPA diff --git a/Source/HBIOS/Build.cmd b/Source/HBIOS/Build.cmd index ef862852..4d101a96 100644 --- a/Source/HBIOS/Build.cmd +++ b/Source/HBIOS/Build.cmd @@ -50,6 +50,7 @@ echo. :: tasm -t80 -g3 -dCMD hbios_env.asm hbios_env.com hbios_env.lst || exit /b +zxcc hbios_env zxcc hbios_env >hbios_env.cmd call hbios_env.cmd @@ -241,6 +242,7 @@ call Build S100 std || exit /b call Build DUO std || exit /b call Build HEATH std || exit /b call Build EPITX std || exit /b +call Build NABU std || exit /b :: call Build MON std || exit /b goto :eof diff --git a/Source/HBIOS/Build.ps1 b/Source/HBIOS/Build.ps1 index 41ac2de1..ec8bf51d 100644 --- a/Source/HBIOS/Build.ps1 +++ b/Source/HBIOS/Build.ps1 @@ -27,7 +27,7 @@ $ErrorAction = 'Stop' # UNA BIOS is simply imbedded, it is not built here. # -$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON" +$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU" $PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "S100", "EPITX" $PlatformListZ280 = "RCZ280" diff --git a/Source/HBIOS/Build.sh b/Source/HBIOS/Build.sh index 4f2a4a31..892640d0 100755 --- a/Source/HBIOS/Build.sh +++ b/Source/HBIOS/Build.sh @@ -50,6 +50,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh ROM_PLATFORM="HEATH"; ROM_CONFIG="std"; bash Build.sh ROM_PLATFORM="EPITX"; ROM_CONFIG="std"; bash Build.sh + ROM_PLATFORM="NABU"; ROM_CONFIG="std"; bash Build.sh # ROM_PLATFORM="MON"; ROM_CONFIG="std"; bash Build.sh exit fi diff --git a/Source/HBIOS/Config/DUO_std.asm b/Source/HBIOS/Config/DUO_std.asm index 855735ea..f6e91f0b 100644 --- a/Source/HBIOS/Config/DUO_std.asm +++ b/Source/HBIOS/Config/DUO_std.asm @@ -31,7 +31,7 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP ; INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; -;;;DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM) +DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM) ; BATCOND .SET TRUE ; ENABLE LOW BATTERY WARNING MESSAGE ; @@ -44,4 +44,8 @@ MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM ; UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 ; -ESPENABLE .SET TRUE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM) +SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +; +CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT +; +ESPENABLE .SET FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM) diff --git a/Source/HBIOS/Config/NABU_std.asm b/Source/HBIOS/Config/NABU_std.asm new file mode 100644 index 00000000..8731dc6a --- /dev/null +++ b/Source/HBIOS/Config/NABU_std.asm @@ -0,0 +1,32 @@ +; +;================================================================================================== +; NABU Z80 STANDARD CONFIGURATION +;================================================================================================== +; +; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE +; CFG_.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS +; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE +; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. +; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE _XXX.ASM AND SPECIFY +; YOUR FILE IN THE BUILD PROCESS. +; +; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. +; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO +; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON +; SETTINGS. +; +; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, +; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING +; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! +; +; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO +; DIRECTORIES ABOVE THIS ONE). +; +#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON OR AUTO BOOT +; +#include "cfg_nabu.asm" +; +CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +; +TMSMODE .SET TMSMODE_NABU80 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] + diff --git a/Source/HBIOS/Config/SCZ180_sc700.asm b/Source/HBIOS/Config/SCZ180_sc700.asm index 88f38f37..d3d6284c 100644 --- a/Source/HBIOS/Config/SCZ180_sc700.asm +++ b/Source/HBIOS/Config/SCZ180_sc700.asm @@ -36,6 +36,7 @@ Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3) Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) ; LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED) +LEDMODE .SET LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .SET $0E ; STATUS LED PORT ADDRESS ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS diff --git a/Source/HBIOS/acia.asm b/Source/HBIOS/acia.asm index ee2e4ba6..dab9d31e 100644 --- a/Source/HBIOS/acia.asm +++ b/Source/HBIOS/acia.asm @@ -705,12 +705,12 @@ ACIA0_CFG: .DW (ACIA0CLK / ACIA0DIV) & $FFFF ; CLOCK FREQ AS .DW (ACIA0CLK / ACIA0DIV) >> 16 ; ... DWORD VALUE ; - .ECHO "ACIA: IO=" - .ECHO ACIA0BASE + DEVECHO "ACIA: IO=" + DEVECHO ACIA0BASE #IF (INTMODE == 1) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; ACIA_CFGSIZ .EQU $ - ACIA_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -728,12 +728,12 @@ ACIA1_CFG: .DW (ACIA1CLK / ACIA1DIV) & $FFFF ; CLOCK FREQ AS .DW (ACIA1CLK / ACIA1DIV) >> 16 ; ... DWORD VALUE ; - .ECHO "ACIA: IO=" - .ECHO ACIA1BASE + DEVECHO "ACIA: IO=" + DEVECHO ACIA1BASE #IF (INTMODE == 1) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; #ENDIF ; diff --git a/Source/HBIOS/ansi.asm b/Source/HBIOS/ansi.asm index f6a9dc88..8ca7e7f5 100644 --- a/Source/HBIOS/ansi.asm +++ b/Source/HBIOS/ansi.asm @@ -149,8 +149,20 @@ ANSI_IN1: ; PERFORM ACTUAL KEYBOARD INPUT LD B,BF_VDAKRD ; SET FUNCTION TO KEYBOARD READ CALL ANSI_VDADISP ; CALL VDA DISPATCHER LD A,E ; CHARACTER READ INTO A +; +; THE NABU USES KEYBOARD CODES TO REPORT JOYSTICK ACTIVITY USING +; VALUES $A0-$BF. NORMALLY, WE WOULD PROCESS ANYTHING OVER $80 AS +; A SPECIAL CHAR AND WIND UP IGNORING $80-$DF. FOR NABU, WE ALLOW +; ANYTHING LESS THAN $E0 TO BE RETURNED TO THE APPLICATION FOR +; JOYSTICK PROCESSING. +; +#IF (PLATFORM == PLT_NABU) + CP $E0 ; >= $E0 IS SPECIAL KEY + JR NC,ANSI_IN2 ; HANDLE SPECIAL KEY +#ELSE BIT 7,A ; TEST HIGH BIT JR NZ,ANSI_IN2 ; HANDLE $80 OR HIGHER AS SPECIAL CHAR +#ENDIF XOR A ; OTHERWISE, SIGNAL SUCCESS RET ; AND RETURN THE KEY ; diff --git a/Source/HBIOS/asci.asm b/Source/HBIOS/asci.asm index eb5d737f..5f6c00dd 100644 --- a/Source/HBIOS/asci.asm +++ b/Source/HBIOS/asci.asm @@ -618,7 +618,7 @@ ASCI_DETECT: ; Z180 DIVISOR IS ALWAYS A FACTOR OF 160 ; ; CNTLB= XXPXDSSS -; FAILSAVE = 00100000 +; FAILSAFE = 00100000 ; ; PS (PRESCALE): 0=/10, 1=/30 ; DR (DIVIDE RATIO): 0=/16, 1=/64 @@ -837,12 +837,12 @@ ASCI1_CFG: .DW ASCI1CFG ; LINE CONFIGURATION .DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "ASCI: IO=" - .ECHO ASCI1_BASE + DEVECHO "ASCI: IO=" + DEVECHO ASCI1_BASE #IF ((ASCIINTS) & (INTMODE >0)) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -855,12 +855,12 @@ ASCI0_CFG: .DW ASCI0CFG ; LINE CONFIGURATION .DW ASCI0_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "ASCI: IO=" - .ECHO ASCI0_BASE + DEVECHO "ASCI: IO=" + DEVECHO ASCI0_BASE #IF ((ASCIINTS) & (INTMODE >0)) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; #ELSE ; @@ -873,12 +873,12 @@ ASCI0_CFG: .DW ASCI0CFG ; LINE CONFIGURATION .DW ASCI0_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "ASCI: IO=" - .ECHO ASCI0_BASE + DEVECHO "ASCI: IO=" + DEVECHO ASCI0_BASE #IF ((ASCIINTS) & (INTMODE >0)) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -891,12 +891,12 @@ ASCI1_CFG: .DW ASCI1CFG ; LINE CONFIGURATION .DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "ASCI: IO=" - .ECHO ASCI1_BASE + DEVECHO "ASCI: IO=" + DEVECHO ASCI1_BASE #IF ((ASCIINTS) & (INTMODE > 0)) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; #ENDIF ; diff --git a/Source/HBIOS/ay38910.asm b/Source/HBIOS/ay38910.asm index cc8fac44..bd2671b9 100644 --- a/Source/HBIOS/ay38910.asm +++ b/Source/HBIOS/ay38910.asm @@ -21,14 +21,14 @@ ; AY_RCSND .EQU 0 ; 0 = EB MODULE, 1=MF MODULE ; - .ECHO "AY38910: MODE=" + DEVECHO "AY38910: MODE=" ; #IF (AYMODE == AYMODE_SCG) AY_RSEL .EQU $9A AY_RDAT .EQU $9B AY_RIN .EQU AY_RSEL AY_ACR .EQU $9C - .ECHO "SCG" + DEVECHO "SCG" #ENDIF ; #IF (AYMODE == AYMODE_N8) @@ -36,35 +36,35 @@ AY_RSEL .EQU $9C AY_RDAT .EQU $9D AY_RIN .EQU AY_RSEL AY_ACR .EQU N8_ACR - .ECHO "N8" + DEVECHO "N8" #ENDIF ; #IF (AYMODE == AYMODE_RCZ80) AY_RSEL .EQU $D8 AY_RDAT .EQU $D0 AY_RIN .EQU AY_RSEL+AY_RCSND - .ECHO "RCZ80" + DEVECHO "RCZ80" #ENDIF ; #IF (AYMODE == AYMODE_RCZ180) AY_RSEL .EQU $68 AY_RDAT .EQU $60 AY_RIN .EQU AY_RSEL+AY_RCSND - .ECHO "RCZ180" + DEVECHO "RCZ180" #ENDIF ; #IF (AYMODE == AYMODE_MSX) AY_RSEL .EQU $A0 AY_RDAT .EQU $A1 AY_RIN .EQU $A2 - .ECHO "MSX" + DEVECHO "MSX" #ENDIF ; #IF (AYMODE == AYMODE_LINC) AY_RSEL .EQU $33 AY_RDAT .EQU $32 AY_RIN .EQU $32 - .ECHO "LINC" + DEVECHO "LINC" #ENDIF ; #IF (AYMODE == AYMODE_MBC) @@ -72,7 +72,7 @@ AY_RSEL .EQU $A0 AY_RDAT .EQU $A1 AY_RIN .EQU AY_RSEL AY_ACR .EQU $A2 - .ECHO "MBC" + DEVECHO "MBC" #ENDIF ; #IF (AYMODE == AYMODE_DUO) @@ -80,14 +80,21 @@ AY_RSEL .EQU $A4 AY_RDAT .EQU $A5 AY_RIN .EQU AY_RSEL AY_ACR .EQU $A6 - .ECHO "DUO" + DEVECHO "DUO" #ENDIF ; - .ECHO ", IO=" - .ECHO AY_RSEL - .ECHO ", CLOCK=" - .ECHO AY_CLK - .ECHO " HZ\n" +#IF (AYMODE == AYMODE_NABU) +AY_RSEL .EQU $41 +AY_RDAT .EQU $40 +AY_RIN .EQU $40 + DEVECHO "NABU" +#ENDIF +; + DEVECHO ", IO=" + DEVECHO AY_RSEL + DEVECHO ", CLOCK=" + DEVECHO AY_CLK + DEVECHO " HZ\n" ; ;====================================================================== ; @@ -271,8 +278,14 @@ AY_TIMTIK .DB 0 ; COUNT DOWN TO FINISH BOOT BEEP ;====================================================================== ; AY_INIT: +#IF (AYMODE == AYMODE_NABU) + ; I/O B=INPUT, I/O A=OUTPUT, NOISE CHANNEL C, B, A DISABLE, TONE CHANNEL C, B, A ENABLE + LD DE,(AY_R7ENAB*256)+$78 ; SET MIXER CONTROL / IO ENABLE. $78 - 01 111 000 +#ELSE + ; I/O PORTS = OUTPUT, NOISE CHANNEL C, B, A DISABLE, TONE CHANNEL C, B, A ENABLE LD DE,(AY_R7ENAB*256)+$F8 ; SET MIXER CONTROL / IO ENABLE. $F8 - 11 111 000 - JP AY_WRTPSG ; I/O PORTS = OUTPUT, NOISE CHANNEL C, B, A DISABLE, TONE CHANNEL C, B, A ENABLE +#ENDIF + JP AY_WRTPSG ; AY_CHKREDY: LD A, (AY_READY) diff --git a/Source/HBIOS/bqrtc.asm b/Source/HBIOS/bqrtc.asm index 51fd677f..233faeab 100644 --- a/Source/HBIOS/bqrtc.asm +++ b/Source/HBIOS/bqrtc.asm @@ -91,9 +91,9 @@ BQRTC_UTI .EQU %00001000 BQRTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS) - .ECHO "BQRTC: IO=" - .ECHO BQRTC_BASE - .ECHO "\n" + DEVECHO "BQRTC: IO=" + DEVECHO BQRTC_BASE + DEVECHO "\n" ; RTC Device Initialization Entry diff --git a/Source/HBIOS/cfg_duo.asm b/Source/HBIOS/cfg_duo.asm index 4decaa5c..4843f81b 100644 --- a/Source/HBIOS/cfg_duo.asm +++ b/Source/HBIOS/cfg_duo.asm @@ -78,7 +78,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU TRUE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -131,7 +131,7 @@ UARTOSC .EQU 7372800 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU TRUE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -168,7 +168,7 @@ CVDUMODE .EQU CVDUMODE_MBC ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .EQU CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_DUO ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_DUO ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] @@ -237,7 +237,7 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .EQU TRUE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; -CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT +CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) @@ -305,14 +305,14 @@ PIOSBASE .EQU $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR ; -SN76489ENABLE .EQU TRUE ; SN: ENABLE SN76489 SOUND DRIVER +SN76489ENABLE .EQU FALSE ; SN: ENABLE SN76489 SOUND DRIVER AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD SNMODE .EQU SNMODE_DUO ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO] ; AY38910ENABLE .EQU TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_DUO ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_DUO ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU TRUE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm index 6656ea5f..dd3f3c05 100644 --- a/Source/HBIOS/cfg_dyno.asm +++ b/Source/HBIOS/cfg_dyno.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -139,7 +139,7 @@ UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -186,7 +186,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -291,7 +291,7 @@ SNMODE .EQU SNMODE_NONE ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_epitx.asm b/Source/HBIOS/cfg_epitx.asm index 5d90150d..4002c7d1 100644 --- a/Source/HBIOS/cfg_epitx.asm +++ b/Source/HBIOS/cfg_epitx.asm @@ -81,7 +81,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -141,7 +141,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -188,7 +188,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -323,7 +323,7 @@ SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_heath.asm b/Source/HBIOS/cfg_heath.asm index 00d163db..41f6cb6a 100644 --- a/Source/HBIOS/cfg_heath.asm +++ b/Source/HBIOS/cfg_heath.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_SC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -139,7 +139,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -191,7 +191,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -316,7 +316,7 @@ SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index b46f54b9..e10cda1d 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -109,7 +109,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -169,7 +169,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -236,7 +236,7 @@ GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) GDCMODE .EQU GDCMODE_RPH ; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH] GDCMON .EQU GDCMON_EGA ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA] TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] @@ -383,7 +383,7 @@ SNMODE .EQU SNMODE_NONE ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_mbc.asm b/Source/HBIOS/cfg_mbc.asm index 2bcd96fc..bc37a51f 100644 --- a/Source/HBIOS/cfg_mbc.asm +++ b/Source/HBIOS/cfg_mbc.asm @@ -75,7 +75,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU TRUE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -128,7 +128,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -165,7 +165,7 @@ CVDUMODE .EQU CVDUMODE_MBC ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .EQU CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] @@ -299,7 +299,7 @@ SNMODE .EQU SNMODE_NONE ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_MBC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_MBC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU TRUE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 7af0fbd0..691440e6 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -133,7 +133,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -175,7 +175,7 @@ CVDUMODE .EQU CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .EQU CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] @@ -295,7 +295,7 @@ SNMODE .EQU SNMODE_VGM ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_mon.asm b/Source/HBIOS/cfg_mon.asm index 1da15079..00f7b408 100644 --- a/Source/HBIOS/cfg_mon.asm +++ b/Source/HBIOS/cfg_mon.asm @@ -75,7 +75,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -134,7 +134,7 @@ UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -186,7 +186,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -321,7 +321,7 @@ SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index aa5ac163..d810827d 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -82,7 +82,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -135,7 +135,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -177,7 +177,7 @@ CVDUMODE .EQU CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .EQU CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] @@ -288,7 +288,7 @@ SNMODE .EQU SNMODE_VGM ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_N8 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_N8 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_nabu.asm b/Source/HBIOS/cfg_nabu.asm new file mode 100644 index 00000000..372a26cd --- /dev/null +++ b/Source/HBIOS/cfg_nabu.asm @@ -0,0 +1,338 @@ +; +;================================================================================================== +; ROMWBW 3.X CONFIGURATION DEFAULTS FOR NABU Z80 W/ OPTION BOARD +;================================================================================================== +; +; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM +; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD +; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY +; UNDER THIS DIRECTORY. +; +; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS +; FOR THE PLATFORM. +; +#DEFINE PLATFORM_NAME "NABU Personal Computer", " [", CONFIG, "]" +; +#INCLUDE "hbios.inc" +; +PLATFORM .EQU PLT_NABU ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|MON] +CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280] +BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] +BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE +HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD) +USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION +TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ) +; +BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT +AUTOCON .EQU TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +; +CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO +CPUSPDDEF .EQU SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW +CPUOSC .EQU 3580000 ; CPU OSC FREQ IN MHZ +INTMODE .EQU 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) +DEFSERCFG .EQU SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) +; +RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) +ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) +APP_BNKS .EQU $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) +MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON] +MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) +MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) +MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) +MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY) +MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY) +; +RTCIO .EQU $C0 ; RTC LATCH REGISTER ADR +; +KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT +KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS +; +CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT +CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256) +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU CPUOSC ; CTC CLOCK FREQUENCY +; +PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER +PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS +; +EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION +; +SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES +SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K +; +WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] +WDOGIO .EQU $6E ; WATCHDOG REGISTER ADR +; +FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS +FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS +FPLED_INV .EQU FALSE ; FP: LED BITS ARE INVERTED +FPLED_DSKACT .EQU FALSE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS +FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES +FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES +FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED +; +DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING +; +LEDENABLE .EQU TRUE ; ENABLES STATUS LED (SINGLE LED) +LEDMODE .EQU LEDMODE_NABU ; LEDMODE_[STD|SC|RTC|NABU] +LEDPORT .EQU $00 ; STATUS LED PORT ADDRESS +LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED +; +DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY +DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY +ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218) +ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI +PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259) +PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI +PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) +H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL +; +BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE +SECCON .EQU $FF ; SECONDARY CONSOLE DEVICE +CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI] +VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD +ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] +PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE] +MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) +MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] +; +DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] +DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) +; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; +BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) +BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS +; +INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) +; +RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) +; +HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT +SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) +; +DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM) +DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF] +; +DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) +DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2) +DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP +DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG +DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG +DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP +DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG +DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG +; +UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ +UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 +UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS +UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART +UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) +UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART +UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART +UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART +UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART +UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART +UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART +; +ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) +; +Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) +; +ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) +ACIADEBUG .EQU FALSE ; ACIA: ENABLE DEBUG OUTPUT +ACIACNT .EQU 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2) +ACIA0BASE .EQU $80 ; ACIA 0: REGISTERS BASE ADR +ACIA0CLK .EQU CPUOSC ; ACIA 0: OSC FREQ IN HZ +ACIA0DIV .EQU 1 ; ACIA 0: SERIAL CLOCK DIVIDER +ACIA0CFG .EQU DEFSERCFG ; ACIA 0: SERIAL LINE CONFIG (SEE STD.ASM) +ACIA1BASE .EQU $40 ; ACIA 1: REGISTERS BASE ADR +ACIA1CLK .EQU CPUOSC ; ACIA 1: OSC FREQ IN HZ +ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER +ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) +; +SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT +SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) +SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP +SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] +SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR +SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] +SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR +SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +; +XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG +; +VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) +CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) +GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) +TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) +TMSMODE .EQU TMSMODE_NABU80 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] +TMSTIMENABLE .EQU TRUE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) +VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) +VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) +SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) +EFENABLE .EQU FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +; +MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) +MDROM .EQU TRUE ; MD: ENABLE ROM DISK +MDRAM .EQU TRUE ; MD: ENABLE RAM DISK +MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM +; +FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] +FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2) +FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) +FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS +FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +; +RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER +; +IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) +IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER +; +PPIDEENABLE .EQU TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) +PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP +PPIDE0BASE .EQU $60 ; PPIDE 0: PPI REGISTERS BASE ADR +PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER +PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER +PPIDE1BASE .EQU $00 ; PPIDE 1: PPI REGISTERS BASE ADR +PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER +PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER +PPIDE2BASE .EQU $00 ; PPIDE 2: PPI REGISTERS BASE ADR +PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER +PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER +; +SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR] +SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE +SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE +SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 +; +CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT +CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS +CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK +CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK +CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK +; +PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT +PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT +; +PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) +; +ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM) +; +HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) +; +PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM) +PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP +PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR +PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR +; +LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) +LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014] +LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2) +LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR +LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR +; +PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM) +PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2) +PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014] +PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA +PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA +; +IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) +IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2) +IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014] +IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM +IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM +; +SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM) +SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2) +SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014] +SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ +SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ +; +PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD +PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) +PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP +; +UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) +; +SN76489ENABLE .EQU FALSE ; SN: ENABLE SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER +SN7CLK .EQU 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD +SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] +; +AY38910ENABLE .EQU TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER +AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD +AYMODE .EQU AYMODE_NABU ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] +; +SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) +; +DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM) +DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS +DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO) +; +YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER +VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC) diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index d101a777..d1f2da99 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -86,7 +86,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -145,7 +145,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -192,7 +192,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm index dbd5c5e1..f97f7033 100644 --- a/Source/HBIOS/cfg_rcz280.asm +++ b/Source/HBIOS/cfg_rcz280.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -139,7 +139,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -196,7 +196,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -331,7 +331,7 @@ SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 4979501c..7224ff1d 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -139,7 +139,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -191,7 +191,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -326,7 +326,7 @@ SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_rph.asm b/Source/HBIOS/cfg_rph.asm index cf81334f..fbf1ebbf 100644 --- a/Source/HBIOS/cfg_rph.asm +++ b/Source/HBIOS/cfg_rph.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -133,7 +133,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -166,7 +166,7 @@ GDCENABLE .EQU TRUE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) GDCMODE .EQU GDCMODE_RPH ; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH] GDCMON .EQU GDCMON_EGA ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA] TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] @@ -277,7 +277,7 @@ SNMODE .EQU SNMODE_NONE ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_N8 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_N8 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_s100.asm b/Source/HBIOS/cfg_s100.asm index ed5e3feb..70800cf8 100644 --- a/Source/HBIOS/cfg_s100.asm +++ b/Source/HBIOS/cfg_s100.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU TRUE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_SC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -139,7 +139,7 @@ UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -186,7 +186,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -311,7 +311,7 @@ SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index fcb8b975..76cd046b 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -75,7 +75,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -128,7 +128,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -165,7 +165,7 @@ CVDUMODE .EQU CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .EQU CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] @@ -277,7 +277,7 @@ SNMODE .EQU SNMODE_VGM ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index f98705cf..52849489 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_SC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -139,7 +139,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS -UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -186,7 +186,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) @@ -321,7 +321,7 @@ SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM] ; AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD -AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO] +AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; diff --git a/Source/HBIOS/cfg_z80retro.asm b/Source/HBIOS/cfg_z80retro.asm index d3176ae0..e95c80ae 100644 --- a/Source/HBIOS/cfg_z80retro.asm +++ b/Source/HBIOS/cfg_z80retro.asm @@ -78,7 +78,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU $00 ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -126,7 +126,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -168,7 +168,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) diff --git a/Source/HBIOS/cfg_zeta.asm b/Source/HBIOS/cfg_zeta.asm index 0231e647..0b3c409f 100644 --- a/Source/HBIOS/cfg_zeta.asm +++ b/Source/HBIOS/cfg_zeta.asm @@ -67,7 +67,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -115,7 +115,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART +UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -138,7 +138,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO] +TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index 4369f1b4..7e3c6f10 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -78,7 +78,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED -LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] +LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; @@ -126,7 +126,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED -UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART +UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO/NABU ONBOARD UART UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH) UARTAUX .EQU FALSE ; UART: AUTO-DETECT AUX UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART @@ -149,7 +149,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO] +TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO|DUO|NABU40|NABU80] TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) diff --git a/Source/HBIOS/ch.asm b/Source/HBIOS/ch.asm index ad884da4..0bfb877d 100644 --- a/Source/HBIOS/ch.asm +++ b/Source/HBIOS/ch.asm @@ -105,9 +105,9 @@ CH_CFG0: ; DEVICE 0 .DB CH0SDENABLE ; ENABLE SD CARD SUB-DRIVER .DW CHSD_CFG0 ; SD CARD SUB-DRIVER INIT ADR ; - .ECHO "CH: IO=" - .ECHO CH0BASE - .ECHO "\n" + DEVECHO "CH: IO=" + DEVECHO CH0BASE + DEVECHO "\n" #ENDIF ; #IF (CHCNT >= 2) @@ -120,9 +120,9 @@ CH_CFG1: ; DEVICE 1 .DB CH1SDENABLE ; ENABLE SD CARD SUB-DRIVER .DW CHSD_CFG1 ; SD CARD SUB-DRIVER INIT ADR ; - .ECHO "CH: IO=" - .ECHO CH1BASE - .ECHO "\n" + DEVECHO "CH: IO=" + DEVECHO CH1BASE + DEVECHO "\n" #ENDIF ; #IF ($ - CH_CFGTBL) != (CHCNT * CH_CFGSIZ) diff --git a/Source/HBIOS/chsd.asm b/Source/HBIOS/chsd.asm index a5789c9a..c4b38194 100644 --- a/Source/HBIOS/chsd.asm +++ b/Source/HBIOS/chsd.asm @@ -60,9 +60,9 @@ CHSD_CFG0: .DW CH0_MODE ; POINTER TO MODE BYTE ; #IF (CH0SDENABLE) - .ECHO "CHSD: IO=" - .ECHO CH0BASE - .ECHO "\n" + DEVECHO "CHSD: IO=" + DEVECHO CH0BASE + DEVECHO "\n" #ENDIF #ENDIF ; @@ -77,9 +77,9 @@ CHSD_CFG1: .DW CH1_MODE ; POINTER TO MODE BYTE ; #IF (CH1SDENABLE) - .ECHO "CHSD: IO=" - .ECHO CH1BASE - .ECHO "\n" + DEVECHO "CHSD: IO=" + DEVECHO CH1BASE + DEVECHO "\n" #ENDIF #ENDIF ; diff --git a/Source/HBIOS/chusb.asm b/Source/HBIOS/chusb.asm index fd4c5d44..175a00b2 100644 --- a/Source/HBIOS/chusb.asm +++ b/Source/HBIOS/chusb.asm @@ -65,9 +65,9 @@ CHUSB_CFG0: .DW CH0_MODE ; POINTER TO MODE BYTE ; #IF (CH0USBENABLE) - .ECHO "CHUSB: IO=" - .ECHO CH0BASE - .ECHO "\n" + DEVECHO "CHUSB: IO=" + DEVECHO CH0BASE + DEVECHO "\n" #ENDIF #ENDIF ; @@ -82,9 +82,9 @@ CHUSB_CFG1: .DW CH1_MODE ; POINTER TO MODE BYTE ; #IF (CH1USBENABLE) - .ECHO "CHUSB: IO=" - .ECHO CH1BASE - .ECHO "\n" + DEVECHO "CHUSB: IO=" + DEVECHO CH1BASE + DEVECHO "\n" #ENDIF #ENDIF ; diff --git a/Source/HBIOS/ctc.asm b/Source/HBIOS/ctc.asm index 777b28f8..2fd205ea 100644 --- a/Source/HBIOS/ctc.asm +++ b/Source/HBIOS/ctc.asm @@ -28,19 +28,19 @@ CTC_TIM256CFG .EQU %00110111 ; CTC TIMER/256 MODE CONFIG #IF (CTCTIMER & (INTMODE != 2)) .ECHO "*** WARNING: CTC TIMER DISABLED -- INTMODE 2 REQUIRED!!!\n" #ENDIF - .ECHO "CTC: IO=" - .ECHO CTCBASE + DEVECHO "CTC: IO=" + DEVECHO CTCBASE ; #IF (CTCTIMER & (INTMODE == 2)) ; #IF (INT_CTC0A % 4) - .ECHO INT_CTC0A - .ECHO "\n" - .ECHO (INT_CTC0A % 4) - .ECHO "\n" + DEVECHO INT_CTC0A + DEVECHO "\n" + DEVECHO (INT_CTC0A % 4) + DEVECHO "\n" - .ECHO "*** ERROR: CTC BASE VECTOR NOT DWORD ALIGNED!!!\n" + DEVECHO "*** ERROR: CTC BASE VECTOR NOT DWORD ALIGNED!!!\n" !!! ; FORCE AN ASSEMBLY ERROR #ENDIF ; @@ -112,23 +112,23 @@ CTC_DIVHI .EQU CTCPRE CTC_DIVLO .EQU (CTC_DIV / CTC_DIVHI) ; - .ECHO ", TIMER MODE=" + DEVECHO ", TIMER MODE=" #IF (CTCMODE == CTCMODE_CTR) - .ECHO "COUNTER" + DEVECHO "COUNTER" #ENDIF #IF (CTCMODE == CTCMODE_TIM16) - .ECHO "TIMER/16" + DEVECHO "TIMER/16" #ENDIF #IF (CTCMODE == CTCMODE_TIM256) - .ECHO "TIMER/256" + DEVECHO "TIMER/256" #ENDIF - .ECHO ", DIVISOR=" - .ECHO CTC_DIV - .ECHO ", HI=" - .ECHO CTC_DIVHI - .ECHO ", LO=" - .ECHO CTC_DIVLO - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", DIVISOR=" + DEVECHO CTC_DIV + DEVECHO ", HI=" + DEVECHO CTC_DIVHI + DEVECHO ", LO=" + DEVECHO CTC_DIVLO + DEVECHO ", INTERRUPTS ENABLED" ; #IF ((CTC_DIV == 0) | (CTC_DIV > $FFFF)) .ECHO "COMPUTED CTC DIVISOR IS UNUSABLE!\n" @@ -148,7 +148,7 @@ CTCTIVT .EQU INT_CTC0A + CTCTIMCH ; #ENDIF ; - .ECHO "\n" + DEVECHO "\n" ; ;================================================================================================== ; CTC PRE-INITIALIZATION diff --git a/Source/HBIOS/cvdu.asm b/Source/HBIOS/cvdu.asm index adbe84c9..8fce3e31 100644 --- a/Source/HBIOS/cvdu.asm +++ b/Source/HBIOS/cvdu.asm @@ -18,7 +18,7 @@ ; CVDU_BASE .EQU $E0 ; - .ECHO "CVDU: MODE=" + DEVECHO "CVDU: MODE=" ; #IF (CVDUMODE == CVDUMODE_ECB) CVDU_KBDDATA .EQU CVDU_BASE + $02 ; KBD CTLR DATA PORT @@ -26,7 +26,7 @@ CVDU_KBDST .EQU CVDU_BASE + $0A ; KBD CTLR STATUS/CMD PORT CVDU_STAT .EQU CVDU_BASE + $04 ; READ M8563 STATUS CVDU_REG .EQU CVDU_BASE + $04 ; SELECT M8563 REGISTER CVDU_DATA .EQU CVDU_BASE + $0C ; READ/WRITE M8563 DATA - .ECHO "ECB" + DEVECHO "ECB" #ENDIF ; #IF (CVDUMODE == CVDUMODE_MBC) @@ -35,15 +35,15 @@ CVDU_KBDST .EQU CVDU_BASE + $03 ; KBD CTLR STATUS/CMD PORT CVDU_STAT .EQU CVDU_BASE + $04 ; READ M8563 STATUS CVDU_REG .EQU CVDU_BASE + $04 ; SELECT M8563 REGISTER CVDU_DATA .EQU CVDU_BASE + $05 ; READ/WRITE M8563 DATA - .ECHO "MBC" + DEVECHO "MBC" #ENDIF ; - .ECHO ", IO=" - .ECHO CVDU_BASE - .ECHO ", KBD MODE=PS/2" - .ECHO ", KBD IO=" - .ECHO CVDU_KBDDATA - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO CVDU_BASE + DEVECHO ", KBD MODE=PS/2" + DEVECHO ", KBD IO=" + DEVECHO CVDU_KBDDATA + DEVECHO "\n" ; CVDU_ROWS .EQU 25 CVDU_COLS .EQU 80 diff --git a/Source/HBIOS/dma.asm b/Source/HBIOS/dma.asm index 18d0ff8c..05ac7a03 100644 --- a/Source/HBIOS/dma.asm +++ b/Source/HBIOS/dma.asm @@ -3,17 +3,17 @@ ;================================================================================================== ; ; - .ECHO "DMA: MODE=" + DEVECHO "DMA: MODE=" ; #IF ((DMAMODE == DMAMODE_ECB) | (DMAMODE == DMAMODE_MBC)) DMA_IO .EQU DMABASE DMA_CTL .EQU DMABASE + 1 DMA_USEHALF .EQU TRUE #IF (DMAMODE == DMAMODE_ECB) - .ECHO "ECB" + DEVECHO "ECB" #ENDIF #IF (DMAMODE == DMAMODE_MBC) - .ECHO "MBC" + DEVECHO "MBC" #ENDIF #ENDIF ; @@ -21,12 +21,12 @@ DMA_USEHALF .EQU TRUE DMA_IO .EQU DMABASE DMA_CTL .EQU DMABASE + 3 DMA_USEHALF .EQU FALSE - .ECHO "DUO" + DEVECHO "DUO" #ENDIF ;S - .ECHO ", IO=" - .ECHO DMA_IO - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO DMA_IO + DEVECHO "\n" ; DMA_CONTINUOUS .equ %10111101 ; + Pulse DMA_BYTE .equ %10011101 ; + Pulse diff --git a/Source/HBIOS/ds1501rtc.asm b/Source/HBIOS/ds1501rtc.asm index daf42ae3..fb50f4ec 100644 --- a/Source/HBIOS/ds1501rtc.asm +++ b/Source/HBIOS/ds1501rtc.asm @@ -111,11 +111,11 @@ DS1501RTC_TE .EQU %10000000 ; DS1501RTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS) - .ECHO "DS1501RTC: RTCIO=" - .ECHO DS1501RTC_BASE - .ECHO ", NVMIO=" - .ECHO DS1501NVM_BASE - .ECHO "\n" + DEVECHO "DS1501RTC: RTCIO=" + DEVECHO DS1501RTC_BASE + DEVECHO ", NVMIO=" + DEVECHO DS1501NVM_BASE + DEVECHO "\n" ; ; RTC Device Initialization Entry ; diff --git a/Source/HBIOS/ds7rtc.asm b/Source/HBIOS/ds7rtc.asm index 7dd6970c..4014b26e 100644 --- a/Source/HBIOS/ds7rtc.asm +++ b/Source/HBIOS/ds7rtc.asm @@ -23,7 +23,7 @@ DS7_WRITE .EQU (DS7_DS1307 | DS7_W) ; WRITE ; DS7_CTL .EQU (DS7_OUT | DS7_SQWE | DS7_RATE) ; - .ECHO "DS1307: ENABLED\n" + DEVECHO "DS1307: ENABLED\n" ; ;----------------------------------------------------------------------------- ; DS1307 INITIALIZATION diff --git a/Source/HBIOS/dsrtc.asm b/Source/HBIOS/dsrtc.asm index 0f20b987..f7e89631 100644 --- a/Source/HBIOS/dsrtc.asm +++ b/Source/HBIOS/dsrtc.asm @@ -66,30 +66,30 @@ ; RTC LATCH WRITE ; --------------- ; -; BIT SBC RCBUS SBC-004 MFPIC K80W N8 N8-CSIO MK4 SC130 SC131 SC126 MBC RPH -; ----- ------- ------- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- ------- -; D7 RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT RTC_OUT -; D6 RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK -; D5 /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE -; D4 RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE -; D3 NC NC CLKSEL /RTC_CE /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL -- -; D2 NC NC SPK RTC_CLK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK -- -; D1 -- -- -- RTC_WE RTC_WE SPI_CLK NC NC -- -- FS LED1 -- -; D0 -- -- -- RTC_OUT RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0 -- -; -; RTC LATCH READTCH READ -; ---------------------- -; -; D7 -- -- -- -- -- -- -- -- -- -- I2C_SDA -- -- -; D6 CFG -- CFG -- -- SPI_DO CFG -- -- -- -- CFG -- -; D5 -- -- -- -- -- -- -- -- -- -- -- -- -- -; D4 -- -- -- -- -- -- -- -- -- -- -- -- -- -; D3 -- -- -- -- -- -- -- -- -- -- -- -- -- -; D2 -- -- -- -- -- -- -- -- -- -- -- -- -- -; D1 -- -- -- -- -- -- -- -- -- -- -- CLKSEL -- -; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN RTC_IN -; - .ECHO "DSRTC: MODE=" +; BIT SBC RCBUS SBC-004 MFPIC K80W N8 N8-CSIO MK4 SC126 SC130 SC131 SC140 SC503 SC722 MBC RPH +; ----- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- ------- ------- ------- ------- ------- ------- +; D7 RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT RTC_OUT RTC_OUT RTC_OUT,I2C_SDA -- -- -- -- -- RTC_OUT RTC_OUT +; D6 RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK RTC_CLK -- -- -- -- -- RTC_CLK RTC_CLK +; D5 /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE /RTC_WE -- -- -- -- -- /RTC_WE /RTC_WE +; D4 RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE RTC_CE -- -- -- -- -- RTC_CE RTC_CE +; D3 NC NC CLKSEL /RTC_CE /RTC_CE NC NC NC /SPI_CS2 -- -- -- -- -- CLKSEL -- +; D2 NC NC SPK RTC_CLK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1 /SPI_CS1/SPI_CS1/SPI_CS1/SPI_CS1/SPI_CS1SPK -- +; D1 -- -- -- RTC_WE RTC_WE SPI_CLK NC NC FS -- -- -- -- -- LED1 -- +; D0 -- -- -- RTC_OUT RTC_OUT SPI_DI NC NC I2C_SCL -- -- -- -- -- LED0 -- +; +; RTC LATCH LATCH READ +; -------------------- +; +; D7 -- -- -- -- -- -- -- -- I2C_SDA -- -- -- -- -- -- -- +; D6 CFG -- CFG -- -- SPI_DO CFG -- -- -- -- -- -- -- CFG -- +; D5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- +; D4 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- +; D3 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- +; D2 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- +; D1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- CLKSEL -- +; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- -- -- -- RTC_IN RTC_IN +; + DEVECHO "DSRTC: MODE=" ; #IF (DSRTCMODE == DSRTCMODE_STD) ; @@ -107,7 +107,7 @@ RTCDEF .SET RTCDEF | DSRTC_IDLE ; FOR HBIOS MAINLINE ; #DEFINE DSRTC_OPRVAL HB_RTCVAL ; - .ECHO "STD" + DEVECHO "STD" ; #ENDIF ; @@ -125,7 +125,7 @@ DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE ; #DEFINE DSRTC_OPRVAL DSRTC_RTCVAL ; - .ECHO "MFPIC" + DEVECHO "MFPIC" ; #ENDIF ; @@ -143,13 +143,13 @@ DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE ; #DEFINE DSRTC_OPRVAL HB_RTCVAL ; - .ECHO "K80W" + DEVECHO "K80W" ; #ENDIF ; - .ECHO ", IO=" - .ECHO DSRTC_IO - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO DSRTC_IO + DEVECHO "\n" ; ; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES ; diff --git a/Source/HBIOS/duart.asm b/Source/HBIOS/duart.asm index 91213874..c6ab5fc8 100644 --- a/Source/HBIOS/duart.asm +++ b/Source/HBIOS/duart.asm @@ -823,9 +823,9 @@ DUART0A_CFG: .DW DUART0ACFG ; IY+8 LINE CONFIGURATION .DB 1 ; IY+10 MULTIPLIER WRT 3.6864MHZ CLOCK ; - .ECHO "DUART: IO=" - .ECHO DUART0BASE + $00 - .ECHO ", CHANNEL A\n" + DEVECHO "DUART: IO=" + DEVECHO DUART0BASE + $00 + DEVECHO ", CHANNEL A\n" ; DUART_CFGSIZ .EQU $ - DUART_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -840,9 +840,9 @@ DUART0B_CFG: .DW DUART0BCFG ; LINE CONFIGURATION .DB 1 ; MULTIPLIER WRT 3.6864MHZ CLOCK ; - .ECHO "DUART: IO=" - .ECHO DUART0BASE + $08 - .ECHO ", CHANNEL B\n" + DEVECHO "DUART: IO=" + DEVECHO DUART0BASE + $08 + DEVECHO ", CHANNEL B\n" ; #IF (DUARTCNT >= 2) ; @@ -857,9 +857,9 @@ DUART1A_CFG: .DW DUART1ACFG ; LINE CONFIGURATION .DB 1 ; MULTIPLIER WRT 3.6864MHZ CLOCK ; - .ECHO "DUART: IO=" - .ECHO DUART1BASE + $00 - .ECHO ", CHANNEL A\n" + DEVECHO "DUART: IO=" + DEVECHO DUART1BASE + $00 + DEVECHO ", CHANNEL A\n" ; DUART1B_CFG: ; 2ND DUART MODULE CHANNEL B @@ -872,9 +872,9 @@ DUART1B_CFG: .DW DUART1BCFG ; LINE CONFIGURATION .DB 1 ; MULTIPLIER WRT 3.6864MHZ CLOCK ; - .ECHO "DUART: IO=" - .ECHO DUART1BASE + $08 - .ECHO ", CHANNEL B\n" + DEVECHO "DUART: IO=" + DEVECHO DUART1BASE + $08 + DEVECHO ", CHANNEL B\n" ; #ENDIF ; diff --git a/Source/HBIOS/ef.asm b/Source/HBIOS/ef.asm index 9d6228f3..63ba2bf4 100644 --- a/Source/HBIOS/ef.asm +++ b/Source/HBIOS/ef.asm @@ -153,6 +153,10 @@ EF_FG_CYAN .EQU 6 EF_FG_WHITE .EQU 7 ; EF_SCREENSIZE .EQU EF_DROWS * EF_DLINES +; + DEVECHO "EF: IO=" + DEVECHO EF_BASE + DEVECHO "\n" ; ;====================================================================== ; VDU DRIVER - INITIALIZATION diff --git a/Source/HBIOS/esp.asm b/Source/HBIOS/esp.asm index 75b4d58b..5a76ffb7 100644 --- a/Source/HBIOS/esp.asm +++ b/Source/HBIOS/esp.asm @@ -54,9 +54,9 @@ ESP_CFG_ST .EQU 2 ; ESP STATUS PORT ESP_CFG_RDYMSK .EQU 3 ; ESP READY MASK ESP_CFG_BSYMSK .EQU 4 ; ESP BUSY MASK ; - .ECHO "ESP: IO=" - .ECHO ESP_IOBASE - .ECHO "\n" + DEVECHO "ESP: IO=" + DEVECHO ESP_IOBASE + DEVECHO "\n" ; ; GLOBAL ESP INITIALIZATION ; @@ -348,7 +348,7 @@ ESP_STR_UPGRADE .TEXT "!!!UPGRADE REQUIRED!!!$" ESPCON_ROWS .EQU 25 ; VGA DISPLAY ROWS ESPCON_COLS .EQU 80 ; VGA DISPLAY COLS ; - .ECHO "ESPCON: ENABLED\n" + DEVECHO "ESPCON: ENABLED\n" ; ; ; @@ -692,7 +692,7 @@ ESPSER0_CFG: .DB ESP_0_BUSY ; ESP BUSY BIT MASK .DW ESPSER_LINECFG ; LINE CONFIGURATION ; - .ECHO "ESPSER: DEVICE=0\n" + DEVECHO "ESPSER: DEVICE=0\n" ; ESPSER1_CFG: .DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) @@ -702,7 +702,7 @@ ESPSER1_CFG: .DB ESP_1_BUSY ; ESP BUSY BIT MASK .DW ESPSER_LINECFG ; LINE CONFIGURATION ; - .ECHO "ESPSER: DEVICE=1\n" + DEVECHO "ESPSER: DEVICE=1\n" ; ; ; diff --git a/Source/HBIOS/fd.asm b/Source/HBIOS/fd.asm index fc52bf77..5888f4a1 100644 --- a/Source/HBIOS/fd.asm +++ b/Source/HBIOS/fd.asm @@ -152,31 +152,31 @@ FD_CFGTBL: .DB 0 ; HOST HEAD .DB FD0TYPE ; DRIVE TYPE ; - .ECHO "FD: MODE=" - .ECHO FDMODE_STR - .ECHO ", IO=" - .ECHO FDC_MSR - .ECHO ", DRIVE 0" - .ECHO ", TYPE=" + DEVECHO "FD: MODE=" + DEVECHO FDMODE_STR + DEVECHO ", IO=" + DEVECHO FDC_MSR + DEVECHO ", DRIVE 0" + DEVECHO ", TYPE=" #IF (FD0TYPE == FDT_NONE - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (FD0TYPE == FDT_3DD - .ECHO "3.5\" DD" + DEVECHO "3.5\" DD" #ENDIF #IF (FD0TYPE == FDT_3HD - .ECHO "3.5\" HD" + DEVECHO "3.5\" HD" #ENDIF #IF (FD0TYPE == FDT_5DD - .ECHO "5.25\" DD" + DEVECHO "5.25\" DD" #ENDIF #IF (FD0TYPE == FDT_5HD - .ECHO "5.25\" HD" + DEVECHO "5.25\" HD" #ENDIF #IF (FD0TYPE == FDT_8 - .ECHO "8\" DD" + DEVECHO "8\" DD" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; #IF (FD_DEVCNT >= 2) ; DEVICE 1, PRIMARY SLAVE @@ -189,31 +189,31 @@ FD_CFGTBL: .DB 0 ; HOST HEAD .DB FD1TYPE ; DRIVE TYPE ; - .ECHO "FD: MODE=" - .ECHO FDMODE_STR - .ECHO ", IO=" - .ECHO FDC_MSR - .ECHO ", DRIVE 1" - .ECHO ", TYPE=" + DEVECHO "FD: MODE=" + DEVECHO FDMODE_STR + DEVECHO ", IO=" + DEVECHO FDC_MSR + DEVECHO ", DRIVE 1" + DEVECHO ", TYPE=" #IF (FD1TYPE == FDT_NONE - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (FD1TYPE == FDT_3DD - .ECHO "3.5\" DD" + DEVECHO "3.5\" DD" #ENDIF #IF (FD1TYPE == FDT_3HD - .ECHO "3.5\" HD" + DEVECHO "3.5\" HD" #ENDIF #IF (FD1TYPE == FDT_5DD - .ECHO "5.25\" DD" + DEVECHO "5.25\" DD" #ENDIF #IF (FD1TYPE == FDT_5HD - .ECHO "5.25\" HD" + DEVECHO "5.25\" HD" #ENDIF #IF (FD1TYPE == FDT_8 - .ECHO "8\" DD" + DEVECHO "8\" DD" #ENDIF - .ECHO "\n" + DEVECHO "\n" #ENDIF ; #IF ($ - FD_CFGTBL) != (FD_DEVCNT * FD_CFGSIZ) diff --git a/Source/HBIOS/gdc.asm b/Source/HBIOS/gdc.asm index a73a432c..6e0fc085 100644 --- a/Source/HBIOS/gdc.asm +++ b/Source/HBIOS/gdc.asm @@ -37,32 +37,32 @@ GDC_COLS .EQU 80 ; BE USED TO ALLOW FOR MULTIPLE MONITOR TIMINGS AND/OR FONT ; DEFINITIONS. ; - .ECHO "GDC: MODE=" + DEVECHO "GDC: MODE=" ; #IF (GDCMODE == GDCMODE_ECB) - .ECHO "ECB" + DEVECHO "ECB" #ENDIF #IF (GDCMODE == GDCMODE_RPH) - .ECHO "RPH" + DEVECHO "RPH" #ENDIF ; - .ECHO ", DISPLAY=" + DEVECHO ", DISPLAY=" ; #IF (GDCMON == GDCMON_CGA) #DEFINE USEFONTCGA #DEFINE GDC_FONT FONTCGA - .ECHO "CGA" + DEVECHO "CGA" #ENDIF ; #IF (GDCMON == GDCMON_EGA) #DEFINE USEFONT8X16 #DEFINE GDC_FONT FONT8X16 - .ECHO "EGA" + DEVECHO "EGA" #ENDIF ; - .ECHO ", IO=" - .ECHO GDC_BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO GDC_BASE + DEVECHO "\n" ; TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT diff --git a/Source/HBIOS/h8p.asm b/Source/HBIOS/h8p.asm index 8ccb96ad..234283f5 100644 --- a/Source/HBIOS/h8p.asm +++ b/Source/HBIOS/h8p.asm @@ -11,6 +11,11 @@ ; 20 08 ; +--10--+ 80 ; +; + DEVECHO "H8P: IO=??" + ;DEVECHO 0 + DEVECHO "\n" +; ;__H8P_PREINIT_______________________________________________________________________________________ ; ; CONFIGURE AND RESET PANEL diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 4dee78c9..8f340c68 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -22,27 +22,25 @@ ; SYSTEM INITIALIZATION, THE IMAGE OF THE RUNNING ROM BANK IS COPIED TO A RAM BANK ; CREATING A SHADOW COPY IN RAM. EXECUTION IS THAN TRANSFERRED TO THE RAM SHADOW COPY. ; THIS IS ESSENTIAL BECAUSE THE HBIOS CODE DOES NOT SUPPORT RUNNING IN READ ONLY MEMORY -; (EXCEPT FOR THE INITIAL LAUNCHING CODE). IN THIS MODE, THE HBI OS INITIALIZATION WILL -; ALSO COPY THE OS IMAGES BANK IN ROM TO THE USER RAM BANK AND LAUNCH IT AFTER HBIOS -; IS INSTALLED. +; (EXCEPT FOR THE INITIAL LAUNCHING CODE). ; ; - APPBOOT: BOOT FROM A CP/M STYLE APPLICATION FILE ; ; WHEN APPBOOT IS DEFINED, THE FILE IS ASSEMBLED AS A CP/M APPLICATION ASSUMING ; THAT IT WILL BE LOADED AT 100H BY THE CP/M (OR COMPATIBLE) OS. NOTE THAT IN ; THIS CASE IT IS ASSUMED THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE -; HBIOS APPLICATION BINARY. THE APPENDED OS IMAGES ARE COPIED TO THE USER RAM +; HBIOS APPLICATION BINARY. THE APPENDED OS IMAGES ARE COPIED TO THE AUX RAM ; BANK AND LAUNCHED AFTER HBIOS HAS INSTALLED ITSELF. ; -; - IMGBOOT: BOOT FROM AN IMAGE FILE THAT HAS BEEN PLACED IN THE USER BANK -; -; WHEN IMGBOOT IS DEFINED, THE FILE IS ASSEMBLED SUCH THAT IT CAN BE PRELOADED -; INTO THE RAM USER BANK BY AN EXTERNAL PROCESS THAT SUBSEQUENTLY LAUNCHES -; THE CODE AT ADDRESS 0. THE MOST COMMON EXAMPLE OF THIS IS THE UNA FSFAT -; TOOL WHICH CAN LOAD AN IMAGE FROM A DOS FAT FILESYSTEM PROVIDING A SIMPLE -; WAY TO LOAD A TEST COPY OF HBIOS. AS IS THE CASE WITH APPBOOT, IT IS ASSUMED -; THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE IMAGE AND IS LAUNCHED -; AFTER HBIOS IS INSTALLED. +;;;; - IMGBOOT: BOOT FROM AN IMAGE FILE THAT HAS BEEN PLACED IN THE USER BANK +;;;; +;;;; WHEN IMGBOOT IS DEFINED, THE FILE IS ASSEMBLED SUCH THAT IT CAN BE PRELOADED +;;;; INTO THE RAM USER BANK BY AN EXTERNAL PROCESS THAT SUBSEQUENTLY LAUNCHES +;;;; THE CODE AT ADDRESS 0. THE MOST COMMON EXAMPLE OF THIS IS THE UNA FSFAT +;;;; TOOL WHICH CAN LOAD AN IMAGE FROM A DOS FAT FILESYSTEM PROVIDING A SIMPLE +;;;; WAY TO LOAD A TEST COPY OF HBIOS. AS IS THE CASE WITH APPBOOT, IT IS ASSUMED +;;;; THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE IMAGE AND IS LAUNCHED +;;;; AFTER HBIOS IS INSTALLED. ; ; INCLUDE FILE NESTING: ; @@ -65,6 +63,27 @@ ; - [xio|mio].asm ; - unlzsa2s.asm ; +; MEMORY LAYOUT: +; +; +; DESCRIPTION START LENGTH +; ----------------------------- ------- ------- +; Page Zero 0x0000 0x0100 +; HBIOS Control Block 0x0100 0x0100 +; Proxy Image 0x0200 0x0200 +; Entry Vectors / Stack 0x0400 0x0100 +; Interrupt Vector Table 0x0500 Varies +; System Initialization Varies Varies +; Function Dispatching Varies Varies +; System API Varies Varies +; Z280 Int Vector Table Varies Varies +; Internal Functions Varies Varies +; Utility Functions Varies Varies +; Print Summary Function Varies Varies +; Hardware Drivers Varies Varies +; Font Data Varies Varies +; HBIOS Data Varies Varies +; ; AUXILIARY CONTROL REGISTER ; -------------------------- ; @@ -81,20 +100,19 @@ ; ; PORT SCG:0x9C 0x94 VDP:0x92 PSG:0xA2 0x80 MEDIA:0xA6 ; -; -; INCLUDE GENERIC STUFF -; -#INCLUDE "std.asm" -; #DEFINE HBIOS ; -SUPCTS .EQU FALSE ; SUPPRESS CTS DURING HBIOS BOOT -; ; MAKE SURE EXACTLY ONE OF ROMBOOT, APPBOOT, IMGBOOT IS DEFINED. ; MODCNT .EQU 0 #IFDEF ROMBOOT MODCNT .SET MODCNT + 1 +; + #DEFINE BNKINFO + #DEFINE MEMINFO + #DEFINE DEVINFO + #DEFINE SYSINFO +; #ENDIF #IFDEF APPBOOT MODCNT .SET MODCNT + 1 @@ -107,35 +125,67 @@ MODCNT .SET MODCNT + 1 !!! ; FORCE AN ASSEMBLY ERROR #ENDIF ; +; CONTROLS PRINTING OF DEVICE INFORMATION IN ASSEMBLY OUTPUT +; +#IFDEF DEVINFO + #DEFINE DEVECHO .ECHO +#ELSE + #DEFINE DEVECHO \; +#ENDIF +; +; CONTROLS PRINTING OF MEMORY USAGE INFORMATION IN ASSEMBLY OUTPUT +; +#IFDEF MEMINFO + #DEFINE MEMECHO .ECHO +#ELSE + #DEFINE MEMECHO \; +#ENDIF +; +; INCLUDE GENERIC STUFF +; +#INCLUDE "std.asm" +; +SUPCTS .EQU FALSE ; SUPPRESS CTS DURING HBIOS BOOT ; +; HELPER MACROS ; -#DEFINE ALIGN(N) .FILL ((($+(N-1)) & ~(N-1)) - $) +; SET FRONT PANEL LEDS ; #IF (FPLED_ENABLE) - #DEFINE DIAG(N) PUSH AF + #DEFINE FPLEDS(N) PUSH AF #DEFCONT \ LD A,N #DEFCONT \ CALL FP_SETLEDS #DEFCONT \ POP AF #ELSE - #DEFINE DIAG(N) \; + #DEFINE FPLEDS(N) \; #ENDIF ; -; SCxxx: LED Port=0x0E, bit 2, inverted, dedicated port -; TinyZ80: LED Port=0x6E, bit 0, inverted, dedicated port -; Z80-512K: LED Port=0x6E, bit 0, inverted, dedicated port -; MBC: LED Port=0x70, bits 1-0, normal, shared w/ RTC port -; DUO: LED Port=0x94, bits 1-0, normal, shared w/ RTC port -; S100: LED Port = $0E, bit 2, inverted, dedicated port +; SET DIAGNOSTIC LEDS +; +; SCxxx: LED Port=0x0E, bit 2, inverted, dedicated port (LEDMODE_SC) +; SC7xx: LED Port=0x0E, bit 0, inverted, dedicated port (LEDMODE_STD) +; TinyZ80: LED Port=0x6E, bit 0, inverted, dedicated port (LEDMODE_STD) +; Z80-512K: LED Port=0x6E, bit 0, inverted, dedicated port (LEDMODE_STD) +; MBC: LED Port=0x70, bits 1-0, normal, shared w/ RTC port (LEDMODE_RTC) +; DUO: LED Port=0x94, bits 1-0, normal, shared w/ RTC port (LEDMODE_RTC) +; S100: LED Port = $0E, bit 2, inverted, dedicated port (LEDMODE_SC) +; NABU: LED Port = $00, bits 5-3, normal, shared w/ control port (LEDMODE_NABU) ; #IF (LEDENABLE) #IF (LEDMODE == LEDMODE_STD) - #DEFINE LED(N) PUSH AF + #DEFINE DIAG(N) PUSH AF #DEFCONT \ LD A,~N #DEFCONT \ OUT (LEDPORT),A #DEFCONT \ POP AF #ENDIF + #IF (LEDMODE == LEDMODE_SC) + #DEFINE DIAG(N) PUSH AF + #DEFCONT \ LD A,+(((~N) << 2) & %00000100) + #DEFCONT \ OUT (LEDPORT),A + #DEFCONT \ POP AF + #ENDIF #IF (LEDMODE == LEDMODE_RTC) - #DEFINE LED(N) PUSH AF + #DEFINE DIAG(N) PUSH AF #DEFCONT \ LD A,(HB_RTCVAL) #DEFCONT \ AND %11111100 #DEFCONT \ OR (N & %00000011) @@ -143,16 +193,26 @@ MODCNT .SET MODCNT + 1 #DEFCONT \ OUT (LEDPORT),A #DEFCONT \ POP AF #ENDIF + #IF (LEDMODE == LEDMODE_NABU) + #DEFINE DIAG(N) PUSH AF + #DEFCONT \ LD A,+((N << 3) & %00011000) + #DEFCONT \ OUT (LEDPORT),A + #DEFCONT \ POP AF + #ENDIF #ELSE - #DEFINE LED(N) \; + #DEFINE DIAG(N) \; #ENDIF ; +; HANDLE SYSTEM CHECK ERRORS +; #DEFINE SYSCHKERR(HB_ERR) \ #DEFCONT \ CALL SYSCHKA #DEFCONT \ LD A,HB_ERR #DEFCONT \ OR A ; -; +; THE HB_EI AND HB_DI MACROS ARE USED TO GENERATE THE APPROPRIATE +; INTERRUPT ENABLE/DISABLE CODE DEPENDING ON THE INTERRUPT MODE +; BEING USED. ; #IF (INTMODE == 0) ; NO INTERRUPT HANDLING @@ -175,6 +235,8 @@ MODCNT .SET MODCNT + 1 #ENDIF #ENDIF ; +; CONSISTENCY CHECKS +; #IF (INTMODE > 3) .ECHO "*** ERROR: INVALID INTMODE SETTING!!!\n" !!! ; FORCE AN ASSEMBLY ERROR @@ -210,56 +272,83 @@ MODCNT .SET MODCNT + 1 ; #DEFINE Z2_BANK(X) (PBANK(X) << 3) ; +; RTC LATCH +; +; MANY OF THE ROMWBW SYSTEMS USE A LATCH PORT PRIMARILY FOR BIT +; BANGING A DS-1302 RTC. HOWEVER, SINCE THE RTC ONLY NEEDS A COUPLE +; BITS, THE OTHER BITS OF THE LATCH ARE FREQUENTY USED FOR OTHER +; PURPOSES (LEDS, SD CARD BIT BANGING, ETC.). SEE DSRTC.ASM FOR +; A SUMMARY OF THE WAY THE RTC LATCH BITS ARE USED IN THE VARIOUS +; ROMWBW SYSTEMS. IT IS CRITICAL THAT WHEN MANIPULATING THE RTC +; LATCH THAT BITS ARE NOT FLIPPED INADVERTENTLY. THE RTC LATCH IS +; TYPICALLY WRITE-ONLY, SO WE NEED TO MAINTAIN A SHADOW COPY. +; THE SHADOW COPY IS CALLED HB_RTCVAL AND IS DECLARED AT THE END OF +; THIS FILE IN THE DATA AREA. +; +; INITIALIZING THE HB_RTCVAL SHADOW IS TRICKY BECAUSE DIFFERENT BITS +; ARE MANAGED IN DIFFERENT DRIVERS. TO HANDLE THIS, ; THE RTCDEF EQUATE IS INITIALIZED HERE AND UPDATED BY DRIVER INCLUDES ; THAT SHARE THE RTC LATCH. AS EACH DRIVER FILE IS INCLUDED, IT CAN -; USE .SET TO SET ANY BITS THEY OWN WITHIN THE RTC LATCH BYTE. -; SINCE RTCDEF IS CHANGED AFTER IT NEEDS TO BE USED BY THE CODE, IT -; CANNOT BE USED DIRECTLY TO SET THE LATCH. INSTEAD, THE FINAL VALUE +; USE .SET TO MODIFY THE DEFAULT VALUE OF ANY BITS THEY OWN. +; SINCE RTCDEF IS CHANGED *AFTER* IT NEEDS TO BE USED BY THE CODE, IT +; SHOULD NOT BE USED DIRECTLY TO SET THE LATCH. INSTEAD, THE FINAL VALUE ; OF RTCDEF IS USED TO INITIALIZE A STORAGE BYTE CALLED RTCDEFVAL AT -; THE END OF HBIOS.ASM. SO (RTCDEFVAL) CAN BE USED ANYWHERE IN -; HBIOS.ASM TO ACCESS THE FINAL RTCDEF VALUE. +; THE END OF THIS FILE. SO (RTCDEFVAL) CAN BE USED ANYWHERE IN +; HBIOS.ASM TO ACCESS THE FINAL RTCDEF VALUE. IN MOST PLACES, THE +; SHADOW COPY (RTCVAL) SHOULD BE USED TO GET THE CURRENT VALUE OF THE +; LATCH AND MAINTAIN ALL BIT CHANGES. ; -RTCDEF .EQU 0 ; ALLOWS DRIVERS TO SET BITS +RTCDEF .EQU 0 ; INIT DEF RTC LATCH VALUE +; +; THE SC126 HAS AN I2C CIRCUIT AND THERE IS NO ASSOCAITED +; DRIVER, SO WE SET THAT BIT HERE. IT IS SET FOR ALL OF THE SCXXX +; SYSTEMS, BUT IS UNUSED ON ALL BUT THE SC126. IT DOES NO HARM. ; #IF (PLATFORM == PLT_SCZ180) -RTCDEF .SET RTCDEF | %00000001 ; SC128 I2C SCL BIT +RTCDEF .SET RTCDEF | %00000001 ; SC128 I2C SCL BIT #ENDIF ; +; MBC PLATFORM IMPLEMENTS DYNAMIC SPEED SWITCH ON RTC LATCH +; BIT 3. SET THE BIT TO LOW SPEED AS DEFAULT HERE. +; #IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_MBC)) -RTCDEF .SET RTCDEF & ~%00001000 ; INITIAL SPEED LOW +RTCDEF .SET RTCDEF & ~%00001000 ; INITIAL SPEED LOW #ENDIF ; +; DUODYNE PLATFORM IMPLEMENTS DYNAMIC SPEED SWITCH ON RTC LATCH +; BIT 3. SET THE BIT TO LOW SPEED AS DEFAULT HERE. +; #IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_SBC)) -RTCDEF .SET RTCDEF | %00001000 ; INITIAL SPEED LOW +RTCDEF .SET RTCDEF | %00001000 ; INITIAL SPEED LOW #ENDIF ; -; +; EMIT FRONT PANEL CONFIGURATION TO ASSEMBLY OUTPUT ; #IF (FPLED_ENABLE | FPSW_ENABLE) - .ECHO "FP: " + DEVECHO "FP: " #IF (FPLED_ENABLE) - .ECHO "LEDIO=" - .ECHO FPLED_IO + DEVECHO "LEDIO=" + DEVECHO FPLED_IO #ENDIF #IF (FPLED_ENABLE & FPSW_ENABLE) - .ECHO ", " + DEVECHO ", " #ENDIF #IF (FPSW_ENABLE) - .ECHO "SWIO=" - .ECHO FPSW_IO + DEVECHO "SWIO=" + DEVECHO FPSW_IO #ENDIF - .ECHO "\n" + DEVECHO "\n" #ENDIF ; -; -; -#IFNDEF APPBOOT +;================================================================================================== +; Z80 PAGE ZERO, VECTORS, ETC. +;================================================================================================== ; .ORG 0 ; -;================================================================================================== -; NORMAL PAGE ZERO SETUP, RET/RETI/RETN AS APPROPRIATE, LEAVE INTERRUPTS DISABLED -;================================================================================================== +HB_PGZERO_BEG .EQU $ +; +#IFNDEF APPBOOT ; .FILL (000H - $),0FFH ; RST 0 JP HB_START @@ -305,12 +394,19 @@ DESC .DB "Copyright (C) 2024, Wayne Warthen, GNU GPL v3", 0 .FILL ($100 - $),$FF ; PAD REMAINDER OF PAGE ZERO ; #ENDIF +; + .ORG $100 +; +HB_PGZERO_END .EQU $ ; ;================================================================================================== ; HBIOS CONFIGURATION BLOCK (HCB) ;================================================================================================== ; .ORG HCB_LOC +; +HB_HCB_BEG .EQU $ +; HCB: JP HB_START ; @@ -356,11 +452,15 @@ CB_APP_BNKS .DB APP_BNKS ; .FILL (HCB + HCB_SIZ - $),0 ; PAD REMAINDER OF HCB ; +HB_HCB_END .EQU $ +; ;================================================================================================== ; HBIOS UPPER MEMORY PROXY (RELOCATED TO RUN IN TOP 2 PAGES OF CPU RAM) ;================================================================================================== ; ; THE FOLLOWING CODE IS RELOCATED TO THE TOP OF MEMORY TO HANDLE INVOCATION DISPATCHING +; +HB_PROXY_BEG .EQU $ ; .FILL (HBX_IMG - $) ; FILL TO START OF PROXY IMAGE START .ORG HBX_LOC ; ADJUST FOR RELOCATION @@ -369,8 +469,9 @@ CB_APP_BNKS .DB APP_BNKS ; ; HBIOS PROXY CODE $FE00 (256 BYTES) ; INTERRUPT VECTORS $FF00 (32 BYTES, 16 ENTRIES) -; INTERRUPT HANDLER STUBS $FF20 (128 BYTES) -; HBIOS PROXY COPY BUFFER $FF80 (64 BYTES) +; INTERRUPT HANDLER STUBS $FF20 (64 BYTES) +; HBIOS PROXY CODE $FF60 (64 BYTES) +; HBIOS PROXY COPY BUFFER $FFA0 (64 BYTES) ; HBIOS PROXY MGMT BLOCK $FFE0 (32 BYTES) ; ; DEFINITIONS @@ -384,9 +485,7 @@ HBX_IDENT: .DB RMJ << 4 | RMN ; FIRST BYTE OF VERSION INFO .DB RUP << 4 | RTP ; SECOND BYTE OF VERSION INFO ; -;================================================================================================== -; HBIOS ENTRY FOR RST 08 PROCESSING -;================================================================================================== +; HBIOS ENTRY FOR RST 08 PROCESSING ; ; NOTE: THE SIZE OF HBX_TMPSTK (TYPICALLY 20 BYTES) IS INSUFFICIENT FOR ; FREERTOS IF AN INTERRUPT STRIKES WHILE THE TEMPORARY STACK IS ACTIVE. @@ -484,10 +583,8 @@ HBX_BNKSEL_INT: ; NEEDED WHEN USING INT MODE 1 BECAUSE THAT MODE REQUIRES ; PAGE ONE TO HAVE A VALID INT HANDLER WHENEVER INTS ARE ; ENABLED. - ;BIT 7,A ; [8] TEST RAM BIT - ;JR Z,HBX_ROM ; [12/7] IF NOT SET, JUST DO ROM - OR A ; [4] SET FLAGS - JP P,HBX_ROM ; [10] BIT 7 INDICATES RAM + OR A ; SET FLAGS + JP P,HBX_ROM ; BIT 7 INDICATES RAM #ENDIF OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR HBX_ROM: @@ -585,7 +682,7 @@ HBX_ROM: OR A ; SET FLAGS JP P,HBX_ROM ; BIT 7 INDICATES RAM OUT (MPCL_ROM),A ; ENSURE ROM PAGE OUT OF MEMORY BEFORE SWITCH - ; SEE MBC RUNTIME MEMORY SIZE ADJUSTMENT + ; SEE MBC BANK SELECT MASK SETUP ROUTINE ABOVE HBX_MBCMSK .EQU $+1 ; FORCE TOP 32K ; MASK POPULATED XOR %00000000 ; TO BE IN FIRST CHIP ; DURING INITIALIZATION OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR @@ -648,6 +745,97 @@ HBX_ROM: RET ; DONE #ENDIF ; +#IF (MEMMGR == MM_Z280) +; +; REG A HAS BANK ID, REG B HAS INITIAL PDR TO PROGRAM +; REGISTERS AF, BC, HL DESTROYED +; +Z280_BNKSEL: + ;; *DEBUG* + ;CALL PC_LBKT + ;CALL PRTHEXBYTE + ;CALL PC_RBKT + + ; SELECT I/O PAGE $FE (SAVING PREVIOUS VALUE) + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + LDCTL HL,(C) ; GET CURRENT I/O PAGE + PUSH HL ; SAVE IT + LD L,$FF ; NEW I/O PAGE + LDCTL (C),HL ; IMPLEMENT +; + ; CONVERT BANK ID TO TOP 12 BITS OF PHYSICAL ADDRESS + ; WITH $0A IN THE LOW ORDER NIBBLE: + ; BANK ID: R000 BBBB + ; PDR: R000 0BBB B000 1010 (RCBUS) + ; PDR: 0000 RBBB B000 1010 (ZZ80MB) +; + MULTU A,$80 ; HL=0R00 0BBB B000 0000 + BIT 6,H ; RAM BIT SET? + JR Z,Z280_BNKSEL2 ; IF NOT, ALL DONE + RES 6,H ; OTHERWISE, REMOVE RAM BIT + LD A,RAMBIAS >> 6 ; RAM OFFSET (TOP 8 BITS) + OR H ; RECOMBINE + LD H,A ; AND PUT BACK IN H +; +Z280_BNKSEL2: +; + ; SET LOW NIBBLE + LD A,$0A ; VALUE FOR LOW NIBBLE + ADD HL,A ; ADD HL,A ; HL=0000 RBBB B000 1010 +; + ; POINT TO FIRST PDR TO PROGRAM + LD A,B ; INITIAL PDR TO PROG + OUT (Z280_MMUPDRPTR),A ; SET THE PDR POINTER +; + ; PROGRAM 8 PDRS + LD C,Z280_MMUBLKMOV ; PDR BLOCK MOVE PORT + ;LD B,8 ; PROGRAM 8 PDRS + LD A,$10 ; PDR VALUE INCREMENT +Z280_BNKSEL3: + ; PROGRAM 8 PDR VALUES + ; LOOP UNROLLED FOR SPEED + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + OUTW (C),HL ; WRITE VALUE + ADD HL,A ; BUMP VALUE + ;DJNZ Z280_BNKSEL3 ; DO ALL PDRS +; + ; RESTORE I/O PAGE + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + POP HL ; RECOVER ORIGINAL I/O PAGE + LDCTL (C),HL +; + RET +; +Z280_BNKSEL_LEN .EQU $ - Z280_BNKSEL +; +#ENDIF +; +; Z280 SYSCALL VECTOR ENTRY POINT. TAKES STACK PARAMETER AS A BRANCH +; ADDRESS AND CALLS IT. ALLOWS ANY USER MODE CODE TO CALL INTO AN +; ARBITRARY LOCATION OF SYSTEM MODE CODE. +; +#IF (MEMMGR == MM_Z280) +Z280_SYSCALL: + EX (SP),HL + LD (Z280_SYSCALL_GO + 1),HL + POP HL +Z280_SYSCALL_GO: + CALL $FFFF ; PARM SET ABOVE + RETIL ; RETURN FROM INT +#ENDIF ; ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; Copy Data - Possibly between banks. This resembles CP/M 3, but @@ -830,44 +1018,23 @@ HBX_PPRET: HBX_PPSP .EQU $ - 2 RET ; -; SPECIAL ROUTINE IN HIGH MEMORY TO PERFORM A COLD START ON Z280 -; THIS REQUIRES US TO REMAP LOW MEMORY, THEN JUMP TO ZERO -; -#IF (MEMMGR == MM_Z280) -; -Z280_RESTART: - DI ; KILL INTERRUPTS - LD SP,HBX_LOC ; STACK IN HIGH MEMORY -; - ; COPY Z280 BANK SELECT ROUTINE TO HIGH MEMORY - LD HL,Z280_BNKSEL - LD DE,$8000 - LD BC,Z280_BNKSEL_LEN - LDIR -; - ; MAKE ROM BOOT BANK ACTIVE IN LOW SYS MEM - LD A,BID_BOOT - LD B,$10 ; FIRST SYS PDR - CALL $8000 ; DO IT -; - ; NOW JUST JUMP TO START OF ROM BOOT CODE - JP 0 -#ENDIF -; ; PRIVATE STACK AT END OF HBIOS CODE ; OCCUPIES SPACE BEFORE IVT ; +#IF (MEMMGR != MM_Z280) +; HBX_INTSTKSIZ .EQU $FF00 - $ - .ECHO "HBIOS INT STACK space: " - .ECHO HBX_INTSTKSIZ - .ECHO " bytes.\n" + MEMECHO "HBIOS INT STACK space: " + MEMECHO HBX_INTSTKSIZ + MEMECHO " bytes.\n" .FILL HBX_INTSTKSIZ,$FF HBX_INTSTK .EQU $ ; -;#IF (HBX_INTSTKSIZ < 24) -#IF (HBX_INTSTKSIZ < 22) + #IF (HBX_INTSTKSIZ < 22) .ECHO "*** ERROR: INTERRUPT STACK IS TOO SMALL!!!\n" !!! ; FORCE AN ASSEMBLY ERROR + #ENDIF +; #ENDIF ; ; HBIOS INTERRUPT SLOT ASSIGNMENTS @@ -890,6 +1057,9 @@ HBX_INTSTK .EQU $ ; 13 SIO0 ; 14 SIO1 ; 15 +; + ; IVT MUST START AT PAGE BOUNDARY + ALIGN($100) ; HBX_IVT: .DW HBX_IV00 @@ -985,6 +1155,13 @@ HBX_RETI: PUSH BC ; SAVE BC PUSH DE ; SAVE DE PUSH IY ; SAVE IY +; +#IF (PLATFORM == PLT_NABU) + PUSH HL + LD HL,($FFEA) ; TICCNT COPIED TO... + LD ($000B),HL ; ...LOW MEMORY FOR CP/M + POP HL +#ENDIF ; LD A,BID_BIOS ; HBIOS BANK CALL HBX_BNKSEL_INT ; SELECT IT @@ -1022,9 +1199,9 @@ HBX_INT_SP .EQU $ - 2 ; SMALL TEMPORARY STACK FOR USE BY HBX_BNKCPY ; HBX_TMPSTKSIZ .EQU (HBX_XFC - HBX_BUFSIZ - $) - .ECHO "HBIOS TEMP STACK space: " - .ECHO HBX_TMPSTKSIZ - .ECHO " bytes.\n" + MEMECHO "HBIOS TEMP STACK space: " + MEMECHO HBX_TMPSTKSIZ + MEMECHO " bytes.\n" .FILL HBX_TMPSTKSIZ,$CC HBX_TMPSTK .EQU $ ; @@ -1039,39 +1216,34 @@ HBX_BUF_END .EQU $ ; ; HBIOS PROXY MGMT BLOCK (TOP 32 BYTES) ; -#IFDEF ROMBOOT - .DB BID_BOOT ; HB_CURBNK: CURRENTLY ACTIVE LOW MEMORY BANK ID -#ELSE - .DB BID_USR ; HB_CURBNK: CURRENTLY ACTIVE LOW MEMORY BANK ID -#ENDIF - .DB $FF ; HB_INVBNK: BANK ACTIVE AT TIME OF HBIOS CALL INVOCATION - .DW 0 ; HB_SRCADR: BNKCPY SOURCE ADDRESS - .DB BID_USR ; HB_SRCBNK: BNKCPY SOURCE BANK ID - .DW 0 ; HB_DSTADR: BNKCPY DESTINATION ADDRESS - .DB BID_USR ; HB_DSTBNK: BNKCPY DESTINATION BANK ID - .DW 0 ; HB_CPYLEN: BNKCPY LENGTH - .DW 0 ; RESERVED FOR OPTIONAL TICK CTR, PLATFORM DEPENDENT - .DW 0 ; RESERVED FOR FUTURE HBIOS USE - .DB 0 ; SHADOW VALUE FOR RTC LATCH PORT - .DB $FE ; HB_LOCK: HBIOS MUTEX LOCK - JP HBX_INVOKE ; HB_INVOKE: FIXED ADR ENTRY FOR HBX_INVOKE (ALT FOR RST 08) - JP HBX_BNKSEL ; HB_BNKSEL: FIXED ADR ENTRY FOR HBX_BNKSEL - JP HBX_BNKCPY ; HB_BNKCPY: FIXED ADR ENTRY FOR HBX_BNKCPY - JP HBX_BNKCALL ; HB_BNKCALL: FIXED ADR ENTRY FOR HBX_BNKCALL - .DW HBX_IDENT ; ADDRESS OF HBIOS PROXY START (DEPRECATED) - .DW HBX_IDENT ; HB_IDENT: ADDRESS OF HBIOS IDENT INFO DATA BLOCK + .DB BID_BOOT ; (+0) HB_CURBNK: CURRENTLY ACTIVE LOW MEMORY BANK ID + .DB $FF ; (+1) HB_INVBNK: BANK ACTIVE AT TIME OF HBIOS CALL INVOCATION + .DW 0 ; (+2) HB_SRCADR: BNKCPY SOURCE ADDRESS + .DB BID_USR ; (+4) HB_SRCBNK: BNKCPY SOURCE BANK ID + .DW 0 ; (+5) HB_DSTADR: BNKCPY DESTINATION ADDRESS + .DB BID_USR ; (+7) HB_DSTBNK: BNKCPY DESTINATION BANK ID + .DW 0 ; (+8) HB_CPYLEN: BNKCPY LENGTH + .DW 0 ; (+10) RESERVED FOR OPTIONAL TICK CTR, PLATFORM DEPENDENT + .DW 0 ; (+12) RESERVED FOR FUTURE HBIOS USE + .DB 0 ; (+14) SHADOW VALUE FOR RTC LATCH PORT + .DB $FE ; (+15) HB_LOCK: HBIOS MUTEX LOCK + JP HBX_INVOKE ; (+16) HB_INVOKE: FIXED ADR ENTRY FOR HBX_INVOKE (ALT FOR RST 08) + JP HBX_BNKSEL ; (+19) HB_BNKSEL: FIXED ADR ENTRY FOR HBX_BNKSEL + JP HBX_BNKCPY ; (+22) HB_BNKCPY: FIXED ADR ENTRY FOR HBX_BNKCPY + JP HBX_BNKCALL ; (+25) HB_BNKCALL: FIXED ADR ENTRY FOR HBX_BNKCALL + .DW HBX_IDENT ; (+28) ADDRESS OF HBIOS PROXY START (DEPRECATED) + .DW HBX_IDENT ; (+30) HB_IDENT: ADDRESS OF HBIOS IDENT INFO DATA BLOCK ; .FILL MEMTOP - $ ; FILL TO END OF MEMORY (AS NEEDED) - .ORG HBX_IMG + HBX_SIZ ; RESET ORG + .ORG HBX_IMG + HBX_SIZ ; RESTORE ORG ; -;================================================================================================== -; HBIOS CORE -;================================================================================================== +HB_PROXY_END .EQU $ ; ;================================================================================================== ; ENTRY VECTORS (JUMP TABLE) AND INTERNAL PROCESSING STACK ;================================================================================================== ; +HB_ENTRY_BEG .EQU $ HB_ENTRYTBL .EQU $ ; JP HB_START ; HBIOS INITIALIZATION @@ -1084,6 +1256,7 @@ HB_STKSIZ .EQU $100 - ($ & $FF) ; .FILL HB_STKSIZ,$FF ; USE REMAINDER OF PAGE FOR HBIOS STACK HB_STACK .EQU $ ; TOP OF HBIOS STACK +HB_ENTRY_END .EQU $ ; ;================================================================================================== ; INTERRUPT VECTOR TABLE (MUST START AT PAGE BOUNDARY!!!) @@ -1102,6 +1275,8 @@ HB_STACK .EQU $ ; TOP OF HBIOS STACK ; NOTE THAT EACH ENTRY HAS A FILLER BYTE OF VALUE ZERO. THIS BYTE ; HAS NO FUNCTION. IT IS JUST USED TO MAKE ENTRIES AN EVEN 4 BYTES. ; +HB_INTVEC_BEG .EQU $ +; HB_IVT: HB_IVT00: JP HB_BADINT \ .DB 0 HB_IVT01: JP HB_BADINT \ .DB 0 @@ -1145,27 +1320,39 @@ HB_IM1INT: CALL HB_BADINT \ RET NZ CALL HB_BADINT \ RET NZ ; +HB_IM1CNT .DB 0 ; NUMBER OF ENTRIES IN CALL LIST +HB_IM1MAX .DB 8 ; MAX ENTRIES IN CALL LIST +HB_IM1PTR .DW HB_IM1INT ; POINTER FOR NEXT IM1 ENTRY +; +HB_INTVEC_END .EQU $ +; ;================================================================================================== ; SYSTEM INITIALIZATION ;================================================================================================== ; +HB_SYSINIT_BEG .EQU $ +; HB_START: ; #IFDEF APPBOOT - #IF (MEMMGR == MM_Z280) - LD DE,Z280_BOOTERR ; POINT TO ERROR MESSAGE - LD C,9 ; BDOS FUNC 9: WRITE STR - JP $0005 ; DO IT AND RETURN TO OS + ; THE CODE TO PREPARE FOR AN APPBOOT IS "HIDDEN" IN HB_WRKBUF. + ; WE ARE OPERATING ON THE (MINIMAL) BDOS STACK, BUT THAT + ; SHOULD BE FINE FOR THIS LIMITED ACTIVITY. + CALL HB_APPBOOT ; PREPARE APP BOOT + RET NZ ; RETURN ON ERROR +; +HB_APPBOOT_Z: ; -Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 native memory management!!!\r\n\r\n$" - #ENDIF #ENDIF ; DI ; NO INTERRUPTS IM 1 ; INTERRUPT MODE 1 ; #IF ((PLATFORM == PLT_DUO) & TRUE) - ; WAIT A WHILE + ; THIS ARBITRARY DELAY SEEMS TO HELP DUODYNE CPU V1.0 SYSTEMS + ; STARTUP CLEANLY. DOUDYNE CPU V1.1 INTRODUCES A RESET + ; SUPERVISOR AND THIS DELAY IS UNNECESSARY. WE DON'T KNOW + ; IF WE ARE ON A V1.1 THOUGH, SO WE ALWAYS DO THE DELAY. LD HL,0 BOOTWAIT: DEC HL @@ -1174,14 +1361,15 @@ BOOTWAIT: JR NZ,BOOTWAIT #ENDIF ; - ; EARLY RTC LATCH BYTE INITIALIZATION - ; FOR SOME PLATFORMS THIS CONTROLS HI/LO SPEED CIRCUIT - ; NOTE: WE WANT TO USE (RTCDEFVAL) HERE, BUT THE Z2 MEMORY - ; MANAGER STARTS UP WITH THE FIRST 16K OF ROM MAPPED TO ALL - ; 4 16K BANKS OF CPU SPACE. SO, IF RTCDEVFAL IS LOCATED AFTER - ; PAST 16K, WE DON'T HAVE ACCESS TO IT. FOR NOW, WE JUST USE - ; RTCDEF WHICH IS SUBOPTIMAL, BUT PROBABLY DOES NOT CAUSE ANY - ; PROBLEMS. +; EARLY RTC LATCH BYTE INITIALIZATION +; FOR SOME PLATFORMS THIS CONTROLS HI/LO SPEED CIRCUIT +; NOTE: WE WANT TO USE (RTCDEFVAL) HERE, BUT THE Z2 MEMORY +; MANAGER STARTS UP WITH THE FIRST 16K OF ROM MAPPED TO ALL +; 4 16K BANKS OF CPU SPACE. SO, IF RTCDEVFAL IS LOCATED AFTER +; PAST 16K, WE DON'T HAVE ACCESS TO IT. FOR NOW, WE JUST USE +; RTCDEF WHICH IS SUBOPTIMAL, BUT PROBABLY DOES NOT CAUSE ANY +; PROBLEMS. +; ;LD A,(RTCDEFVAL) ; GET DEFAULT VALUE LD A,RTCDEF ; DEFAULT VALUE OUT (RTCIO),A ; SET IT @@ -1196,91 +1384,126 @@ BOOTWAIT: OUT0 (RPH_ACR),A ; ... REGISTER IS INITIALIZED #ENDIF ; +; INITIALIZE DIAGNOSTIC AND/OR FRONT PANEL LED(S) TO INDICATE THE +; SYSTEM IS ALIVE. WE HAVE NO RAM AT THIS TIME, SO WE CANNOT USE +; THE NORMAL DIAG() OR FPLEDS() MACROS WHICH DEPEND UPON A STACK. +; SO, JUST HACK THE VALUES IN PLACE. +; #IF (FPLED_ENABLE) - ; NO STACK YET, SO CAN'T USE DIAG() MACRO - LD A,DIAG_01 #IF (FPLED_INV) - XOR $FF ; INVERT BITS IF NEEDED + LD A,~DIAG_01 + #ELSE + LD A,DIAG_01 #ENDIF +; OUT (FPLED_IO),A #ENDIF +; #IF (LEDENABLE) - #IF (LEDMODE == LEDMODE_STD) + #IF ((LEDMODE == LEDMODE_STD) | (LEDMODE == LEDMODE_SC)) XOR A ; LED IS INVERTED, TURN IT ON #ENDIF #IF (LEDMODE == LEDMODE_RTC) ; CAN'T USE (RTCDEFVAL) YET, SEE COMMENTS ABOVE ;LD A,(RTCDEFVAL) ; DEFAULT LATCH VALUE - LD A,RTCDEF ; DEFAULT LATCH VALUE - OR %00000001 ; LED 0 ON + LD A,RTCDEF | %00000001 ; LED 0 ON + #ENDIF + #IF (LEDMODE == LEDMODE_NABU) + LD A,%00001000 ; LOW LED BIT ONLY #ENDIF OUT (LEDPORT),A #ENDIF ; - ; WARNING: ALTHOUGH WE ARE INITIALIZING SP HERE, IT IS NOT YET - ; SAFE TO PUSH VALUES TO THE STACK BECAUSE SOME PLATFORMS WILL - ; NOT YET HAVE RAM MAPPED TO THE UPPER 32K YET! +; INITIALIZE SP +; +; WARNING: ALTHOUGH WE ARE INITIALIZING SP HERE, IT IS NOT YET +; SAFE TO PUSH VALUES TO THE STACK BECAUSE SOME PLATFORMS WILL +; NOT YET HAVE RAM MAPPED TO THE UPPER 32K YET! +; LD SP,HBX_LOC ; SETUP INITIAL STACK JUST BELOW HBIOS PROXY ; +; Z280 BARE METAL INIT +; #IF (CPUFAM == CPU_Z280) + ; CLEAR THE MASTER STATUS REGISTER + LD C,Z280_MSR ; MASTER STATUS REGISTER + LD HL,$0000 ; SYS MODE, NO INTERRUPTS + LDCTL (C),HL ; DO IT +; ; SET MAXIMUM I/O WAIT STATES FOR NOW LD C,Z280_BTCR ; BUS TIMING AND CONTROL REGISTER LD HL,$0033 ; 3 I/O WAIT STATES ADDED - LDCTL (C),HL + LDCTL (C),HL ; DO IT ; - ; START BY SELECTING I/O PAGE $FF + ; SELECT I/O PAGE $FF FOR INTERNAL SYSTEM REGISTER ACCESS LD L,$FF ; MMU AND DMA PAGE I/O REG IS $FF LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER - LDCTL (C),HL + LDCTL (C),HL ; DO IT +; + ; DISABLE MEMORY REFRESH CYCLES + LD A,$08 ; REFRESH DISABLED + OUT (Z280_RRR),A ; DO IT +; + ; INITIALIZE CACHE CONTROL REGISTER + LD A,$20 ; CACHE INSTRUCTIONS, NOT DATA + OUT (Z280_CCR),A ; DO IT +; + ; INITIALIZE TRAP CONTROL REGISTER + LD A,$00 ; ALLOW USER I/O, NO EPU, NO STK WARN + OUT (Z280_TCR),A ; DO IT ; #IF (MEMMGR == MM_Z280) ; - ; INITIALIZE ALL OF THE SYSTEM PAGE DESCRIPTORS WITH BLOCK MOVE - XOR A ; FIRST USER PDR + ; BEFORE ENABLING MMU W/ USER & SYSTEM PAGE TRANSLATION, + ; WE INITIALIZE ALL PDRS. HOWEVER, FOR AN APP + ; BOOT, THE LOW RAM PDRS ARE ALREADY CORRECT AND SHOULD BE + ; LEFT ALONE. +; + ; INITIALIZE ALL OF THE USER PAGE DESCRIPTORS WITH BLOCK MOVE +#IFDEF APPBOOT + LD A,$08 ; FIRST USER PDR IN HI MEM +#ELSE + LD A,$00 ; FIRST USER PDR +#ENDIF OUT (Z280_MMUPDRPTR),A ; SET THE PDR POINTER LD HL,Z280_BOOTPDRTBL ; START OF PDR VALUES TABLE LD C,Z280_MMUBLKMOV ; PDR BLOCK MOVE PORT - LD B,16 ; PROGRAM 16 PDRS - OTIRW ; OTIRW + LD B,Z280_PDRCNT ; NUMBER OF PDR ENTRIES TO PROG + OTIRW ; OTIRW PROGS PDRS SEQUENTIALLY ; - ; INITIALIZE ALL OF THE USER PAGE DESCRIPTORS WITH BLOCK MOVE + ; INITIALIZE ALL OF THE SYSTEM PAGE DESCRIPTORS WITH BLOCK MOVE +#IFDEF APPBOOT + LD A,$18 ; FIRST SYSTEM PDR IN HI MEM +#ELSE LD A,$10 ; FIRST SYSTEM PDR +#ENDIF OUT (Z280_MMUPDRPTR),A ; SET THE PDR POINTER LD HL,Z280_BOOTPDRTBL ; START OF PDR VALUES TABLE LD C,Z280_MMUBLKMOV ; PDR BLOCK MOVE PORT - LD B,16 ; PROGRAM 16 PDRS - OTIRW ; OTIRW + LD B,Z280_PDRCNT ; NUMBER OF PDR ENTRIES TO PROG + OTIRW ; OTIRW PROGS PDRS SEQUENTIALLY ; ; ENABLE MMU (SYSTEM AND USER TRANSLATION) LD C,Z280_MMUMCR ; MMU MASTER CONTROL REGISTER LD HL,$BBFF ; ENABLE USER & SYSTEM TRANSLATE OUTW (C),HL -; - ; DISABLE MEMORY REFRESH CYCLES - LD A,$08 ; DISABLED - OUT (Z280_RRR),A ; SET REFRESH RATE REGISTER -; - ; CONFIGURE Z280 INT/TRAP VECTOR TABLE POINTER REGISTER - ; WILL POINT TO ROM COPY FOR NOW, UPDATED TO RAM LATER ON - LD C,Z280_VPR - LD HL,Z280_IVT >> 8 ; TOP 16 BITS OF PHYSICAL ADR OF IVT - LDCTL (C),HL ; JR Z280_INITZ ; JUMP TO CODE CONTINUATION ; - ; WORD ALIGN THE PDR TABLE - ALIGN(2) + ALIGN(2) ; WORD ALIGN THE PDR TABLE ; Z280_BOOTPDRTBL: +#IFNDEF APPBOOT ; LOWER 32 K (BANKED) - .DW ($000 << 4) | $A - .DW ($001 << 4) | $A - .DW ($002 << 4) | $A - .DW ($003 << 4) | $A - .DW ($004 << 4) | $A - .DW ($005 << 4) | $A - .DW ($006 << 4) | $A - .DW ($007 << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 0) << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 1) << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 2) << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 3) << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 4) << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 5) << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 6) << 4) | $A + .DW ((Z2_BANK(BID_BOOT) + 7) << 4) | $A +#ENDIF ; UPPER 32 K (COMMON) .DW ((Z2_BANK(BID_COM) + 0) << 4) | $A .DW ((Z2_BANK(BID_COM) + 1) << 4) | $A @@ -1291,17 +1514,21 @@ Z280_BOOTPDRTBL: .DW ((Z2_BANK(BID_COM) + 6) << 4) | $A .DW ((Z2_BANK(BID_COM) + 7) << 4) | $A ; +Z280_PDRCNT .EQU ($ - Z280_BOOTPDRTBL) / 2 +; Z280_INITZ: ; #ENDIF ; - ; RESTORE I/O PAGE TO $00 + ; RESTORE I/O PAGE TO $00 FOR NORMAL USER I/O SPACE LD L,$00 ; NORMAL I/O REG IS $00 LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER LDCTL (C),HL ; #ENDIF ; +; Z180 BARE METAL INIT +; #IF (CPUFAM == CPU_Z180) ; SET BASE FOR CPU IO REGISTERS ; DO NOT USE Z180_ICR FROM Z180.INC BECAUSE THE ICR @@ -1353,6 +1580,8 @@ Z280_INITZ: ; #ENDIF ; +; EIPC BARE METAL INIT +; #IF (EIPCENABLE) LD A,(EIPC_WDT_CONST | EIPC_HALT_RUN | EIPC_WDT_P2_22) OUT (EIPC_WDTMR),A ; CLEAR WDTE BIT (DISABLE WATCHDOG) @@ -1369,59 +1598,16 @@ Z280_INITZ: OUT (EIPC_SCDP),A ; SET SYSTEM CONTROL DATA PORT (SCDP) #ENDIF ; -#IF ((MEMMGR == MM_SBC) | (MEMMGR == MM_MBC)) - ; SET PAGING REGISTERS - #IFDEF ROMBOOT - XOR A - OUT (MPCL_RAM),A ; REMOVE RAM FIRST! - OUT (MPCL_ROM),A ; SELECT ROM PAGE 0 - #ENDIF -#ENDIF -; -#IF (MEMMGR == MM_Z2) - ; SET PAGING REGISTERS - #IFDEF ROMBOOT - XOR A - OUT (MPGSEL_0),A - INC A - OUT (MPGSEL_1),A - #ENDIF +;-------------------------------------------------------------------------------------------------- +; PLATFORM MEMORY MANAGEMENT INITIALIZATION +;-------------------------------------------------------------------------------------------------- ; - #IF (PLATFORM == PLT_DUO) - LD A,128 + (RAMSIZE / 16) - 2 - #ELSE - LD A,64 - 2 - #ENDIF +; INITIALIZE MEMORY MANAGERS AS NEEDED TO ADDRESS BOOT ROM IN LOW 32K +; AND COMMON RAM IN HIGH 32K. SETUP MMU FOR BANKING IN LOWER 32K. ; - OUT (MPGSEL_2),A - INC A - OUT (MPGSEL_3),A - ; ENABLE PAGING - LD A,1 - OUT (MPGENA),A -#ENDIF -; -; AT THIS POINT, RAM SHOULD BE AVAILABLE IN THE COMMON BANK -; (TOP 32K). -; -; NOTIFICATION THAT WE HAVE MADE THE JUMP TO RAM BANK! -; THE DIAG() MACRO IS NOT USED BECAUSE IT USES THE STACK AND WE DO -; NOT WANT TO EFFECT RAM UNTIL AFTER THE BACKUP BATTERY STATUS CHECK -; IS PERFORMED NEXT. -; -#IF (FPLED_ENABLE) - ; NO STACK YET, SO CAN'T USE DIAG() MACRO - LD A,DIAG_02 - #IF (FPLED_INV) - XOR $FF ; INVERT BITS IF NEEDED - #ENDIF - OUT (FPLED_IO),A -#ENDIF - -; -; Z180 MINI-ITX MADNESS TO INITIALIZE THE PPIO. WE HAVE THE MAIN RAM AT -; $8000 AND ROM AT $0 AT THIS POINT AND THE Z180 MMU SET UP. NOW -; GET THE 82C55 PROGRAMMED. +; Z180 MINI-ITX MADNESS TO INITIALIZE THE PPIO. WE HAVE THE MAIN RAM AT +; $8000 AND ROM AT $0 AT THIS POINT AND THE Z180 MMU SET UP. NOW +; GET THE 82C55 PROGRAMMED. ; #IF (PLATFORM == PLT_EPITX) ; THE 82C55 IS BRAINDEAD AND FLIPS OUTPUT LINES TO 0 WHEN WE SET @@ -1454,6 +1640,67 @@ ROMRESUME: ; #ENDIF ; +; SBC AND MBC MMU INITIALIZATION +; +#IF ((MEMMGR == MM_SBC) | (MEMMGR == MM_MBC)) + ; SET PAGING REGISTERS + #IFDEF ROMBOOT + XOR A + OUT (MPCL_RAM),A ; REMOVE RAM FIRST! + OUT (MPCL_ROM),A ; SELECT ROM PAGE 0 + #ENDIF +#ENDIF +; +; ZETA 2 AND DUO MMU INITIALIZATION +; +; ZETA 2 MMU USES 4 16K PAGES TO MAP PHYSICAL MEMORY TO CPU MEMORY. +; HBIOS USES THE LOWER 2 16K PAGES FOR BANKING AND UPPER 2 16K PAGES +; FOR COMMON. NORMALLY, A ZETA 2 BASED SYSTEM WILL CONTAIN 512K OF +; PHYSICAL ROM FOLLOWED BY 512K OF PHYSICAL RAM. DUO USES A PHYSICAL +; ADDRESS SPACE OF 4096K WITH THE FIRST 2048K AS ROM AND THE FOLLOWING +; 2048K AS RAM. THE SIZE OF ROM AND RAM CAN VARY FOR DUO, BUT THE +; RAM BOUNDARY IS ALWAYS AT 2048K. +; +#IF (MEMMGR == MM_Z2) +; + #IFDEF ROMBOOT + ; IF THIS IS A ROM BOOT, SETUP THE FIRST 2 16K MMU REGISTERS + ; TO MAP THE LOWEST 32K OF PHYSICAL ROM TO THE LOW 32K OF + ; CPU ADDRESS SPACE (BANKING AREA). THE FIRST 16K MAPPING IS + ; REDUNDANT BECAUSE WE ARE ALREADY RUNNING IN THIS AREA. THE + ; MAPPING OF THE SECOND 16K IS CRITICAL BECAUSE ALL ZETA 2 + ; MMU REGISTERS WILL BE 0 AT RESET! + XOR A + OUT (MPGSEL_0),A ; PROG FIRST 16K MMU REGISTER + INC A + OUT (MPGSEL_1),A ; PROG SECOND 16K MMU REGISTER + #ENDIF +; + #IF (PLATFORM == PLT_DUO) + ; DUO HAS VARIABLE RAM SIZE. RAM ALWAYS STARTS AT 2048K. + ; SETUP COMMON RAM FOR HIGHEST 32K OF RAM BASED ON TOTAL RAM. + LD A,128 + (RAMSIZE / 16) - 2 + #ELSE + ; NORMAL ZETA 2 SYSTEM HAS FIXED 512K OF RAM. SETUP COMMON + ; FOR TOP 32K OF THIS. + LD A,64 - 2 + #ENDIF +; + OUT (MPGSEL_2),A ; PROG THIRD 16K MMU REGISTER + INC A + OUT (MPGSEL_3),A ; PROG FOURTH 16K MMU REGISTER + ; ENABLE PAGING + LD A,1 + OUT (MPGENA),A ; ENABLE MMU NOW +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; PROXY INSTALLATION +;-------------------------------------------------------------------------------------------------- +; +; AT THIS POINT, RAM SHOULD BE AVAILABLE IN THE COMMON BANK +; (TOP 32K). +; ; WE USE THE TWO BYTES IMMEDIATELY BELOW THE PROXY TO STORE A COUPLE ; VALUES TEMPORARILY BECAUSE WE MAY BE OPERATING IN ROM AT THIS POINT. ; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBANK @@ -1465,7 +1712,7 @@ ROMRESUME: ; CHECK BATTERY BACKUP STATUS BEFORE WE TOUCH RAM (UPPER MEMORY) ; ; IF A DS1210 POWER CONTROLLER IS INSTALLED AND BATTERY BACKUP IS NOT INSTALLED -; OR IS LESS THAN 2V THEN THE DS1210 WILL BLOCK THE SECOND RAM ACCESS. +; OR IS LESS THAN 2V THEN THE DS1210 WILL BLOCK THE *SECOND* RAM ACCESS. ; FAILURE TO COMPLETE TWO RAM ACCESSES BEFORE INSTALLING PROXY WILL RESULT ; IN THE ROM ID BYTES NOT BEING COPIED CORRECTLY AND CP/M APPLICATIONS ; WILL NOT START CORRECTLY WHEN THEY CHECK THE ROM ID VERSION BYTES. @@ -1476,29 +1723,31 @@ ROMRESUME: ; LD HL,HBX_LOC - 1 ; POINT TO BYTE XOR A ; ZERO MEANS LOW BAT - LD (HL),A + LD (HL),A ; FIRST RAM ACCESS INC A ; 1 MEANS BAT OK - LD (HL),A + LD (HL),A ; SECOND RAM ACCESS (BLOLCKED IF BATTERY ISSUE) ; ; INSTALL PROXY IN UPPER MEMORY -; THE HB_CURBNK MUST BE PRESERVED IF THIS IS AN APPBOOT. ; - LD A,(HB_CURBNK) ; SAVE EXISTING HB_CURBNK - LD DE,HBX_LOC ; AS PER ABOVE - LD HL,HBX_IMG - LD BC,HBX_SIZ - LDIR + LD DE,HBX_LOC ; RUNNING LOCATION OF PROXY + LD HL,HBX_IMG ; LOCATION OF PROXY IMAGE + LD BC,HBX_SIZ ; SIZE OF PROXY + LDIR ; COPY IT ; -#IFDEF APPBOOT - LD (HB_CURBNK),A ; RESTORE HB_CURBNK -#ENDIF +; NOTIFICATION THAT WE HAVE COMPLETED HARDWARE INIT. +; + FPLEDS(DIAG_02) +; +;-------------------------------------------------------------------------------------------------- +; S100 MONITOR LAUNCH +;-------------------------------------------------------------------------------------------------- ; ; S100 ROM CONTAINS A HARDWARE LEVEL MONITOR IN BANK ID 3 OF ROM. ; IF PORT $75 BIT 1 IS SET (SET IS ZERO), THEN WE IMMEDIATELY ; TRANSITION TO THIS MONITOR. PRIOR TO THE TRANSITION, WE ALSO ; CHECK THE VALUE IN THE Z180 RELOAD REGISTER LOW. IF IT IS ASCII 'W', ; THEN IT MEANS THE S100 MONITOR IS ATTEMPTING TO REBOOT INTO ROMWBW -; HBIOS. +; HBIOS AND WE ABORT THE TRANSITION TO THE S100 MONITOR. ; #IF ((PLATFORM == PLT_S100) & TRUE) ; CHECK S100 BOARD DIP SWITCH, BIT 1 @@ -1523,20 +1772,9 @@ S100MON_SKIP: OUT0 (Z180_RLDR1L),A #ENDIF ; -; SAVE CURRENT BANKID -; -; THIS IS NOT GOING TO WORK IF THE APP BOOT IMAGE IS LOADED -; USING THE UNA FAT32 LOADER. SHOULD PROBABLY CHECK THAT THERE -; IS A VALID ROMWBW PROXY IN MEMORY BEFORE DOING THIS. HOWEVER, -; THIS USE CASE IS PROBABLY NON-EXISTENT. THE IMG BOOT IMAGE -; SHOULD WORK FINE WITH THE UNA FAT32 LOADER. -; -; THIS VALUE IS TEMPORARILY STORED AT HBX_LOC - 2 -; BECAUSE WE ARE CURRENTLY RUNNING IN ROM. AFTER WE TRANSITION HBIOS -; TO RAM, THE VALUE IS MOVED TO IT'S REAL LOCATION AT HB_APPBNK. -; - LD A,(HB_CURBNK) ; GET HB_CURBNK - LD (HBX_LOC - 2),A ; ... AND SAVE TEMP FOR APPBNK +;-------------------------------------------------------------------------------------------------- +; RTC LATCH INITIALIZATION +;-------------------------------------------------------------------------------------------------- ; ; WE CAN NOW DO THE REAL INITIALIZATION OF THE RTC LATCH BASED ON ; (RTCDEFVAL). AT THIS POINT WE SHOULD HAVE ACCESS TO THE ROM LOCATION @@ -1546,200 +1784,135 @@ S100MON_SKIP: ; CREATED. ; LD A,(RTCDEFVAL) - OUT (RTCIO),A ; SET IT LD (HB_RTCVAL),A + OUT (RTCIO),A ; SET IT + DIAG(1) ; REAPPLY CURRENT DIAG LED SETUP ; -#IFDEF TESTING +;-------------------------------------------------------------------------------------------------- +; DYNAMIC RAM SIZER (IN DEVELOPMENT) +;-------------------------------------------------------------------------------------------------- +; +#IFDEF SIZERAM ; ; THIS IS WHERE WE PROBE FOR THE ACTUAL NUMBER OF RAM ; BANKS AVAILABLE IN THE SYSTEM. THE PROBE CODE NEEDS ; TO BE COPIED TO AND RUN FROM THE COMMON RAM BANK. +; + + #IF (MEMMGR == MM_MBC) + ; MBC REQUIRES A BANK SELECT MASK TO BE SETUP IN THE MBC + ; BANK SELECT ROUTINE. HOWEVER, THE MASK IS DERIVED FROM THE + ; TOTAL SIZE OF THE RAM IN THE SYSTEM (SEE MBC BANK SELECT + ; MASK SETUP BELOW). SO, WE HAVE A CATCH-22 + ; HERE FOR MBC. THE DYNAMIC RAM SIZING REQUIRES THE THE MASK + ; AND THE MASK SETUP REQUIRES THE TOTAL RAM SIZE. SO, FOR MBC, + ; WE CAN'T DO DYNAMIC RAM SIZING. +; + .ECHO "*** ERROR: DYNAMIC RAM SIZING NOT POSSIBLE FOR MBC!!!\n" + !!! ; FORCE AN ASSEMBLY ERROR + #ENDIF ; LD DE,$F000 LD HL,RS_IMAGE LD BC,RS_LEN LDIR CALL RS_START - JP RS_IMAGE + RS_LEN -; -; CODE THAT IS COPIED TO $F000 TO PERFORM RAM SIZE DETECTION -; -RS_IMAGE: - .ORG $F000 -RS_START: - LD A,(HB_CURBNK) ; GET CURRENT BANK - PUSH AF ; SAVE IT - - LD C,0 ; RUNNING BANK COUNT - LD HL,$7FFF ; BYTE TEST ADDRESS - LD IX,RS_ARY ; ORIG BYTE STORAGE ARRAY PTR -RS_LOOP1: - LD A,C - ADD A,$80 ; OFFSET BY START OF RAM BANKS - CALL HBX_BNKSEL ; SELECT THE BANK - - LD A,(HL) ; GET ORIGINAL VALUE - LD (IX),A ; SAVE IT TO RESTORE LATER - INC IX ; BUMP IX - - LD A,$AA ; TEST LOC WITH $AA - LD (HL),A ; AVOID PROBLEMS WITH - LD (HL),A ; ... DS1210 - LD (HL),A - LD A,(HL) - CP $AA - JR NZ,RS_DONE - - LD A,$55 ; TEST LOC WITH $55 - LD (HL),A - LD A,(HL) - CP $55 - JR NZ,RS_DONE - - ; STORE A UNIQUE VALUE - LD A,C - LD (HL),A - OR A ; ZERO? - JR Z,RS_NEXT ; SKIP STORED VALUE CHECK - - ; VERIFY ALL STORED VALUES - LD B,C ; INIT LOOP COUNTER - LD E,0 ; INIT BANK ID -RS_LOOP3: - LD A,E - ADD A,$80 - CALL HBX_BNKSEL - LD A,(HL) - CP E ; VERIFY - JR NZ,RS_DONE ; ABORT IF MISCOMPARE - INC E ; NEXT BANK - DJNZ RS_LOOP3 -; -RS_NEXT: - INC C ; ADD 1 TO RAM BANK COUNT - JR RS_LOOP1 ; AND LOOP TILL DONE -; -RS_DONE: - LD E,C ; FINAL BANK COUNT TO E - LD A,C - OR A - JR Z,RS_LOOPZ - ; RESTORE SAVED VALUES - LD IX,RS_ARY - LD B,C ; LOOP COUNT - LD C,$80 ; BANK ID -RS_LOOP2: - LD A,C - CALL HBX_BNKSEL - INC C - LD A,(IX) ; GET VALUE - LD (HL),A ; RESTORE IT - INC IX - DJNZ RS_LOOP2 ; ALL BANKS -RS_LOOPZ: -; -; MBC RUNTIME MEMORY SIZE ADJUSTMENT -; -; THE MBC RAM BOARD CAN CONTAIN 1 OR 2 RAM CHIPS. THEY CAN BE -; EITHER 128K OR 512K EACH. SO THE MBC RAM BOARD CAN HAVE A -; TOTAL OF 128K, 256K, 512K, OR 1024K. THE COMMON (HIMEM) RAM -; IS ALWAYS MAPPED TO THE LAST 32K OF THE FIRST CHIP ON THE BOARD. -; IF THERE ARE TWO CHIPS ON THE BOARD, THIS MEANS THE COMMON -; BANK WILL APPEAR IN THE "MIDDLE" OF THE PHYSICAL RAM BANKS. -; ROMWBW NEEDS THE COMMON BANK TO BE AT THE LAST BANK OF PHYSICAL -; RAM IN ORDER TO HAVE SEQUENTIAL RAM BANKS AVAILABLE FOR THE -; RAM DISK. TO WORK AROUND THIS, WE FLIP THE HIGH BIT OF THE -; BANK ID FOR AN MBC SYSTEM IFF IT HAS 2 CHIPS (256K OR 1024K). -; THE CODE BELOW GENERATES THE CORRECT MASK TO ACCOMPLISH THIS -; AND THEN POKES THE MASK INTO AN XOR INSTRUCTION IN THE MBC -; MEMORY MANAGER. -; - #IF (MEMMGR == MM_MBC) -; - ;LD HL,CB_RAMBANKS ; IN NUMBER OF RAMBANKS DETECTED FOR MBC - LD A,%11101011 ; IS 4 (128KB) OR 16 (512KB) THEN - ;AND (HL) ; ZERO THE LAST BANK MASK OTHERWISE - AND E ; ZERO THE LAST BANK MASK OTHERWISE - JR Z,MBC_SINGLE ; CALCULATE THE LAST BANK MASK (BANKS/2) - RRA ; 256K = %00000100, 1024K = %00010000 -MBC_SINGLE: - LD (HBX_MBCMSK),A -; - #ENDIF -; - ; RETURN TO ORIGINAL BANK - POP AF - CALL HBX_BNKSEL - LD A,E ; RETURN BANK COUNT - LD ($FFEA),A ; STASH HERE FOR A BIT - RET -; -RS_ARY .EQU $ -; -RS_LEN .EQU $ - RS_START - .ORG RS_IMAGE + RS_LEN -; -#ELSE + LD ($FFEA),A ; STASH HERE TO PRINT LATER +; +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; MBC BANK SELECT MASK SETUP +;-------------------------------------------------------------------------------------------------- +; +; THE MBC RAM BOARD CAN CONTAIN 1 OR 2 RAM CHIPS. THE COMMON RAM BANK IS +; FIXED BY HARDWARE TO BE THE TOP 32K OF THE *FIRST* RAM CHIP. WHEN THERE +; ARE 2 RAM CHIPS INSTALLED, THE HARDWARE WILL THUS PLACE THE COMMON RAM IN +; THE MIDDLE OF PHYSICAL RAM. HBIOS REQUIRES THAT THE COMMON RAM BANK BE +; MAPPED TO THE VERY LAST 32K OF PHYSICAL RAM. THIS IS REQUIRED SO THAT +; THE RAM DISK BANKS CAN BE SEQUENTIAL. TO WORK AROUND THIS, WE USE AN +; XOR MASK THAT IS APPLIED DURING BANK SELECT. THIS MASK WILL FLIP THE +; HIGH ORDER BANK SELECT BIT (WHEN 2 RAM CHIPS ARE USED) SO THAT THE TWO +; RAM CHIPS WIND UP "REVERSED" AND THE FIXED COMMON BANK WINDS UP AT THE +; END OF THE RAM BANKS. THE MASK IS SETUP HERE BASED ON THE NUMBER OF RAM +; CHIPS AND THEIR SIZE. NOTE THAT THE NUMBER OF RAM CHIPS IS INFERRED BY +; THE TOTAL RAM SIZE. A SINGLE CHIP WILL BE EITHER 128K OR 512K. IF THE +; TOTAL RAM SIZE OF THE SYSTEM IS 256K OR 1M, THEN THERE MUST BE TWO CH +; IPS. THE RESULTING BANK SELECT MASK IS INSERTED INTO THE MBC BANK +; SELECT ROUTINE. +; +#IF (MEMMGR == MM_MBC) ; -; MBC RUNTIME MEMORY SIZE ADJUSTMENT -; -; THE MBC RAM BOARD CAN CONTAIN 1 OR 2 RAM CHIPS. THEY CAN BE -; EITHER 128K OR 512K EACH. SO THE MBC RAM BOARD CAN HAVE A -; TOTAL OF 128K, 256K, 512K, OR 1024K. THE COMMON (HIMEM) RAM -; IS ALWAYS MAPPED TO THE LAST 32K OF THE FIRST CHIP ON THE BOARD. -; IF THERE ARE TWO CHIPS ON THE BOARD, THIS MEANS THE COMMON -; BANK WILL APPEAR IN THE "MIDDLE" OF THE PHYSICAL RAM BANKS. -; ROMWBW NEEDS THE COMMON BANK TO BE AT THE LAST BANK OF PHYSICAL -; RAM IN ORDER TO HAVE SEQUENTIAL RAM BANKS AVAILABLE FOR THE -; RAM DISK. TO WORK AROUND THIS, WE FLIP THE HIGH BIT OF THE -; BANK ID FOR AN MBC SYSTEM IFF IT HAS 2 CHIPS (256K OR 1024K). -; THE CODE BELOW GENERATES THE CORRECT MASK TO ACCOMPLISH THIS -; AND THEN POKES THE MASK INTO AN XOR INSTRUCTION IN THE MBC -; MEMORY MANAGER. + ; ALTHOUGH DYNAMIC SYSTEM RAM SIZING IS NOT POSSIBLE FOR MBC + ; (SEE COMMENTS ABOVE), WE ARE STILL DOING THE MASK SETUP + ; DYNAMICALLY. THIS IS SIMPLY IN CASE WE EVER FIND A WAY TO + ; DYNAMICALLY SIZE THE RAM IN AN MBC SYSTEM. + ; + ; 128K: %00000000 ; 1 CHIP, FLIP NO BITS + ; 256K: %00000100 ; 2 CHIPS, 8 BANKS, FLIP BIT 2 + ; 512K: %00000000 ; 1 CHIP, FLIP NO BITS + ; 1024K: %00010000 ; 2 CHIPS, 32 BANKS, FLIP BIT 4 + ; + ; IF NUMBER OF RAMBANKS DETECTED FOR MBC IS 4 (128KB) OR + ; 16 (512KB) THEN ZERO THE BANK MASK, OTHERWISE CALCULATE + ; THE BANK MASK AS BANKS/2. ; - #IF (MEMMGR == MM_MBC) - LD HL,CB_RAMBANKS ; IF NUMBER OF RAMBANKS DETECTED FOR MBC - LD A,%11101011 ; IS 4 (128KB) OR 16 (512KB) THEN - AND (HL) ; ZERO THE LAST BANK MASK OTHERWISE - JR Z,MBC_SINGLE ; CALCULATE THE LAST BANK MASK (BANKS/2) - RRA ; 256K = %00000100, 1024K = %00010000 + LD A,(CB_RAMBANKS) + LD E,A + LD A,%11101011 + AND E + JR Z,MBC_SINGLE + RRA MBC_SINGLE: - LD (HBX_MBCMSK),A - #ENDIF + LD (HBX_MBCMSK),A ; #ENDIF ; -; INSTALL HBIOS IN RAM BANK +;-------------------------------------------------------------------------------------------------- +; HBIOS TRANSITION TO RAM +;-------------------------------------------------------------------------------------------------- ; - LD A,(HB_CURBNK) +; COPY OURSELVES TO HBIOS BANK IN RAM +; + LD A,(HB_CURBNK) ; GET CURRENT BANK ID ; - ; CHECK TO SEE IF WE ARE ALREADY RUNNING IN THE HBIOS + ; CHECK TO SEE IF WE ARE ALREADY RUNNING IN THE HBIOS RAM ; BANK AND SKIP THE COPY IF SO (DON'T COPY OVER OURSELVES). ; THIS SITUATION OCCURS ON A ROMLESS STARTUP OR WHEN DOING A ; FULL RESTART OF A SYSTEM USING THE EXISTING HBIOS COPY. - CP BID_BIOS - JR Z,HB_START1 -; - LD (HB_SRCBNK),A - LD A,BID_BIOS - LD (HB_DSTBNK),A - LD HL,0 - LD DE,0 - LD BC,$8000 + ; NOTE THAT THIS TEST WORKS BECAUSE BID_BIOS == BID_BOOT + ; IN THESE SCENARIOS. + CP BID_BIOS ; SAVE AS BIOS BANK? + JR Z,HB_START1 ; IF SO, SKIP +; + LD (HB_SRCBNK),A ; CURRENT BANK IS SOURCE + LD A,BID_BIOS ; GET BIOS BANK ID + LD (HB_DSTBNK),A ; ... AND MAKE IT THE DESTINATION + LD HL,0 ; START FROM ADDRESS ZERO + LD DE,0 ; SAME FOR DESTINATION + LD BC,$8000 ; COPY ENTIRE 32KB BANK #IF (MEMMGR == MM_Z280) - CALL Z280_BNKCPY + ; WE CANNOT USE HBX_BNKCPY FOR Z280 BECAUSE HBX_BNKCPY WILL + ; SYSCALL Z280_BNKCPY. SYSCALL IS NOT SAFE YET BECAUSE THE + ; Z280 IVT ADDRESS HAS NOT BEEN SETUP. + CALL Z280_BNKCPY ; HANDLE Z280 SPECIAL #ELSE - CALL HBX_BNKCPY + CALL HBX_BNKCPY ; ELSE NORMAL BANK COPY #ENDIF ; ; TRANSITION TO HBIOS IN RAM BANK ; #IF (MEMMGR == MM_Z280) + ; Z280 NEEDS TO BE HANDLED SPECIAL BECAUSE WE ARE SWITCHING + ; THE SYSTEM MODE BANK, NOT THE NORMAL USER MODE BANK. LD A,BID_BIOS LD B,$10 ; FIRST SYSTEM PDR CALL Z280_BNKSEL JR HB_START1 #ELSE + ; JUST DOING A BANK CALL TO THE RAM BANK BANK. IF THIS IS A + ; ROMLESS BOOT OR AN IN-PLACE HBIOS RESTART, WE ARE ALREADY + ; RUNNING IN BID_BIOS BANK. HOWEVER, THIS WILL DO NO HARM. LD A,BID_BIOS ; BIOS BANK ID LD IX,HB_START1 ; EXECUTION RESUMES HERE CALL HBX_BNKCALL ; CONTINUE IN RAM BANK, DO NOT RETURN @@ -1757,30 +1930,17 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK LD SP,HBX_LOC - 2 ; RESET STACK ; ; NOTIFY THAT WE MADE THE TRANSITION! - DIAG(DIAG_03) - LED(%00000010) + FPLEDS(DIAG_03) + DIAG(2) ; ; RECOVER DATA PASSED PRIOR TO RAM TRANSITION - ; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBNK + ; (HBX_LOC - 1) = BATCOND POP HL ; POP 2 BYTES LD A,H ; GET FIRST BYTE PUSHED LD (HB_BATCOND),A ; ... AND SAVE AS BAT COND ; -#IFDEF APPBOOT - LD A,L ; GET SECOND BYTE PUSHED - LD (HB_APPBNK),A ; ... AND SAVE AS APPBNK -#ENDIF -; -#IF (MEMMGR == MM_Z280) - ; NOW POINT TO RAM COPY OF Z280 INT/TRAP TABLE - ; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT - ; IVT *MUST* BE ON A 4K BOUNDARY - LD C,Z280_VPR - LD HL,0 + (((PBANK(BID_BIOS) << 15) + Z280_IVT) >> 8) - LDCTL (C),HL -#ENDIF -; ; IF APPBOOT, WE NEED TO FIX UP A FEW THINGS IN PAGE ZERO +; ;;; SHOULD THIS BE DONE FOR AN HBIOS RESTART IN PLACE??? ; #IFDEF APPBOOT ; @@ -1842,67 +2002,32 @@ CB_IDS: LD (HL),A ; POPULATE CB_BIDCOM ; #ENDIF ; -;================================================================================================== -; RECOVERY MODE -;================================================================================================== -; -; PLATFORM SPECIFIC CODE FOR DETECTING RECOVERY MODE SWITCH -; -#IF (BT_REC_TYPE != BT_REC_NONE) - #IF (BT_REC_TYPE == BT_REC_FORCE) - LD A,1 ; SET FOR RECOVERY MODE - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) - #IF (BT_REC_TYPE == BT_REC_SBC01) - LD A,%00100000 ; DISABLE RTC AND - OUT (RTCIO),A ; DRQ DRIVER READ - IN A,(RTCIO) ; BIT 0 (DRQ). - CPL ; PULLED HIGH - AND 1 ; IS RECOVERY MODE - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #IF (BT_REC_TYPE == BT_REC_SBC1B) - IN A,(RTCIO) ; RTC PORT, BIT 6 HAS THE - BIT 6,A ; STATE OF CONFIG JUMPER - LD A,1 ; JUMPER INSTALLED - JR Z,SAVE_REC_M ; IS RECOVERY MODE - LD A,0 -SAVE_REC_M: - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #IF (BT_REC_TYPE == BT_REC_SBCRI) - IN A,($68 + 6) ; UART_MSR MODEM - BIT 6,A ; STATUS REGISTER - LD A,0 ; BIT 6 - JR Z,SAVE_REC_M ; IS RECOVERY MODE - LD A,1 -SAVE_REC_M: - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #ENDIF -#ENDIF -; - DIAG(DIAG_04) -; -#IF (WBWDEBUG == USEMIO) ; BUFFER OUTPUT UNTIL - CALL MIO_INIT ; WE GET TO BOOT MESSAGE -#ENDIF -; -#IF FALSE +; CLEAR DISPATCH TABLE ENTRIES ; -; TEST DEBUG *************************************************************************************** + XOR A ; ZERO + LD (CIO_CNT),A ; CIO DEVICES + LD (DIO_CNT),A ; DIO DEVICES + LD (VDA_CNT),A ; VDA DEVICES + LD (SND_CNT),A ; SND DEVICES + LD (RTC_DISPACT),A ; RTC DEVICE + LD (DSKY_DISPACT),A ; DSKY DEVICE ; - PRTS("DEBUG-IM1INT$") - LD DE,HB_IM1INT - CALL DUMP_BUFFER - CALL NEWLINE +; INITIALIZE HEAP STORAGE ; -; TEST DEBUG *************************************************************************************** + ; INITIALIZE POINTERS + LD HL,HB_END ; HEAP FOLLOWS HBIOS CODE + LD (CB_HEAP),HL ; INIT HEAP BASE ADDRESS + LD (CB_HEAPTOP),HL ; INIT HEAP TOP ADDRESS + ; CLEAR HEAP + LD BC,BNKTOP - HB_END ; MAX SIZE OF HEAP + LD A,$FF ; FILL WITH $FF + CALL FILL ; DO IT ; -#ENDIF + FPLEDS(DIAG_04) ; -; DISCOVER CPU TYPE +;-------------------------------------------------------------------------------------------------- +; CPU TYPE DISCOVERY +;-------------------------------------------------------------------------------------------------- ; ; SOME OF THIS CODE IS DERIVED FROM UNA BY JOHN COFFMAN ; @@ -1957,22 +2082,28 @@ HB_CPU1: LD A,L LD (HB_CPUTYPE),A ; -; CLEAR DISPATCH TABLE ENTRIES +;-------------------------------------------------------------------------------------------------- +; EARLY DRIVER INITIALIZATION +;-------------------------------------------------------------------------------------------------- ; - XOR A ; ZERO - LD (CIO_CNT),A ; CIO DEVICES - LD (DIO_CNT),A ; DIO DEVICES - LD (VDA_CNT),A ; VDA DEVICES - LD (SND_CNT),A ; SND DEVICES - LD (RTC_DISPACT),A ; RTC DEVICE - LD (DSKY_DISPACT),A ; DSKY DEVICE +; SOME DRIVERS NEED TO BE CALLED AS EARLY AS WE CAN ONE AN OPERATING +; ENVIRONMENT IS ESTABLISHED. ; #IF (SN76489ENABLE) + ; SN76489 CHIP GENERATES UGLY NOISE AFTER HARDWARE RESET. + ; WE CALL THIS DRIVER'S PREINIT ASAP TO SHUT OFF THE NOISE. CALL SN76489_PREINIT #ENDIF #IF (DSRTCENABLE) + ; THE DSRTC NEEDS TO BE INITIALIZED IN ORDER TO PERFROM THE + ; CPU SPEED DETECTION BELOW. CALL DSRTC_PREINIT #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; DSKY INITIALIZATION AND ANNOUNCEMENT +;-------------------------------------------------------------------------------------------------- +; #IF (DSKYENABLE) #IF (ICMENABLE) CALL ICM_PREINIT @@ -1983,9 +2114,8 @@ HB_CPU1: #IF (H8PENABLE) CALL H8P_PREINIT #ENDIF -#ENDIF ; -#IF (DSKYENABLE) + ; ANNOUNCE OURSELVES ON DSKY LD HL,MSG_HBVER + 5 LD A,(DSKY_HEXMAP + RMJ) OR $80 @@ -2002,34 +2132,23 @@ HB_CPU1: CALL DSKY_DISPATCH #ENDIF ; -#IF (SKZENABLE) -; - ; SET THE SK Z80-512K UART CLK2 DIVIDER AS - ; CONFIGURED. NOTE THAT THIS IMPLICITLY - ; CLEARS THE WATCHDOG BIT. THE WATCHDOG - ; WILL BE ENABLED LATER IF CONFIGURED. - LD A,SKZDIV ; GET DIVIDER CODE - OUT ($6D),A ; IMPLEMENT IT -; -#ENDIF -; - DIAG(DIAG_05) + FPLEDS(DIAG_05) ; ; INIT OSCILLATOR SPEED FROM CONFIG ; LD HL,CPUOSC / 1000 ; OSC SPD IN KHZ LD (HB_CPUOSC),HL ; INIT HB_CPUOSC DEFAULT ; -; ATTEMPT DYNAMIC CPU SPEED DERIVATION -; NOTE THAT FOR PLATFORMS WITH SOFTWARE SELECTABLE CPU SPEED, -; THIS IS BEING DONE WITH THE CPU SPEED SET TO THE LOWEST -; POSSIBLE SETTING. THE FINAL CPU SPEED WILL BE ADJUSTED -; LATER. + ; ATTEMPT DYNAMIC CPU SPEED DERIVATION + ; NOTE THAT FOR PLATFORMS WITH SOFTWARE SELECTABLE CPU SPEED, + ; THIS IS BEING DONE WITH THE CPU SPEED SET TO THE LOWEST + ; POSSIBLE SETTING. THE FINAL CPU SPEED WILL BE ADJUSTED + ; LATER. ; CALL HB_CPUSPD ; DYNAMIC CPU SPEED DETECTION JR NZ,HB_CPU2 ; SKIP AHEAD IF FAILED ; -; RECORD THE UPDATED CPU OSCILLATOR SPEED + ; RECORD THE UPDATED CPU OSCILLATOR SPEED ; #IF ((CPUFAM == CPU_Z180) | (CPUSPDCAP == SPD_HILO)) ; SPEED MEASURED WILL BE HALF OSCILLATOR SPEED @@ -2042,14 +2161,15 @@ HB_CPU1: ; HB_CPU2: ; -; INIT CPUKHZ BASED ON OSCILLATOR SPEED -; - LD HL,(HB_CPUOSC) +;-------------------------------------------------------------------------------------------------- +; FINALIZE OPERATING CPU SPEED +;-------------------------------------------------------------------------------------------------- ; ; TRANSITION TO FINAL DESIRED CPU SPEED FOR THOSE PLATFORMS ; THAT SUPPORT SOFTWARE SELECTABLE CPU SPEED. UPDATE CB_CPUKHZ ; IN HCB AS WE DO THIS. ; + LD HL,(HB_CPUOSC) #IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_MBC)) #IF (CPUSPDDEF==SPD_HIGH) ; SET HIGH SPEED VIA RTC LATCH @@ -2140,9 +2260,15 @@ HB_CPU3: ADC A,C ; C -> A; ADD CF FOR ROUNDING LD (CB_CPUMHZ),A ; SAVE IT ; +;-------------------------------------------------------------------------------------------------- +; FINALIZE OPERATING WAIT STATES +;-------------------------------------------------------------------------------------------------- +; +; SET OPERATING WAIT STATE CONFIGURATION ON SYSTEMS THAT SUPPORT IT +; #IF (CPUFAM == CPU_Z180) ; - ; SET FINAL DESIRED WAIT STATES + ; SET FINAL DESIRED WAIT STATES PER CONFIG LD A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4) OUT0 (Z180_DCNTL),A ; @@ -2150,6 +2276,8 @@ HB_CPU3: ; #IF (CPUFAM == CPU_Z280) ; + ; SET FINAL DESIRED WAIT STATES PER CONFIG + ; BUS TIMING AND CONFIGURATION REGISTER LD C,Z280_BTCR ; BUS TIMING AND CONTROL REG LDCTL HL,(C) LD A,L ; PUT IN A @@ -2158,21 +2286,53 @@ HB_CPU3: OR Z280_MEMHIWAIT << 2 ; SET HIGH 8MB WAIT STATE BITS (HM) OR Z280_IOWAIT ; SET I/O WAIT STATE BITS LD L,A ; BACK TO L - LDCTL (C),HL + LDCTL (C),HL ; DO IT ; + ; BUS TIMING AND INITIALIZATION REGISTER LD C,Z280_BTIR ; BUS TIMING AND INIT REG LDCTL HL,(C) LD A,L ; PUT IN A AND %11110011 ; CLEAR LM FIELD OR Z280_MEMLOWAIT << 2 ; SET LOW 8MB WAIT STATE BITS LD L,A ; BACK TO L - LDCTL (C),HL + LDCTL (C),HL ; DO IT +; +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; SK Z80-512K CLOCK INITIALIZATION +;-------------------------------------------------------------------------------------------------- +; +#IF (SKZENABLE) +; +;;; LOCATION OF THIS CODE??? +; + ; SET THE SK Z80-512K UART CLK2 DIVIDER AS + ; CONFIGURED. NOTE THAT THIS IMPLICITLY + ; CLEARS THE WATCHDOG BIT. THE WATCHDOG + ; WILL BE ENABLED LATER IF CONFIGURED. + LD A,SKZDIV ; GET DIVIDER CODE + OUT ($6D),A ; IMPLEMENT IT ; #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; INITIALIZE SPEED-COMPENSATED DELAY FUNCTIONS +;-------------------------------------------------------------------------------------------------- +; +;;; LOCATION OF THIS CODE??? ; LD A,(CB_CPUMHZ) ; CPU SPEED TO ACCUM AND INIT CALL DELAY_INIT ; .. SPEED COMPENSATED DELAY ; +;-------------------------------------------------------------------------------------------------- +; INTERRUPT MANAGEMENT SETUP +;-------------------------------------------------------------------------------------------------- +; +; SETUP INTERRUPT VECTOR TABLE ADDRESS(ES) AND TRANSITION TO +; OPERATING INTERRUPT MODE. NOTE THAT INTERRUPTS REMAIN +; DISABLED AT THIS POINT. +; #IF ((INTMODE == 2) | ((INTMODE == 1) & (CPUFAM == CPU_Z180))) ; SETUP Z80 IVT AND INT MODE 2 LD A,HBX_IVT >> 8 ; SETUP HI BYTE OF IVT ADDRESS @@ -2189,6 +2349,15 @@ HB_CPU3: #ENDIF #ENDIF ; +#IF (MEMMGR == MM_Z280) + ; NOW POINT TO RAM COPY OF Z280 INT/TRAP TABLE + ; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT + ; IVT *MUST* BE ON A 4K BOUNDARY + LD C,Z280_VPR + LD HL,0 + (((PBANK(BID_BIOS) << 15) + Z280_IVT) >> 8) + LDCTL (C),HL +#ENDIF +; #IF (INTMODE == 3) ; ; SETUP Z280 INT A FOR VECTORED INTERRUPTS @@ -2196,10 +2365,15 @@ HB_CPU3: LD C,Z280_ISR LDCTL (C),HL ; + ; TRANSITION TO INTERRUPT MODE 3 IM 3 ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; SYSTEM TIMER INITIALIZATION +;-------------------------------------------------------------------------------------------------- +; #IF (PLATFORM == PLT_SBC) ; #IF (HTIMENABLE) ; SIMH TIMER @@ -2213,35 +2387,6 @@ HB_CPU3: ; #ENDIF ; -; TEMPLATE FOR SETTING UP INTERRUPTS USING THE MBC/DUODYNE IM2 INTERRUPT -; PIN HEADERS. UPDATE HB_DUMMYx TO POINT TO THE INTERRUPT ROUTINE. -; IN STD.ASM ALLOCATE THE EQUIVALENT INT_IM2PHx INTERRUPT TABLE ENTRY NUMBER. -; -; -; LD HL,HB_DUMMY0 -; LD (IVT(INT_IM2PH0)),HL -; -; LD HL,HB_DUMMY1 -; LD (IVT(INT_IM2PH1)),HL -; -; LD HL,HB_DUMMY2 -; LD (IVT(INT_IM2PH2)),HL -; -; LD HL,HB_DUMMY3 -; LD (IVT(INT_IM2PH3)),HL -; -; LD HL,HB_DUMMY4 -; LD (IVT(INT_IM2PH4)),HL -; -; LD HL,HB_DUMMY5 -; LD (IVT(INT_IM2PH5)),HL -; -; LD HL,HB_DUMMY6 -; LD (IVT(INT_IM2PH6)),HL -; -; LD HL,HB_DUMMY7 -; LD (IVT(INT_IM2PH7)),HL -; #IF (KIOENABLE) CALL KIO_PREINIT #ENDIF @@ -2250,11 +2395,16 @@ HB_CPU3: CALL CTC_PREINIT #ENDIF ; +#IF (PLATFORM == PLT_NABU) + CALL NABU_PREINIT +#ENDIF +; #IF (CPUFAM == CPU_Z180) ; #IF (INTMODE > 0) ; - ; MASK ALL EXTERNAL INTERRUPTS FOR NOW + ; FOR NOW, JUST ENABLE THE INT0 PIN WHICH IS GENERALLY + ; EQUIVALENT TO Z80 INTERRUPTS. LD A,$01 ; INT0 ENABLED, INT1-2 DISABLED OUT0 (Z180_ITC),A ; WRITE TO INT/TRAP CONTROL REGISTER ; @@ -2274,9 +2424,9 @@ HB_CPU3: ; ; Z180 PRESCALES THE COUNTER BY 20 SO, ; RLDR = CPU CLK / 20 / TICKFREQ - ; IF WE ASSUME TICKFREQ = 50, WE CAN SIMPIFY TO + ; IF WE ASSUME TICKFREQ = 50, WE CAN SIMPLIFY TO ; RLDR = CPU CLK / 1000 - ; NOW IF DIVIDE BOTH SIDES BY 1000, WE CAN USE + ; IF WE DIVIDE BOTH SIDES BY 1000, WE CAN USE ; CPUKHZ VALUE AND SIMPLIFY TO ; RLDR = CPUKHZ XOR A ; ALL BITS ZERO @@ -2335,18 +2485,15 @@ Z280_TC .EQU CPUOSC / 4 / 50 / 2 ; TIME CONSTANT ; #ENDIF ; -; INITIALIZE HEAP STORAGE + FPLEDS(DIAG_06) ; - ; INITIALIZE POINTERS - LD HL,HB_END ; HEAP FOLLOWS HBIOS CODE - LD (CB_HEAP),HL ; INIT HEAP BASE ADDRESS - LD (CB_HEAPTOP),HL ; INIT HEAP TOP ADDRESS - ; CLEAR HEAP - LD BC,BNKTOP - HB_END ; MAX SIZE OF HEAP - LD A,$FF ; FILL WITH $FF - CALL FILL ; DO IT +;-------------------------------------------------------------------------------------------------- +; PRE-CONSOLE INITIALIZATION +;-------------------------------------------------------------------------------------------------- ; - DIAG(DIAG_06) +#IF (WBWDEBUG == USEMIO) ; BUFFER OUTPUT UNTIL + CALL MIO_INIT ; WE GET TO BOOT MESSAGE +#ENDIF ; #IF FALSE ; @@ -2359,7 +2506,42 @@ Z280_TC .EQU CPUOSC / 4 / 50 / 2 ; TIME CONSTANT ; #ENDIF ; -; PRE-CONSOLE INITIALIZATION +; PLATFORM SPECIFIC CODE FOR DETECTING RECOVERY MODE SWITCH +; +#IF (BT_REC_TYPE != BT_REC_NONE) + #IF (BT_REC_TYPE == BT_REC_FORCE) + LD A,1 ; SET FOR RECOVERY MODE + LD (HB_BOOT_REC),A ; SAVE FOR LATER + #ENDIF + #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) + #IF (BT_REC_TYPE == BT_REC_SBC01) + LD A,%00100000 ; DISABLE RTC AND + OUT (RTCIO),A ; DRQ DRIVER READ + IN A,(RTCIO) ; BIT 0 (DRQ). + CPL ; PULLED HIGH + AND 1 ; IS RECOVERY MODE + LD (HB_BOOT_REC),A ; SAVE FOR LATER + #ENDIF + #IF (BT_REC_TYPE == BT_REC_SBC1B) + IN A,(RTCIO) ; RTC PORT, BIT 6 HAS THE + BIT 6,A ; STATE OF CONFIG JUMPER + LD A,1 ; JUMPER INSTALLED + JR Z,SAVE_REC_M ; IS RECOVERY MODE + LD A,0 +SAVE_REC_M: + LD (HB_BOOT_REC),A ; SAVE FOR LATER + #ENDIF + #IF (BT_REC_TYPE == BT_REC_SBCRI) + IN A,($68 + 6) ; UART_MSR MODEM + BIT 6,A ; STATUS REGISTER + LD A,0 ; BIT 6 + JR Z,SAVE_REC_M ; IS RECOVERY MODE + LD A,1 +SAVE_REC_M: + LD (HB_BOOT_REC),A ; SAVE FOR LATER + #ENDIF + #ENDIF +#ENDIF ; LD DE,HB_PCINITTBL ; POINT TO PRECONSOLE INIT TABLE LD B,HB_PCINITTBLLEN ; NUMBER OF ENTRIES @@ -2373,7 +2555,10 @@ Z280_TC .EQU CPUOSC / 4 / 50 / 2 ; TIME CONSTANT NOT_REC_M0: ; #ENDIF - CALL CALLLIST ; PROCESS THE PRE-INIT CALL TABLE +; + ; CYCLE THROUGH THE INITIALIZATION TABLE CALLING THE PRE-INIT + ; ENTRY POINT OF ALL DRIVERS. + CALL CALLLIST ; PROCESS THE PRE-INIT CALL TABLE ; #IF FALSE ; @@ -2386,10 +2571,15 @@ NOT_REC_M0: ; #ENDIF ; - DIAG(DIAG_07) - LED(%00000111) + FPLEDS(DIAG_07) + DIAG(3) ; +;-------------------------------------------------------------------------------------------------- +; BOOT DELAY +;-------------------------------------------------------------------------------------------------- ; +; IF CONFIGURED, AN ARBITRARY BOOT DELAY IS IMPLEMENTED HERE. THIS IS +; TYPICALLY USED TO DELAY ACCESSING DEVICES THAT WILL NOT BE READY. ; #IF (BOOT_DELAY > 100) .ECHO "*** ERROR: INVALID BOOT_DELAY (BOOT_DELAY > 100)!!!\n" @@ -2403,6 +2593,10 @@ HB_BOOTDLY: DJNZ HB_BOOTDLY ; LOOP TILL DONE #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; ACTIVATE BOOT CONSOLE +;-------------------------------------------------------------------------------------------------- +; ; PRIOR TO THIS POINT, CONSOLE I/O WAS NOT AVAILABLE UNLESS DIRECTED TO DEBUG OUTPUT I.E. XIO ; NOW THAT HBIOS IS READY, SET THE CONSOLE UNIT TO ACTIVATE CONSOLE I/O ; VIA HBIOS. @@ -2418,6 +2612,10 @@ HB_BOOTDLY: ; HB_CONRDY: ; +; SUPPRESS HARDWARE FLOW CONTROL TEMPORARILY, IF NEEDED. THIS IS +; GENERALLY NOT USED ANYMORE BECAUSE THE UART DRIVER NOW CHECKS FOR +; A VALID CTS SIGNAL AND ADJUSTS AS NEEDED. +; #IF (SUPCTS) ; ; MOST SERIAL PORTS ARE CONFIGURED WITH HARDWARE FLOW CONTROL ENABLED. @@ -2476,9 +2674,16 @@ NXTMIO: LD A,(HL) ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- ; ANNOUNCE HBIOS +;-------------------------------------------------------------------------------------------------- +; +; DISPLAY A BANNER ON THE BOOT CONSOLE NOW. NOTE THAT WE INTENTIONALLY +; LEAVE INTERRUPTS DISABLED UNTIL A BIT LATER. SINCE INTERRUPTS CAN +; DESTABILIZE A SYSTEM, IT IS DIAGNOSTICALLY USEFUL TO GET SOMETHING +; DISPLAYED BEFORE INTRODUCING INTERRUPTS. IF THE SYSTEM CRASHES +; AFTER DISPLAYING THE BANNER, INTERRUPT INTEGRITY SHOULD BE SUSPECTED. ; - CALL NEWLINE2 PRTX(STR_BANNER) ; ; DISPLAY HBIOS MUTEX ENABLED MESSAGE @@ -2501,11 +2706,42 @@ NXTMIO: LD A,(HL) #ENDIF NOT_REC_M2: ; - DIAG(DIAG_08) + FPLEDS(DIAG_08) + +#IF (PLATFORM == PLT_NABU) & TRUE +; + ; GET CURRENT VALUE OF PSG ENABLE REGISTER + LD A,7 + OUT (NABU_RSEL),A + NOP + IN A,(NABU_RDAT) + LD B,A +; + ; GET CURRENT VALUE OF PSG ENABLE REGISTER + LD A,7 + OUT (NABU_RSEL),A + NOP + IN A,(NABU_RDAT) + LD C,A +; + ; DUMP IT + CALL PC_ASTERISK + LD A,B + CALL PRTHEXBYTE + LD A,C + CALL PRTHEXBYTE + CALL PC_ASTERISK +; +#ENDIF + + ; +;-------------------------------------------------------------------------------------------------- ; IO PORT SCAN +;-------------------------------------------------------------------------------------------------- ; #IF FALSE +; PSCN: LD C,0 ; IO PORT NUMBER LD B,0 ; LOOP COUNTER @@ -2530,20 +2766,36 @@ PSCNX .EQU $ + 1 CALL PRTHEXBYTE INC C DJNZ PSCN1 +; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; CPU SPEED DETECTION ALIGNMENT TEST +;-------------------------------------------------------------------------------------------------- +; #IF FALSE +; +; IF ENABLED, THE CPU SPEED TEST WILL BE REPEATED INDEFINITELY. THIS +; IS USED TO ADJUST THE SPEED DETECTION LOOP. +; HB_SPDTST: CALL HB_CPUSPD ; CPU SPEED DETECTION CALL NEWLINE LD HL,(CB_CPUKHZ) CALL PRTD3M ; PRINT AS DECIMAL WITH 3 DIGIT MANTISSA JR HB_SPDTST +; #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; ENABLE INTERRUPTS +;-------------------------------------------------------------------------------------------------- ; HB_EI ; INTERRUPTS SHOULD BE OK NOW ; +;-------------------------------------------------------------------------------------------------- ; DISPLAY PLATFORM INFORMATION +;-------------------------------------------------------------------------------------------------- ; CALL NEWLINE2 PRTX(STR_PLATFORM) @@ -2589,7 +2841,9 @@ HB_Z280BUS1: PRTS("MHz$") ; SUFFIX #ENDIF ; -; DISPLAY CPU CONFIG +;-------------------------------------------------------------------------------------------------- +; DISPLAY CPU CONFIGURATION +;-------------------------------------------------------------------------------------------------- ; CALL NEWLINE @@ -2669,7 +2923,9 @@ HB_Z280BUS1: CALL PRTSTRD .TEXT " MMU$" ; -; DISPLAY MEMORY CONFIG +;-------------------------------------------------------------------------------------------------- +; DISPLAY MEMORY CONFIGURATION +;-------------------------------------------------------------------------------------------------- ; CALL NEWLINE LD HL,ROMSIZE @@ -2694,12 +2950,15 @@ HB_Z280BUS1: LD HL,BNKTOP - HB_END CALL PRTHEXWORDHL ; -#IFDEF TESTING +#IFDEF SIZERAM ; CALL PRTSTRD .TEXT ", RAMBANKS=0x$" LD A,($FFEA) CALL PRTHEXBYTE +#ENDIF +; +#IFDEF TESTING ; CALL PRTSTRD .TEXT ", RTCDEF=0x$" @@ -2731,19 +2990,32 @@ HB_Z280BUS1: PRTS("BTCR=$") LD C,Z280_BTCR ; BUS TIMING AND CONTROL REGISTER LDCTL HL,(C) - CALL PRTHEXWORDHL + LD A,L + CALL PRTHEXBYTE CALL PC_SPACE PRTS("BTIR=$") LD C,Z280_BTIR ; BUS TIMING AND CONTROL REGISTER LDCTL HL,(C) - CALL PRTHEXWORDHL + LD A,L + CALL PRTHEXBYTE CALL PC_SPACE PRTS("CCR=$") LD C,Z280_CCR ; CACHE CONTROL REGISTER LDCTL HL,(C) - CALL PRTHEXWORDHL + LD A,L + CALL PRTHEXBYTE + CALL PC_SPACE + PRTS("TCR=$") + LD C,Z280_TCR ; CACHE CONTROL REGISTER + LDCTL HL,(C) + LD A,L + CALL PRTHEXBYTE #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; ROM CHECKSUM VERIFICATION +;-------------------------------------------------------------------------------------------------- +; #IFDEF ROMBOOT #IF (ROMSIZE > 0) ; @@ -2817,9 +3089,12 @@ HB_CKBNKSIZ .EQU $-HB_CKBNK ; SIZE OF ROUTINE HB_ROMCKZ: ; #ENDIF +; #ENDIF ; -; LOW BATTERY DIAGNOSTIC MESSAGE +;-------------------------------------------------------------------------------------------------- +; LOW RAM BATTERY MESSAGE +;-------------------------------------------------------------------------------------------------- ; #IF (BATCOND) LD A,(HB_BATCOND) @@ -2828,7 +3103,9 @@ HB_ROMCKZ: CALL Z,WRITESTR #ENDIF ; -; PERFORM DEVICE INITIALIZATION +;-------------------------------------------------------------------------------------------------- +; FINAL DEVICE INITIALIZATION +;-------------------------------------------------------------------------------------------------- ; CALL NEWLINE @@ -2847,6 +3124,10 @@ NOT_REC_M1: IS_REC_M1: CALL CALLLIST ; +;-------------------------------------------------------------------------------------------------- +; WATCHDOG ACTIVATION +;-------------------------------------------------------------------------------------------------- +; ; IF WATCHDOG FUNCTIONALITY IS REQUESTED, CHECK TO MAKE SURE ; WE ARE GETTING INTERRUPTS. IF SO, ENABLE THE WATCHDOG. ; @@ -2888,6 +3169,10 @@ HB_WDZ: ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HEAP CURB INITIALIZATION +;-------------------------------------------------------------------------------------------------- +; ; RECORD HEAP CURB AT THE CURRENT VALUE OF HEAP TOP. HEAP CURB ; MARKS THE POINT IN THE HEAP AFTER WHICH MEMORY IS RELEASED ; WHEN AN HBIOS RESET IS PEFORMED. @@ -2895,7 +3180,15 @@ HB_WDZ: LD HL,(CB_HEAPTOP) LD (HEAPCURB),HL ; -; NOW SWITCH CONSOLES IF CONFIGURED +;-------------------------------------------------------------------------------------------------- +; FINAL CONSOLE ACTIVATION +;-------------------------------------------------------------------------------------------------- +; +; ON SOME SYSTEMS, THE OPERATING CONSOLE IS DIFFERENT THAT THE BOOT +; CONSOLE. FOR EXAMPLE, IF A VIDEO CONSOLE IS DESIRED. A VIDEO +; CONSOLE CANNOT BE USED AS A BOOT CONSOLE BECAUSE IT WILL NOT BE +; INITIALIZED EARLY ENOUGH. SO, IF DESIRED, WE SWITCH TO THE FINAL +; RUNNING CONSOLE HERE. ; LD A,(CB_CONDEV) ; GET CURRENT CONSOLE LD (HB_NEWCON),A ; AND INIT NEW CONSOLE VAR @@ -3032,14 +3325,24 @@ INITSYS3: LD A,(HB_NEWCON) ; GET NEW CONSOLE UNIT NUM CALL PRTDECB ; PRINT UNIT NUM LD (CB_CONDEV),A ; IMPLEMENT NEW CONSOLE! - CALL NEWLINE2 ; FORMATTING LD DE,STR_BANNER ; POINT TO BANNER CALL NZ,WRITESTR ; OUTPUT IF CONSOLE MOVED ; +;-------------------------------------------------------------------------------------------------- +; PRINT DEVICE SUMMARY +;-------------------------------------------------------------------------------------------------- +; INITSYS3A: CALL PRTSUM ; PRINT UNIT/DEVICE SUMMARY TABLE ; -#IF 0 +;-------------------------------------------------------------------------------------------------- +; DIAGNOSTIC ROUTINES +;-------------------------------------------------------------------------------------------------- +; +; DIGANOSTIC ROUTINE TO EXERCISE THE Z280 BNKCPY CODE +; +#IF FALSE +; CALL NEWLINE CALL NEWLINE CALL NEWLINE @@ -3104,7 +3407,9 @@ INITSYS3A: ; #ENDIF ; -#IF 0 +; DIAGNOSTIC ROUTINE TO PLAY SERIES OF NOTES +; +#IF FALSE ; LD HL,0 CALL DBG_NOTE @@ -3141,111 +3446,87 @@ DBG_NOTE: ; #ENDIF ; +; DIAGNOSTIC ROUTINE TO PLAY A BEEP +; +#IFDEF TESTING + CALL SND_BEEP +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; TRANSITION TO USER LAND +;-------------------------------------------------------------------------------------------------- +; INITSYS4: ; -#IF (MEMMGR == MM_Z280) - ; LEAVE SYSTEM MODE STACK POINTING TO AN OK PLACE - LD SP,HB_STACK ; NOW USE REAL SYSTEM STACK LOC +; IF Z280, WE NEED TO SWITCH TO USER MODE NOW. ; - HB_DI ; NOT SURE THIS IS NEEDED +#IF (MEMMGR == MM_Z280) + ; LEAVE SYSTEM MODE STACK POINTING TO THE RIGHT PLACE + LD SP,HB_STACK ; DEDICATED HBIOS STACK LOC ; ; ACTIVATE THE CORRECT USER MODE BANK LD A,(HB_CURBNK) ; GET CURRENT BANK - CALL HBX_BNKSEL + CALL HBX_BNKSEL ; DO IT ; ; PRESET THE USER MODE STACK - LD HL,HBX_LOC - LDCTL USP,HL -; - HB_EI ; NOT SURE THIS IS NEEDED + LD HL,HBX_LOC ; USER STACK JUST BELOW PROXY + LDCTL USP,HL ; DO IT ; ; SWITCH TO USER MODE NOW - LD C,Z280_MSR - LD HL,$407F - LDCTL (C),HL -#ENDIF -; -#IFDEF TESTING - CALL SND_BEEP + LD C,Z280_MSR ; MASTER STATUS REGISTER + LD HL,$4000 | $0B ; USER MODE W/ NORMAL INT MASK + LDCTL (C),HL ; DO IT #ENDIF ; -#IFNDEF ROMBOOT -; - ; COPY OS IMAGE: BID_USR: --> BID_USR:0 - LD B,BF_SYSSETCPY ; HBIOS FUNC: SETUP BANK COPY - LD D,BID_USR ; D = DEST BANK = USER BANK - ;LD E,BID_USR ; E = SRC BANK = USER BANK - LD A,(HB_APPBNK) ; GET APP LOAD BANK - LD E,A ; USE AS SOURCE - LD HL,$8000 ; HL = COPY LEN = ENTIRE BANK - RST 08 ; DO IT - LD B,BF_SYSBNKCPY ; HBIOS FUNC: PERFORM BANK COPY - LD HL,HB_END ; COPY FROM END OF HBIOS - LD DE,0 ; TO USER ADDRESS 0 - RST 08 ; DO IT -; -#ENDIF + DIAG(0) ; CLEAR BOOT DIAG LED(S) + FPLEDS(DIAG_00) ; CLEAR FP LEDS ; ; CHAIN TO LOADER ; #IFDEF ROMBOOT LD A,BID_IMG0 ; CHAIN TO OS IMAGES BANK #ELSE - LD A,BID_USR ; CHAIN TO USER BANK + LD A,BID_AUX ; CHAIN TO AUX BANK #ENDIF LD IX,0 ; ENTER AT ADDRESS 0 CALL HBX_BNKCALL ; GO THERE HALT ; WE SHOULD NEVER COME BACK! ; -; CALL A LIST OF ROUTINES POINTED TO BY DE OF LENGTH B. -; -CALLLIST: - LD A,(DE) - LD L,A - INC DE - LD A,(DE) - LD H,A - INC DE - PUSH DE - PUSH BC - CALL JPHL - POP BC - POP DE - DJNZ CALLLIST -CALLDUMMY: - RET - -; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; TABLE OF RECOVERY MODE INITIALIZATION ENTRY POINTS -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; ; USE "CALLDUMMY" IF NO ENTRY REQUIRED ; #IF (BT_REC_TYPE != BT_REC_NONE) ; HB_PCINIT_REC: +; #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) .DW UART_PREINIT ; .DW CALLDUMMY #ENDIF +; HB_PCINITRLEN .EQU (($ - HB_PCINIT_REC) / 2) ; HB_INIT_REC: +; #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) .DW UART_INIT .DW MD_INIT .DW PPIDE_INIT #ENDIF +; HB_INITRLEN .EQU (($ - HB_INIT_REC) / 2) ; #ENDIF ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; TABLE OF PRE-CONSOLE INITIALIZATION ENTRY POINTS -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; HB_PCINITTBL: +; #IF (ASCIENABLE) .DW ASCI_PREINIT #ENDIF @@ -3282,12 +3563,13 @@ HB_PCINITTBL: .DW TERM_PREINIT ; ALWAYS DO THIS ONE ; HB_PCINITTBLLEN .EQU (($ - HB_PCINITTBL) / 2) - +; ;================================================================================================== ; TABLE OF INITIALIZATION ENTRY POINTS ;================================================================================================== ; HB_INITTBL: +; #IF (KIOENABLE) .DW KIO_INIT #ENDIF @@ -3308,6 +3590,9 @@ HB_INITTBL: .DW H8P_INIT #ENDIF #ENDIF +#IF (PLATFORM == PLT_NABU) + .DW NABU_INIT +#ENDIF #IF (AY38910ENABLE) .DW AY38910_INIT ; AUDIBLE INDICATOR OF BOOT START #ENDIF @@ -3443,46 +3728,34 @@ HB_INITTBL: ; HB_INITTBLLEN .EQU (($ - HB_INITTBL) / 2) ; +HB_SYSINIT_END .EQU $ +; ;================================================================================================== -; IDLE +; BIOS FUNCTION DISPATCHER ;================================================================================================== ; -;__________________________________________________________________________________________________ +HB_DISP_BEG .EQU $ ; -IDLE: - PUSH AF - PUSH BC - PUSH DE - PUSH HL - PUSH IY -#IF (FDENABLE) - CALL FD_IDLE -#ENDIF - POP IY - POP HL - POP DE - POP BC - POP AF - RET +;-------------------------------------------------------------------------------------------------- +; HIGH LEVEL FUNCTION DISPATCHER +;-------------------------------------------------------------------------------------------------- ; -;================================================================================================== -; BIOS FUNCTION DISPATCHER -;================================================================================================== +; JUMP TO FUNCTION GROUP SPECIFIC DISPATCHER. THE FUNCTION GROUP +; IS BASED ON THE TOP NIBBLE OF THE FUNCTION NUMBER. ; -; MAIN BIOS FUNCTION -; B: FUNCTION -;__________________________________________________________________________________________________ +; ENTRY: B=FUNCTION ; HB_DISPATCH: ; #IF (MEMMGR == MM_Z280) ; FOR Z280 MEMMGR, WE DISPATCH VIA THE Z280 SYSCALL. - ; THE SYSCALL MECHANISM WILL CLEAR INTERRUPTS. IN + ; THE SYSCALL MECHANISM WILL DISABLE INTERRUPTS. IN ; GENERAL, INTERRUPTS ARE OK DURING API PROCESSING, ; SO ENABLE THEM HERE. HB_EI #ENDIF ; +; STACK INTEGRITY DIAGNOSTIC CHECK ; #IF FALSE ; *DEBUG* START ; @@ -3497,6 +3770,7 @@ HB_DISPATCH: LD (HB_STACK - HB_STKSIZ + $08),A POP AF RET +; HB_DISPATCH1: ; #ENDIF ; *DEBUG* END @@ -3523,9 +3797,9 @@ HB_DISPERR: SYSCHKERR(ERR_NOFUNC) RET ; -;================================================================================================== -; CHARACTER I/O DEVICE FUNCTION DISPATCHER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- +; CHARACTER I/O DEVICE FUNCTION DISPATCHER +;-------------------------------------------------------------------------------------------------- ; ; ROUTE CALL TO SPECIFIED CHARACTER I/O DRIVER ; B: FUNCTION @@ -3578,9 +3852,9 @@ CIO_SIZ .EQU CIO_MAX * 4 ; EACH ENTRY IS 4 BYTES CIO_CNT .DB 0 ; ENTRY COUNT PREFIX CIO_TBL .FILL CIO_SIZ,0 ; SPACE FOR ENTRIES ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; DISK I/O DEVICE FUNCTION DISPATCHER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; ; ROUTE CALL TO SPECIFIED DISK I/O DRIVER ; B: FUNCTION @@ -3641,9 +3915,11 @@ DIO_SIZ .EQU DIO_MAX * 4 ; EACH ENTRY IS 4 BYTES DIO_CNT .DB 0 ; ENTRY COUNT PREFIX DIO_TBL .FILL DIO_SIZ,0 ; SPACE FOR ENTRIES ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; DISK READ HELPER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- +; +;;; RELOCATE THIS CODE??? ; ; IMPLEMENTS MULTI SECTOR READS AND I/O TO/FROM ; BANKED RAM VIA BOUNCE BUFFER @@ -3676,7 +3952,7 @@ HB_DSKREAD0: LD (HB_DSKBIT),A ; SAVE IT FOR DIAGNOSTICS #ENDIF ; -#IF 1 +#IF TRUE ; CHECK TO SEE IF INTER-BANK I/O NEEDED. BIT 7,H ; TGT BUF IN UPPER 32K? JP NZ,HB_DSKIO ; IF SO, NON-BANKED @@ -3685,7 +3961,7 @@ HB_DSKREAD0: JP Z,HB_DSKIO ; IF SO, NON-BANKED #ENDIF ; -#IF 1 +#IF TRUE ; RAM BANK RANGE CHECK LD A,D ; GET TGT BANK CP BID_RAMN ; BANK IN RANGE 0-N? @@ -3732,9 +4008,9 @@ HB_DSKREADX: LD HL,(HB_IOBUF) ; NEXT BUF ADR JR HB_DSKIOX ; DONE ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; DISK WRITE HELPER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; ; IMPLEMENTS MULTI SECTOR WRITES AND I/O TO/FROM ; BANKED RAM VIA BOUNCE BUFFER @@ -3766,7 +4042,7 @@ HB_DSKWRITE0: LD (HB_DSKBIT),A ; SAVE IT FOR DIAGNOSTICS #ENDIF ; -#IF 1 +#IF TRUE ; CHECK TO SEE IF INTER-BANK I/O NEEDED. BIT 7,H ; TGT BUF IN UPPER 32K? JP NZ,HB_DSKIO ; IF SO, NON-BANKED @@ -3775,7 +4051,7 @@ HB_DSKWRITE0: JP Z,HB_DSKIO ; IF SO, NON-BANKED #ENDIF ; -#IF 1 +#IF TRUE ; RAM BANK RANGE CHECK LD A,D ; GET TGT BANK CP BID_RAMN ; BANK IN RANGE 0-N? @@ -3821,9 +4097,9 @@ HB_DSKWRITEX: LD HL,(HB_IOBUF) ; NEXT BUF ADR JR HB_DSKIOX ; DONE ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; NON-BANKED DISK READ/WRITE -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; HB_DSKIO: ; @@ -3848,23 +4124,27 @@ HB_DSKIOX: OR A ; SET RESULT FLAGS RET ; DONE ; +;-------------------------------------------------------------------------------------------------- +; INVOKE DRIVER DISK I/O FUNCTION +;-------------------------------------------------------------------------------------------------- +; HB_DSKFN: PUSH BC ; SAVE COUNTERS #IF (FPLED_ENABLE & FPLED_DSKACT) LD A,(HB_DSKBIT) ; LOAD UNIT DISK BIT MASK - CALL FP_SETLEDS ; DISPLAY ON DIAG LEDS + CALL FP_SETLEDS ; DISPLAY ON FP LEDS #ENDIF #IF (LEDENABLE & LEDDISKIO) - LED(%00000101) ; BIT 0 FOR TINY Z80 & MBC, BIT 2 FOR SCXXX + DIAG(1) ; BIT 0 FOR TINY Z80 & MBC, BIT 2 FOR SCXXX #ENDIF LD E,1 ; ONE SECTOR HB_DSKFNADR .EQU $+1 CALL PANIC ; READ ONE SECTOR #IF (FPLED_ENABLE & FPLED_DSKACT) - DIAG($00) ; CLEAR DIAG LEDS + FPLEDS($00) ; CLEAR FP LEDS #ENDIF #IF (LEDENABLE & LEDDISKIO) - LED($00) + DIAG(0) #ENDIF POP BC ; RESTORE COUNTERS RET ; RETURN @@ -3876,12 +4156,9 @@ HB_DSKCMD: HB_DSKUNIT .DB 0 ; CURRENT DISK UNIT HB_DSKFUNC .DB 0 ; CURRENT DISK FUNCTION ; -#IF (DSKYENABLE) - #IF (DSKYDSKACT) -; -;================================================================================================== -; DSKY DISK ACTIVITY MONITOR -;================================================================================================== +;-------------------------------------------------------------------------------------------------- +; DSKY DISK ACTIVITY MONITOR +;-------------------------------------------------------------------------------------------------- ; ; THIS FUNCTION IS CALLED BY DISK DRIVERS JUST PRIOR TO ; THE START OF A DISK I/O OPERATION. @@ -3897,6 +4174,9 @@ HB_DSKFUNC .DB 0 ; CURRENT DISK FUNCTION ; HL: ADDRESS OF 32-BIT SECTOR NUMBER (LITTLE-ENDIAN) ; ALL REGISTERS PERSERVED ; +#IF (DSKYENABLE) + #IF (DSKYDSKACT) +; HB_DSKACT: ; SAVE EVERYTHING PUSH AF @@ -3967,9 +4247,9 @@ HB_DSKACTCHS: #ENDIF #ENDIF ; -;================================================================================================== -; REAL TIME CLOCK DEVICE DISPATCHER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- +; REAL TIME CLOCK DEVICE DISPATCHER +;-------------------------------------------------------------------------------------------------- ; ; ROUTE CALL TO REAL TIME CLOCK DRIVER ; B: FUNCTION @@ -3994,14 +4274,12 @@ RTC_SETDISP: LD (RTC_DISPACT),A ; SAVE IT RET ; AND DONE ; -; -; RTC_DISPADR .DW RTC_DISPERR ; RTC DISPATCH ADDRESS RTC_DISPACT .DB 0 ; SET WHEN DISPADR SET ; -;================================================================================================== -; DSKY DEVICE DISPATCHER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- +; DSKY DEVICE DISPATCHER +;-------------------------------------------------------------------------------------------------- ; ; ROUTE CALL TO DSKY DRIVER ; B: FUNCTION @@ -4026,8 +4304,6 @@ DSKY_SETDISP: LD (DSKY_DISPACT),A ; SAVE IT RET ; AND DONE ; -; -; DSKY_DISPADR .DW DSKY_DISPERR ; DSKY DISPATCH ADDRESS DSKY_DISPACT .DB 0 ; SET WHEN DISPADR SET ; @@ -4073,12 +4349,10 @@ VDA_SIZ .EQU VDA_MAX * 4 ; EACH ENTRY IS 4 BYTES .DB VDA_MAX ; MAX ENTRY COUNT TABLE PREFIX VDA_CNT .DB 0 ; ENTRY COUNT PREFIX VDA_TBL .FILL VDA_SIZ,0 ; SPACE FOR ENTRIES - -; ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; SOUND ADAPTER DEVICE DISPATCHER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; ; ROUTE CALL TO SPECIFIED SOUND DEVICE DRIVER ; B: FUNCTION @@ -4086,10 +4360,10 @@ VDA_TBL .FILL VDA_SIZ,0 ; SPACE FOR ENTRIES ; SND_DISPATCH: PUSH IY ; SAVE INCOMING IY - +; LD IY, SND_TBL ; POINT IY TO START OF DIO TABLE CALL HB_DISPCALL ; GO TO GENERIC API CALL CODE - +; POP IY ; RESTORE IY RET ; AND DONE ; @@ -4119,9 +4393,11 @@ SND_SIZ .EQU SND_MAX * 4 ; EACH ENTRY IS 4 BYTES SND_CNT .DB 0 ; ENTRY COUNT PREFIX SND_TBL .FILL SND_SIZ,0 ; SPACE FOR ENTRIES ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; SPEAKER BEEP ROUTINE -;================================================================================================== +;-------------------------------------------------------------------------------------------------- +; +;;; RELOCATE ; ; ROUTINE TO BEEP THE DEFAULT SOUND UNIT ; NEED TO CHECK FOR EXISTENCE OF SOUND UNIT @@ -4162,9 +4438,9 @@ SND_BEEP: CALL SND_DISPATCH ; DO IT RET ; DONE ; -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; SYSTEM FUNCTION DISPATCHER -;================================================================================================== +;-------------------------------------------------------------------------------------------------- ; ; B: FUNCTION ; @@ -4198,6 +4474,18 @@ SYS_DISPATCH: JP Z,SYS_INT ; $FC DEC A ; +HB_DISP_END .EQU $ +; +;================================================================================================== +; SYSTEM API FUNCTIONS +;================================================================================================== +; +HB_SYSAPI_BEG .EQU $ +; +;-------------------------------------------------------------------------------------------------- +; SYSTEM RESET +;-------------------------------------------------------------------------------------------------- +; ; RESTART SYSTEM ; SUBFUNCTION IN C ; @@ -4221,10 +4509,6 @@ SYS_RESINT: ; RESET THE HEAP LD HL,(HEAPCURB) ; GET HBIOS HEAP THRESHOLD LD (CB_HEAPTOP),HL ; RESTORE HEAP TOP -;; -; ; MAKE SURE THE PROPER RESET VECTOR IS AT ADDRESS $0000 -; LD HL,$0040 ; USER RESET CODE STUB -; LD ($0001),HL ; OPERAND OF JP AT $0000 ; XOR A RET @@ -4233,14 +4517,18 @@ SYS_RESINT: ; SYS_RESWARM: ; - CALL SYS_RESINT + CALL SYS_RESINT ; HBIOS INTERNAL RESET ; #IF (MEMMGR == MM_Z280) JP INITSYS4 #ELSE ; PERFORM BANK CALL TO OS IMAGES BANK IN ROM LD SP,HBX_LOC ; STACK JUST BELOW HBIOS PROXY - LD A,BID_IMG0 ; CHAIN TO OS IMAGES BANK + #IFDEF APPBOOT + LD A,BID_AUX ; IF APPBOOT, CHAIN TO AUX BANK + #ELSE + LD A,BID_IMG0 ; ELSE CHAIN TO OS IMAGES BANK + #ENDIF LD IX,0 ; ENTER AT ADDRESS 0 CALL HBX_BNKCALL ; GO THERE HALT ; WE SHOULD NEVER COME BACK! @@ -4251,7 +4539,20 @@ SYS_RESWARM: SYS_RESCOLD: ; #IF (MEMMGR == MM_Z280) - JP Z280_RESTART + ; FOR Z280, NEED TO REMAP THE LOW 32K IN SYSTEM MODE AND + ; CONTINUE AT ADDRESS ZERO. WE CANNOT RETURN HERE AFTER THE + ; BNKSEL IS DONE BECAUSE THE SYSTEM BANK HAS BEEN CHANGED! + ; SO, WE PRESET THE STACK TO CAUSE A JUMP TO ADDRESS ZERO + ; ON RETURN FROM THE BNKSEL. SLICK, RIGHT? + DI ; KILL INTERRUPTS + LD SP,HBX_LOC ; STACK IN HIGH MEMORY + LD HL,0 ; VALUE TO RESUME + PUSH HL ; ... IS PRESET ON STACK +; + ; MAKE ROM BOOT BANK ACTIVE IN LOW SYS MEM + LD A,BID_BOOT ; BOOT BANK + LD B,$10 ; FIRST SYS PDR + JP Z280_BNKSEL ; DO IT AND RESUME FROM STACK #ELSE DI LD SP,HBX_LOC ; STACK JUST BELOW HBIOS PROXY @@ -4313,6 +4614,10 @@ SYS_RESUSER2: ; RET ; ELSE RETURN WITH USER RESET VECTOR IN HL ; +;-------------------------------------------------------------------------------------------------- +; SYSTEM VERSION +;-------------------------------------------------------------------------------------------------- +; ; GET THE CURRENT HBIOS VERSION ; ON INPUT, C=0 ; RETURNS VERSION IN DE AS BCD @@ -4326,6 +4631,10 @@ SYS_VER: XOR A RET ; +;-------------------------------------------------------------------------------------------------- +; SET BANK +;-------------------------------------------------------------------------------------------------- +; ; SET ACTIVE MEMORY BANK AND RETURN PREVIOUSLY ACTIVE MEMORY BANK ; NOTE THAT IT GOES INTO EFFECT AS HBIOS FUNCTION IS EXITED ; HERE, WE JUST SET THE CURRENT BANK @@ -4335,7 +4644,7 @@ SYS_SETBNK: #IF (MEMMGR == MM_Z280) ; FOR Z280 MEMMGR, WE ARE IN SYSTEM MODE HERE, SO WE CAN UPDATE ; THE USER MODE BANK WITHOUT IMPACTING THE RUNNING CODE. IT - ; TAKE EFFECT UPON RETURN TO USER MODE. + ; WILL TAKE EFFECT UPON RETURN TO USER MODE. LD A,(HB_INVBNK) ; GET PREVIOUS BANK PUSH AF ; SAVE IT LD A,C ; NEW BANK TO A @@ -4357,7 +4666,9 @@ SYS_SETBNK: RET ; DONE #ENDIF ; -; GET ACTIVE MEMORY BANK +;-------------------------------------------------------------------------------------------------- +; GET BANK +;-------------------------------------------------------------------------------------------------- ; SYS_GETBNK: LD A,(HB_INVBNK) ; GET THE ACTIVE MEMORY BANK @@ -4365,6 +4676,10 @@ SYS_GETBNK: XOR A ; SIGNAL SUCCESS RET ; +;-------------------------------------------------------------------------------------------------- +; SETUP INTERBANK COPY +;-------------------------------------------------------------------------------------------------- +; ; SET BANKS AND LENGTH FOR INTERBANK MEMORY COPY (BNKCPY) ; ENTRY: E=SOURCE BANK ID ; D=DEST BANK ID @@ -4379,6 +4694,10 @@ SYS_SETCPY: XOR A RET ; +;-------------------------------------------------------------------------------------------------- +; PERFORM INTERBANK COPY +;-------------------------------------------------------------------------------------------------- +; ; PERFORM MEMORY COPY POTENTIALLY ACROSS BANKS ; ENTRY: HL=SOURCE ADDRESS ; DE=DESTINATION ADDRESS @@ -4393,6 +4712,10 @@ SYS_BNKCPY: XOR A RET ; +;-------------------------------------------------------------------------------------------------- +; ALLOCATE HEAP SPACE +;-------------------------------------------------------------------------------------------------- +; ; ALLOCATE HL BYTES OF MEMORY FROM HBIOS HEAP ; RETURNS POINTER TO ALLOCATED MEMORY IN HL ; ON SUCCESS RETURN A == 0, AND Z SET @@ -4402,6 +4725,10 @@ SYS_BNKCPY: SYS_ALLOC: JP HB_ALLOC ; +;-------------------------------------------------------------------------------------------------- +; FREE HEAP SPACE +;-------------------------------------------------------------------------------------------------- +; ; FREE HEAP MEMORY BY SIMPLY RELEASING ALL ; MEMORY BEYOND POINTER IN HL. ; ON SUCCESS RETURN A == 0, AND Z SET @@ -4412,6 +4739,10 @@ SYS_FREE: SYSCHKERR(ERR_NOTIMPL) ; NOT YET IMPLEMENTED RET ; +;-------------------------------------------------------------------------------------------------- +; GET SYSTEM INFORMATION +;-------------------------------------------------------------------------------------------------- +; ; GET SYSTEM INFORMATION ; ITEM TO RETURN INDICATED IN C ; @@ -4786,6 +5117,10 @@ SYS_GETAPPBNKS: XOR A RET ; +;-------------------------------------------------------------------------------------------------- +; SET SYSTEM PARAMETERS +;-------------------------------------------------------------------------------------------------- +; ; SET SYSTEM PARAMETERS ; PARAMETER(S) TO SET INDICATED IN C ; @@ -4881,8 +5216,8 @@ SYS_SETCPUSPD1: CP 1 ; CHECK FOR 1 (FULL SPEED) JR Z,SYS_SETCPUSPD2 ; IF SO, ALL DONE ; ADJUST HL TO REFLECT HALF SPEED OPERATION - SRL H ; ADJUST HL ASSUMING - RR L ; HALF SPEED OPERATION + SRL H ; ADJUST HL ASSUMING + RR L ; HALF SPEED OPERATION ; SYS_SETCPUSPD2: ; @@ -5093,6 +5428,10 @@ SYS_SETPANEL: RET #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; INTERBANK MEMORY PEEK +;-------------------------------------------------------------------------------------------------- +; ; RETURN A BYTE OF MEMORY FROM SPECIFIED BANK ; ENTRY: D=BANK ID, HL=ADDRESS ; RETURN: E=BYTE VALUE @@ -5131,6 +5470,10 @@ SYS_PEEK: XOR A RET ; +;-------------------------------------------------------------------------------------------------- +; INTERBANK MEMORY POKE +;-------------------------------------------------------------------------------------------------- +; ; WRITE A BYTE OF MEMORY TO SPECIFIED BANK ; ENTRY: D=BANK ID, HL=ADDRESS IN HBIOS BANK, E=BYTE VALUE ; @@ -5168,6 +5511,10 @@ SYS_POKE: XOR A RET ; +;-------------------------------------------------------------------------------------------------- +; INTERRUPT MANAGEMENT FUNCTIONS +;-------------------------------------------------------------------------------------------------- +; ; INTERRUPT MANAGEMENT FUNCTIONS ; SUBFUNCTION IN C ; @@ -5278,20 +5625,24 @@ SYS_INTSET1: XOR A ; SIGNAL SUCCESS RET ; DONE ; +HB_SYSAPI_END .EQU $ +; ;================================================================================================== ; Z280 INTERRUPT VECTOR TABLE ;================================================================================================== ; -#IF (MEMMGR == MM_Z280) +HB_Z280IVT_BEG .EQU $ ; - ; THE Z280 IVT MUST BE ON A 4K BOUNDARY. IT HAS BEEN LOCATED - ; HERE IN AN EFFORT TO MINIMIZE WASTED SPACE. THERE SHOULD BE - ; A LITTLE LESS THAN 4K OF CODE ABOVE. +; THE Z280 IVT MUST BE ON A 4K BOUNDARY. IT HAS BEEN LOCATED +; HERE IN AN EFFORT TO MINIMIZE WASTED SPACE. THERE SHOULD BE +; A LITTLE LESS THAN 4K OF CODE ABOVE. +; +#IF (MEMMGR == MM_Z280) ; Z280_IVT_SLACK_ORG .EQU $ ALIGN($1000) Z280_IVT_SLACK .EQU $ - Z280_IVT_SLACK_ORG - .ECHO "Z280 IVT SLACK occupies " + .ECHO "Z280 IVT SLACK = " .ECHO Z280_IVT_SLACK .ECHO " bytes.\n" ; @@ -5365,16 +5716,107 @@ Z280_IVT: .DW HBX_IV0D .DW HBX_IV0E .DW HBX_IV0F +; ; THE REMAINDER OF THE Z280 IVT IS TRUNCATED HERE BECAUSE IT ; TAKES A BUNCH OF SPACE AND IS NOT USED. WE SUPPORT ONLY ; 16 VECTORED INTERRUPTS AND THEY MUST BE CONNECTED TO INTA. ; #ENDIF ; +HB_Z280IVT_END .EQU $ +; ;================================================================================================== -; GLOBAL HBIOS FUNCTIONS +; GLOBAL INTERNAL HBIOS FUNCTIONS ;================================================================================================== ; +HB_INTFUNC_BEG .EQU $ +; +;-------------------------------------------------------------------------------------------------- +; PRINT DECIMAL VALUE WITH 3 DIGIT MANTISSA +;-------------------------------------------------------------------------------------------------- +; +; PRINT VALUE OF HL AS THOUSANDTHS, IE. 0.000 +; +PRTD3M: + PUSH BC + PUSH DE + PUSH HL + LD E,'0' + LD BC,-10000 + CALL PRTD3M1 + LD E,0 + LD BC,-1000 + CALL PRTD3M1 + CALL PC_PERIOD + LD BC,-100 + CALL PRTD3M1 + LD C,-10 + CALL PRTD3M1 + LD C,-1 + CALL PRTD3M1 + POP HL + POP DE + POP BC + RET +PRTD3M1: + LD A,'0' - 1 +PRTD3M2: + INC A + ADD HL,BC + JR C,PRTD3M2 + SBC HL,BC + CP E + JR Z,PRTD3M3 + LD E,0 + CALL COUT +PRTD3M3: + RET +; +;-------------------------------------------------------------------------------------------------- +; INITIALIZATION VECTOR PROCESSING SUPPORT +;-------------------------------------------------------------------------------------------------- +; +; CALL A LIST OF ROUTINES POINTED TO BY DE OF LENGTH B. +; +CALLLIST: + LD A,(DE) + LD L,A + INC DE + LD A,(DE) + LD H,A + INC DE + PUSH DE + PUSH BC + CALL JPHL + POP BC + POP DE + DJNZ CALLLIST +CALLDUMMY: + RET +; +;-------------------------------------------------------------------------------------------------- +; GLOBAL IDLE PROCESSING +;-------------------------------------------------------------------------------------------------- +; +; GLOBAL HBIOS IDLE PROCESSING IS DONE HERE. THIS ROUTINE SHOULD +; BE CALLED WHENEVER WAITING FOR USER INPUT. +; +IDLE: + PUSH AF + PUSH BC + PUSH DE + PUSH HL + PUSH IY +#IF (FDENABLE) + CALL FD_IDLE +#ENDIF + POP IY + POP HL + POP DE + POP BC + POP AF + RET +; ; COMMON ROUTINE THAT IS CALLED BY CHARACTER IO DRIVERS WHEN ; AN IDLE CONDITION IS DETECTED (WAIT FOR INPUT/OUTPUT) ; @@ -5387,120 +5829,189 @@ CIO_IDLE: POP AF ; RECOVER AF RET ; -#IF (INTMODE == 1) -; -; ROUTINE BELOW IS USED TO ADD A NEW VECTOR TO THE IM1 -; CALL LIST ABOVE. ENTER WITH HL=VECTOR ADDRESS IN HBIOS +; SET HL TO IY+A, A IS TRASHED ; -HB_ADDIM1: - EX DE,HL ; VECTOR ADDRESS TO DE - LD HL,(HB_IM1PTR) ; GET PTR FOR NEXT ENTRY - INC HL ; BUMP PTR TO ADDRESS FIELD OF CALL OPCODE - LD (HL),E ; ADD VECTOR ADDRESS - INC HL ; ... - LD (HL),D ; ... - INC HL ; BUMP PTR - INC HL ; BUMP PTR - LD (HB_IM1PTR),HL ; SAVE UPDATED POINTER - LD HL,HB_IM1CNT ; POINT TO ENTRY COUNT - INC (HL) ; INCREMENT - RET ; DONE +LDHLIYA: + PUSH IY ; COPY INSTANCE DATA PTR + POP HL ; ... TO HL + ;JP ADDHLA ; APPLY OFFSET TO HL AND RETURN + ADD A,L ; ADD OFFSET TO LSB + LD L,A ; ... PUT BACK IN L + RET NC ; DONE IF CF NOT SET + INC H ; IF CF SET, BUMP MSB + RET ; ... AND RETURN ; -HB_IM1CNT .DB 0 ; NUMBER OF ENTRIES IN CALL LIST -HB_IM1MAX .DB 8 ; MAX ENTRIES IN CALL LIST -HB_IM1PTR .DW HB_IM1INT ; POINTER FOR NEXT IM1 ENTRY +;-------------------------------------------------------------------------------------------------- +; CHS TO LBA CONVERSION +;-------------------------------------------------------------------------------------------------- ; -#ENDIF +; CONVERT AN HBIOS STANDARD HARD DISK CHS ADDRESS TO +; AN LBA ADDRESS. A STANDARD HBIOS HARD DISK IS ASSUMED +; TO HAVE 16 SECTORS PER TRACK AND 16 HEADS PER CYLINDER. ; -#IF (DSKYENABLE) +; INPUT: HL=TRACK, D=HEAD, E=SECTOR +; OUTPUT: DE:HL=32 BIT LBA ADDRESS (D:7 IS NOT SET IN THE RESULT) ; -;================================================================================================== -; CONVERT 32 BIT BINARY TO 8 BYTE HEX SEGMENT DISPLAY -;================================================================================================== +HB_CHS2LBA: ; -; HL: ADR OF 32 BIT BINARY -; DE: ADR OF DEST LED SEGMENT DISPLAY BUFFER (8 BYTES) + LD A,D ; HEAD TO A + RLCA ; LEFT SHIFT TO HIGH NIBBLE + RLCA ; ... DEPENDS ON HIGH + RLCA ; ... NIBBLE BEING 0 SINCE + RLCA ; ... IT ROTATES INTO LOW NIBBLE + OR E ; COMBINE WITH SECTOR (HIGH NIBBLE MUST BE ZERO) + LD D,0 + LD E,H + LD H,L + LD L,A + XOR A + RET ; -DSKY_BIN2SEG: - LD B,4 ; 4 BYTES OF INPUT - LD A,B ; PUT IN ACCUM - CALL ADDHLA ; PROCESS FROM END (LITTLE ENDIAN) -DSKY_BIN2SEG1: - DEC HL ; DEC PTR (LITTLE ENDIAN) - LD A,(HL) ; HIGH NIBBLE - RRCA \ RRCA \ RRCA \ RRCA ; ROTATE BITS - CALL DSKY_BIN2SEG_NIB ; CONVERT NIBBLE INTO OUTPUT BUF - LD A,(HL) ; LOW NIBBLE - CALL DSKY_BIN2SEG_NIB ; CONVERT NIBBLE INTO OUTPUT BUF - DJNZ DSKY_BIN2SEG1 ; LOOP FOR ALL INPUT BYTES - RET ; DONE +;-------------------------------------------------------------------------------------------------- +; SYSTEM CHECK / PANIC +;-------------------------------------------------------------------------------------------------- ; -DSKY_BIN2SEG_NIB: - PUSH HL ; SAVE HL - LD HL,DSKY_HEXMAP ; POINT TO SEG MAP TABLE - AND $0F ; ISOLATE LOW NIBBLE - CALL ADDHLA ; OFFSET INTO TABLE - LD A,(HL) ; LOAD VALUE FROM TABLE - POP HL ; RESTORE HL - LD (DE),A ; SAVE VALUE TO OUTPUT BUF - INC DE ; BUMP TO NEXT OUTPUT BYTE - RET ; DONE +; SYSTEM CHECK: DUMP MACHINE STATE AND CONTINUE? ; -#ENDIF +SYSCHKA: + ; CHECK DIAG LEVEL TO SEE IF WE SHOULD DISPLAY + PUSH AF ; PRESERVE INCOMING AF VALUE + LD A,(CB_DIAGLVL) ; GET DIAGNOSTIC LEVEL + CP DL_ERROR ; >= ERROR LEVEL + JR C,SYSCHK1 ; IF NOT, GO HOME + POP AF ; RESTORE INCOMING AF VALUE ; + ; DISPLAY SYSCHK MESSAGE + PUSH DE ; PRESERVE DE VALUE + LD DE,STR_SYSCHK ; POINT TO PREFIX STRING + CALL WRITESTR ; PRINT IT + POP DE ; RESTORE DE VALUE + CALL XREGDMP ; DUMP REGISTERS + + ; DISPLAY ERROR CODE. IT IS AT RETURN ADDRESS+1 .. LD A,XX + EX (SP),HL ; GET RETURN ADDRESS + INC HL ; POINT TO THE ERROR CODE + PUSH AF + LD A,(HL) ; DISPLAY + CALL PRTHEXBYTE + POP AF + DEC HL ; RESTORE RETURN ADDRESS + EX (SP),HL ; + JR CONTINUE ; CHECK W/ USER ; -#IF (MEMMGR == MM_Z280) +SYSCHK1: + ; RETURN IF MESSAGING BYPASSED BY DIAG LEVEL + POP AF + RET ; -Z280_TIMINT: - ; DISCARD REASON CODE - INC SP - INC SP -; - ; SAVE INCOMING REGISTERS +CONTINUE: PUSH AF - PUSH BC +CONTINUE1: PUSH DE - PUSH HL + LD DE,STR_CONTINUE + CALL WRITESTR + POP DE + CALL CIN + RES 5,A ; FORCE UPPERCASE (IMPERFECTLY) + CALL COUT ; ECHO + CP 'Y' + JR Z,CONTINUE3 + CP 'N' + JR Z,SYSHALT + JR CONTINUE1 +CONTINUE3: + CALL NEWLINE + POP AF + RET ; - ; CALL PRIMARY TIMER LOGIC ON EVERY OTHER INT - LD A,(Z280_TIMCTR) - XOR $FF - LD (Z280_TIMCTR),A - CALL Z,HB_TIMINT +; PANIC: DUMP MACHINE STATE AND HALT ; - ; SELECT I/O PAGE $FE (SAVING PREVIOUS VALUE) - LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER - LDCTL HL,(C) ; GET CURRENT I/O PAGE - PUSH HL ; SAVE IT - LD L,$FE ; NEW COUNTER/TIMER I/O PAGE - LDCTL (C),HL +PANIC: + PUSH DE + LD DE,STR_PANIC + CALL WRITESTR + POP DE + CALL XREGDMP ; DUMP REGISTERS + JR SYSHALT ; FULL STOP ; - ; CLEAR END OF COUNT CONDITION TO RESET INTERRUPT - IN A,(Z280_CT0_CMDST) ; GET STATUS - RES 1,A ; CLEAR CC - OUT (Z280_CT0_CMDST),A ; SET C/T 0 +; ISSUE MESSAGE AND HALT SYSTEM ; - ; RESTORE I/O PAGE - LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER - POP HL ; RECOVER ORIGINAL I/O PAGE - LDCTL (C),HL +SYSHALT: + LD DE,STR_HALT + CALL WRITESTR + DI + HALT ; - ; RESTORE REGISTERS - POP HL - POP DE - POP BC - POP AF +;-------------------------------------------------------------------------------------------------- +; INTERRUPT MANAGEMENT SUPPORT +;-------------------------------------------------------------------------------------------------- ; - RETIL +#IF (INTMODE == 1) ; -Z280_TIMCTR .DB 0 ; USED TO DIVIDE TIMER INTS +; ROUTINE BELOW IS USED TO ADD A NEW VECTOR TO THE IM1 +; CALL LIST ABOVE. ENTER WITH HL=VECTOR ADDRESS IN HBIOS +; +HB_ADDIM1: + EX DE,HL ; VECTOR ADDRESS TO DE + LD HL,(HB_IM1PTR) ; GET PTR FOR NEXT ENTRY + INC HL ; BUMP PTR TO ADDRESS FIELD OF CALL OPCODE + LD (HL),E ; ADD VECTOR ADDRESS + INC HL ; ... + LD (HL),D ; ... + INC HL ; BUMP PTR + INC HL ; BUMP PTR + LD (HB_IM1PTR),HL ; SAVE UPDATED POINTER + LD HL,HB_IM1CNT ; POINT TO ENTRY COUNT + INC (HL) ; INCREMENT + RET ; DONE ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; DSKY SUPPORT +;-------------------------------------------------------------------------------------------------- +; +#IF (DSKYENABLE) +; +; CONVERT 32 BIT BINARY TO 8 BYTE HEX SEGMENT DISPLAY +; +; HL: ADR OF 32 BIT BINARY +; DE: ADR OF DEST LED SEGMENT DISPLAY BUFFER (8 BYTES) +; +DSKY_BIN2SEG: + LD B,4 ; 4 BYTES OF INPUT + LD A,B ; PUT IN ACCUM + CALL ADDHLA ; PROCESS FROM END (LITTLE ENDIAN) +DSKY_BIN2SEG1: + DEC HL ; DEC PTR (LITTLE ENDIAN) + LD A,(HL) ; HIGH NIBBLE + RRCA \ RRCA \ RRCA \ RRCA ; ROTATE BITS + CALL DSKY_BIN2SEG_NIB ; CONVERT NIBBLE INTO OUTPUT BUF + LD A,(HL) ; LOW NIBBLE + CALL DSKY_BIN2SEG_NIB ; CONVERT NIBBLE INTO OUTPUT BUF + DJNZ DSKY_BIN2SEG1 ; LOOP FOR ALL INPUT BYTES + RET ; DONE +; +DSKY_BIN2SEG_NIB: + PUSH HL ; SAVE HL + LD HL,DSKY_HEXMAP ; POINT TO SEG MAP TABLE + AND $0F ; ISOLATE LOW NIBBLE + CALL ADDHLA ; OFFSET INTO TABLE + LD A,(HL) ; LOAD VALUE FROM TABLE + POP HL ; RESTORE HL + LD (DE),A ; SAVE VALUE TO OUTPUT BUF + INC DE ; BUMP TO NEXT OUTPUT BYTE + RET ; DONE +; +#ENDIF ; +;-------------------------------------------------------------------------------------------------- +; SYSTEM TIMER INTERRUPT HANDLER +;-------------------------------------------------------------------------------------------------- ; HB_TIMINT: +; #IF FALSE ; *DEBUG* LD HL,HB_TIMDBGCNT INC (HL) @@ -5584,68 +6095,302 @@ HB_BADINTCNT .DB 0 OR $FF ; SIGNAL INTERRUPT HANDLED RET ; -; Z280 BAD INT HANDLER -; -#IF (MEMMGR == MM_Z280) +;-------------------------------------------------------------------------------------------------- +; API FUNCTION DISPATCH SUPPORT +;-------------------------------------------------------------------------------------------------- ; -Z280_BADINT: - ; SAVE REASON CODE FOR POSSIBLE RETURN VIA RETIL - EX (SP),HL ; GET MSR, SAVE HL - LD (HB_RCSAV),HL ; SAVE IT - POP HL ; RECOVER HL, POP STACK - ; SAVE MSR FOR POSSIBLE RETURN VIA RETIL - EX (SP),HL ; GET MSR, SAVE HL - LD (HB_MSRSAV),HL ; SAVE IT - POP HL ; RECOVER HL, POP STACK +; ON ENTRY B IS API FUNCTION NUMBER AND C IS UNIT # +; (INDEX INTO XXX_TBL OF UNITS) AND IY POINTS TO START OF UNIT TABLE. +; USE UNIT # IN C TO LOOKUP XXX_TBL ENTRY. THE XXX_TBL +; ENTRY CONTAINS THE START OF THE DRIVER FUNCTION TABLE AND +; THE DEVICE SPECIFIC INSTANCE DATA (BLOB). SET IY TO BLOB ADDRESS +; AND CALL THE SPECIFIC FUNCTION REQUESTED IN THE DRIVER. ; - PUSH DE - LD DE,Z280_BADINTSTR - CALL NEWLINE2 - PRTS("+++ $") - CALL WRITESTR - POP DE - CALL XREGDMP +HB_DISPCALL: + PUSH HL ; SAVE INCOMING HL VALUE + CALL HB_DISPCALC ; IY = BLOB ADR, HL = FN ADR + JR NZ,HB_DISPCALL1 ; ABORT ON ERROR + EX (SP),HL ; RESTORE HL & FN ADR TO TOS + RET ; JUMP TO FN ADR +HB_DISPCALL1: + POP HL ; RECOVER HL + RET ; AND DONE ; - ; RECOVER MSR, THEN RETURN VIA RETIL - PUSH HL ; SAVE HL - LD HL,(HB_RCSAV) ; GET SAVED REASON CODE - PRTS(" RC=$") - CALL PRTHEXWORDHL ; DUMP MSR - LD HL,(HB_MSRSAV) ; GET SAVED MSR - PRTS(" MSR=$") - CALL PRTHEXWORDHL ; DUMP MSR - EX (SP),HL ; MSR TO STK, RECOVER HL +; ENTRY: BC=FUNC/UNIT, IY=DISPATCH TABLE +; EXIT: HL=FUNC ADR, IY=DATA BLOB ADR ; - RETIL ; RETURN FROM INT +HB_DISPCALC: + ; CHECK INCOMING UNIT INDEX IN C FOR VALIDITY + LD A,C ; A := INCOMING DISK UNIT INDEX + CP (IY-1) ; COMPARE TO COUNT + JR NC,HB_UNITERR ; HANDLE INVALID UNIT INDEX + + ; CHECK FUNCTION INDEX FOR VALIDITY + LD A,B ; A := INCOMING FUNCTION NUMBER + AND $0F ; LOW NIBBLE ONLY FOR FUNC INDEX + CP (IY-3) ; CHECK FN NUM AGAINST MAX + JR NC,HB_FUNCERR ; HANDLE FN NUM OUT OF RANGE ERROR + + ; BUMP IY TO ACTUAL XXX_TBL ENTRY FOR INCOMING UNIT INDEX + PUSH BC ; SAVE BC + LD B,0 ; MSB IS ALWAYS ZERO + RLC C ; MULTIPLY UNIT INDEX + RLC C ; ... BY 4 FOR TABLE ENTRY OFFSET + ADD IY,BC ; SET IY TO ENTRY ADDRESS + POP BC ; RESTORE BC + + ; DERIVE DRIVER FUNC ADR TO CALL + ;PUSH HL ; SAVE INCOMING HL + LD L,(IY+0) ; COPY DRIVER FUNC TABLE + LD H,(IY+1) ; ... START TO HL + RLCA ; CONV UNIT (STILL IN A) TO FN ADR OFFSET + CALL ADDHLA ; HL NOW HAS DRIVER FUNC TBL START ADR + LD A,(HL) ; DEREFERENCE HL + INC HL ; ... TO GET + LD H,(HL) ; ... ACTUAL + LD L,A ; ... TARGET FUNCTION ADDRESS + ;EX (SP),HL ; RESTORE HL, FUNC ADR ON STACK + + ; GET UNIT INSTANCE DATA BLOB ADDRESS TO IY + ;PUSH HL ; SAVE INCOMING HL + PUSH HL ; SAVE FUNC ADR + LD L,(IY+2) ; HL := DATA BLOB ADDRESS + LD H,(IY+3) ; ... + EX (SP),HL ; RESTORE HL, BLOB ADR ON TOS + POP IY ; IY := BLOB ADR + + XOR A ; SIGNAL SUCCESS + RET ; JUMP TO DRIVER FUNC ADR ON TOS ; -Z280_SSTEP: - ; SAVE HL AND MSR FOR POSSIBLE RETURN VIA RETIL - EX (SP),HL ; GET MSR, SAVE HL - LD (HB_MSRSAV),HL ; SAVE IT - POP HL ; RECOVER HL, POP STACK +HB_FUNCERR: + SYSCHKERR(ERR_NOFUNC) ; SIGNAL ERROR + RET ; - PUSH DE - LD DE,Z280_SSTEPSTR - JP Z280_DIAG +HB_UNITERR: + SYSCHKERR(ERR_NOUNIT) ; SIGNAL ERROR + RET ; -Z280_BRKHLT: - ; SAVE HL AND MSR FOR POSSIBLE RETURN VIA RETIL - EX (SP),HL ; GET MSR, SAVE HL - LD (HB_MSRSAV),HL ; SAVE IT - POP HL ; RECOVER HL, POP STACK +; ADD AN ENTRY TO THE UNIT TABLE AT ADDRESS IN HL +; BC: DRIVER FUNCTION TABLE +; DE: ADDRESS OF UNIT INSTANCE DATA +; RETURN +; A: UNIT NUMBER ASSIGNED ; - PUSH DE - LD DE,Z280_BRKHLTSTR - JP Z280_DIAG +HB_ADDENT: + DEC HL ; POINT TO ENTRY COUNT + LD A,(HL) ; GET ENTRY COUNT + PUSH AF ; SAVE VALUE TO RETURN AS ENTRY NUM AT END + INC A ; INCREMENT TO ACCOUNT FOR NEW ENTRY + DEC HL ; POINT TO ENTRY MAX + CP (HL) ; COMPARE MAX TO CURRENT COUNT (COUNT - MAX) + CALL NC,PANIC ; OVERFLOW + INC HL ; POINT TO COUNT + LD (HL),A ; SAVE NEW COUNT + INC HL ; POINT TO START OF TABLE + DEC A ; CONVERT A FROM ENTRY COUNT TO ENTRY INDEX + RLCA ; MULTIPLY BY 4 + RLCA ; ... TO GET BYTE OFFSET OF ENTRY + CALL ADDHLA ; MAKE HL POINT TO ACTUAL ENTRY ADDRESS + PUSH BC ; GET TABLE ENTRY ADDRESS TO BC + EX (SP),HL ; ... AND DISPATCH ADDRESS TO HL + POP BC ; ... SO THAT DE:HL HAS 32 BIT ENTRY + CALL ST32 ; LD (BC),DE:HL STORES THE ENTRY + POP AF ; RETURN ENTRY INDEX (UNIT NUMBER ASSIGNED) + RET ; -Z280_DIVEXC: - ; SAVE HL AND MSR FOR POSSIBLE RETURN VIA RETIL - EX (SP),HL ; GET MSR, SAVE HL - LD (HB_MSRSAV),HL ; SAVE IT - POP HL ; RECOVER HL, POP STACK +;-------------------------------------------------------------------------------------------------- +; HEAP MEMORY ALLOCATION +;-------------------------------------------------------------------------------------------------- ; - PUSH DE - LD DE,Z280_DIVEXCSTR +; ALLOCATE HL BYTES OF MEMORY ON THE HEAP +; RETURNS POINTER TO ALLOCATED SPACE IN HL +; ON SUCCESS RETURN A == 0, AND Z SET +; ON FAILURE A <> 0 AND NZ SET AND HL TRASHED +; ALL OTHER REGISTERS PRESERVED +; +; A 4 BYTE HEADER IS PLACED IN FRONT OF THE ALLOCATED MEMORY +; - DWORD: SIZE OF MEMORY ALLOCATED (DOES NOT INCLUDE 4 BYTE HEADER) +; - DWORD: ADDRESS WHERE ALLOC WAS CALLED (VALUE ON TOP OF STACK AT CALL) +; +HB_ALLOC: +; +#IFDEF MEMDBG + CALL PRTSTRD + .TEXT "\r\n>>> ALLOC SIZE=0x$") + CALL PRTHEXWORDHL +#ENDIF +; + ; SAVE ALLOC SIZE AND REFERENCE ADR FOR SUBSEQUENT HEADER CONSTRUCTION + LD (HB_TMPSZ),HL ; SAVE INCOMING SIZE REQUESTED + ; USE EX (SP),HL INSTEAD???? + POP HL ; GET RETURN ADDRESS + LD (HB_TMPREF),HL ; SAVE AS REFERENCE + ; USE EX (SP),HL INSTEAD???? + PUSH HL ; PUT IT BACK ON STACK + LD HL,(HB_TMPSZ) ; RECOVER INCOMING MEM SIZE PARM +; + ; CALC NEW HEAP TOP AND HANDLE OUT-OF-SPACE ERROR + PUSH DE ; SAVE INCOMING DE + LD DE,4 ; SIZE OF HEADER + ADD HL,DE ; ADD IT IN + JR C,HB_ALLOC1 ; ERROR ON OVERFLOW + LD DE,(CB_HEAPTOP) ; CURRENT HEAP TOP + ADD HL,DE ; ADD IT IN, HL := NEW HEAP TOP + JR C,HB_ALLOC1 ; ERROR ON OVERFLOW + BIT 7,H ; TEST PAST END OF BANK (>= 32K) + JR NZ,HB_ALLOC1 ; ERROR IF PAST END +; + ; SAVE NEW HEAP TOP + LD DE,(CB_HEAPTOP) ; GET ORIGINAL HEAP TOP + LD (CB_HEAPTOP),HL ; SAVE NEW HEAP TOP +; +#IFDEF MEMDBG + CALL PRTSTRD + .TEXT " TOP=0x$") + CALL PRTHEXWORDHL +#ENDIF +; + ; SET HEADER VALUES + EX DE,HL ; HEADER ADR TO HL + LD DE,(HB_TMPSZ) ; GET THE ORIG SIZE REQUESTED + LD (HL),E ; SAVE SIZE (LSB) + INC HL ; BUMP HEADER POINTER + LD (HL),D ; SAVE SIZE (MSB) + INC HL ; BUMP HEADER POINTER + LD DE,(HB_TMPREF) ; GET THE REFERENCE ADR + LD (HL),E ; SAVE REF ADR (LSB) + INC HL ; BUMP HEADER POINTER + LD (HL),D ; SAVE REF ADR (MSB) + INC HL ; BUMP HEADER POINTER +; + ; RETURN SUCCESS, HL POINTS TO START OF ALLOCATED MEMORY (PAST HEADER) + POP DE ; RESTORE INCOMING DE + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN +; +HB_ALLOC1: + ; ERROR RETURN + POP DE ; RESTORE INCOMING DE + SYSCHKERR(ERR_NOMEM) ; SIGNAL ERROR + RET +; +HB_TMPSZ .DW 0 +HB_TMPREF .DW 0 +; +;-------------------------------------------------------------------------------------------------- +; Z280 SUPPORT ROUTINES +;-------------------------------------------------------------------------------------------------- +; +; Z280 SYSTEM TIMER INTERRUPT HANDLER +; +#IF (MEMMGR == MM_Z280) +; +Z280_TIMINT: + ; DISCARD REASON CODE + INC SP + INC SP +; + ; SAVE INCOMING REGISTERS + PUSH AF + PUSH BC + PUSH DE + PUSH HL +; + ; CALL PRIMARY TIMER LOGIC ON EVERY OTHER INT + LD A,(Z280_TIMCTR) + XOR $FF + LD (Z280_TIMCTR),A + CALL Z,HB_TIMINT +; + ; SELECT I/O PAGE $FE (SAVING PREVIOUS VALUE) + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + LDCTL HL,(C) ; GET CURRENT I/O PAGE + PUSH HL ; SAVE IT + LD L,$FE ; NEW COUNTER/TIMER I/O PAGE + LDCTL (C),HL +; + ; CLEAR END OF COUNT CONDITION TO RESET INTERRUPT + IN A,(Z280_CT0_CMDST) ; GET STATUS + RES 1,A ; CLEAR CC + OUT (Z280_CT0_CMDST),A ; SET C/T 0 +; + ; RESTORE I/O PAGE + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + POP HL ; RECOVER ORIGINAL I/O PAGE + LDCTL (C),HL +; + ; RESTORE REGISTERS + POP HL + POP DE + POP BC + POP AF +; + RETIL +; +Z280_TIMCTR .DB 0 ; USED TO DIVIDE TIMER INTS +; +#ENDIF +; +#IF (MEMMGR == MM_Z280) +; +Z280_BADINT: + ; SAVE REASON CODE FOR POSSIBLE RETURN VIA RETIL + EX (SP),HL ; GET MSR, SAVE HL + LD (HB_RCSAV),HL ; SAVE IT + POP HL ; RECOVER HL, POP STACK + ; SAVE MSR FOR POSSIBLE RETURN VIA RETIL + EX (SP),HL ; GET MSR, SAVE HL + LD (HB_MSRSAV),HL ; SAVE IT + POP HL ; RECOVER HL, POP STACK +; + PUSH DE + LD DE,Z280_BADINTSTR + CALL NEWLINE2 + PRTS("+++ $") + CALL WRITESTR + POP DE + CALL XREGDMP +; + ; RECOVER MSR, THEN RETURN VIA RETIL + PUSH HL ; SAVE HL + LD HL,(HB_RCSAV) ; GET SAVED REASON CODE + PRTS(" RC=$") + CALL PRTHEXWORDHL ; DUMP MSR + LD HL,(HB_MSRSAV) ; GET SAVED MSR + PRTS(" MSR=$") + CALL PRTHEXWORDHL ; DUMP MSR + EX (SP),HL ; MSR TO STK, RECOVER HL +; + RETIL ; RETURN FROM INT +; +Z280_SSTEP: + ; SAVE HL AND MSR FOR POSSIBLE RETURN VIA RETIL + EX (SP),HL ; GET MSR, SAVE HL + LD (HB_MSRSAV),HL ; SAVE IT + POP HL ; RECOVER HL, POP STACK +; + PUSH DE + LD DE,Z280_SSTEPSTR + JP Z280_DIAG +; +Z280_BRKHLT: + ; SAVE HL AND MSR FOR POSSIBLE RETURN VIA RETIL + EX (SP),HL ; GET MSR, SAVE HL + LD (HB_MSRSAV),HL ; SAVE IT + POP HL ; RECOVER HL, POP STACK +; + PUSH DE + LD DE,Z280_BRKHLTSTR + JP Z280_DIAG +; +Z280_DIVEXC: + ; SAVE HL AND MSR FOR POSSIBLE RETURN VIA RETIL + EX (SP),HL ; GET MSR, SAVE HL + LD (HB_MSRSAV),HL ; SAVE IT + POP HL ; RECOVER HL, POP STACK +; + PUSH DE + LD DE,Z280_DIVEXCSTR JP Z280_DIAG ; Z280_STKOVR: @@ -5707,23 +6452,31 @@ Z280_PRIVINST: EX (SP),HL ; GET ADR, SAVE HL ; PUSH AF - PUSH BC - PUSH DE + PUSH BC ; NEEDED? + PUSH DE ; NEEDED? ; LDUP A,(HL) ; BYTE FROM USER SPACE ; - ; HANDLE DI + ; HANDLE USER MODE Z80 DI CP $F3 ; DI? JR NZ,Z280_PRIVINST2 - HB_DI ; DO THE DI + + ;;;HB_DI ; DO THE DI + XOR A ; NO INTERRUPTS + LD (HB_MSRSAV),A ; UPDATE SAVED MSR LSB + INC HL ; BUMP PAST IT JR Z280_PRIVINSTX ; Z280_PRIVINST2: - ; HANDLE EI + ; HANDLE USER MODE Z80 EI CP $FB ; EI? JR NZ,Z280_PRIVINST3 - HB_EI ; DO THE EI + + ;;;HB_EI ; DO THE EI + LD A,$0B ; NORMAL INTERRUPTS + LD (HB_MSRSAV),A ; UPDATE SAVED MSR LSB + INC HL ; BUMP PAST IT JR Z280_PRIVINSTX ; @@ -5750,8 +6503,8 @@ Z280_PRIVINST4: ; Z280_PRIVINSTX: ; RESTORE REGISTERS - POP DE - POP BC + POP DE ; NEEDED? + POP BC ; NEEDED? POP AF ; ; RECOVER HL AND MSR, THEN RETURN VIA RETIL @@ -5768,290 +6521,31 @@ Z280_PRIVSTR .TEXT "\r\n\r\n*** Privileged Instruction @$" ; #ENDIF ; -; COMMON API FUNCTION DISPATCH CODE +; Z280 BANK COPY (CALLED FROM PROXY) ; -; ON ENTRY B IS API FUNCTION NUMBER AND C IS UNIT # -; (INDEX INTO XXX_TBL OF UNITS) AND IY POINTS TO START OF UNIT TABLE. -; USE UNIT # IN C TO LOOKUP XXX_TBL ENTRY. THE XXX_TBL -; ENTRY CONTAINS THE START OF THE DRIVER FUNCTION TABLE AND -; THE DEVICE SPECIFIC INSTANCE DATA (BLOB). SET IY TO BLOB ADDRESS -; AND CALL THE SPECIFIC FUNCTION REQUESTED IN THE DRIVER. +; USE Z280 PHYSICAL MEMORY DMA COPY TO PERFORM AN INTERBANK COPY. +; COPY FROM (HB_SRCBNK):(HL) TO (HB_DSTBNK):(DE) FOR BC BYTES. BOTH +; HB_SRCBNK AND HB_DSTBNK MUST BE INITIALIZED PRIOR TO CALLING THIS +; ROUTINE. ; -HB_DISPCALL: - PUSH HL ; SAVE INCOMING HL VALUE - CALL HB_DISPCALC ; IY = BLOB ADR, HL = FN ADR - JR NZ,HB_DISPCALL1 ; ABORT ON ERROR - EX (SP),HL ; RESTORE HL & FN ADR TO TOS - RET ; JUMP TO FN ADR -HB_DISPCALL1: - POP HL ; RECOVER HL - RET ; AND DONE +; ADDRESSES ARE TRANSLATED FROM LOGICAL (Z80) TO PHYSICAL (Z280) TO +; SETUP THE DMA COPY PARAMETERS. IF THE SOURCE OR DESTINATION RANGE +; CROSSES OVER THE BANKED/COMMON BOUNDARY AT $8000, THEN SPECIAL STEPS +; MUST BE TAKEN BECAUSE THE BANKED AND COMMON AEAS ARE PROBABLY NOT +; SEQUENTIALLY LOCATED IN PHYSICAL MEMORY. TWO ENTRY POINTS ARE +; PROVIDED. Z280_BNKCPY IS MUCH FASTER, BUT DOES NOT ACCOUNT FOR THE +; COPY RANGES CROSSING OVER THE BANKED/COMMON BOUNDARY (WORKS GREAT +; FOR ANY COPY KNOWN TO STAY WITHIN IT'S OWN AREA). Z280_BNKCPYX +; WILL HANDLE COPIES WHERE THE SOURCE AND/OR DESTINATION RANGES +; CROSS OVER THE BANKED/COMMON MEMORY BOUNDARY. IT DOES THIS BY +; BREAKING UP THE COPY REQUESTS INTO MULTIPLE REQUESTS THAT ALL FIT +; WITHIN A SINGLE BANKED/COMMON MEMORY SEGMENT AND CALLING Z280_BNKCPY +; ITERATIVELY UNTIL THE COPY IS COMPLETE. ; -; ENTRY: BC=FUNC/UNIT, IY=DISPATCH TABLE -; EXIT: HL=FUNC ADR, IY=DATA BLOB ADR -; -HB_DISPCALC: - ; CHECK INCOMING UNIT INDEX IN C FOR VALIDITY - LD A,C ; A := INCOMING DISK UNIT INDEX - CP (IY-1) ; COMPARE TO COUNT - JR NC,HB_UNITERR ; HANDLE INVALID UNIT INDEX - - ; CHECK FUNCTION INDEX FOR VALIDITY - LD A,B ; A := INCOMING FUNCTION NUMBER - AND $0F ; LOW NIBBLE ONLY FOR FUNC INDEX - CP (IY-3) ; CHECK FN NUM AGAINST MAX - JR NC,HB_FUNCERR ; HANDLE FN NUM OUT OF RANGE ERROR - - ; BUMP IY TO ACTUAL XXX_TBL ENTRY FOR INCOMING UNIT INDEX - PUSH BC ; SAVE BC - LD B,0 ; MSB IS ALWAYS ZERO - RLC C ; MULTIPLY UNIT INDEX - RLC C ; ... BY 4 FOR TABLE ENTRY OFFSET - ADD IY,BC ; SET IY TO ENTRY ADDRESS - POP BC ; RESTORE BC - - ; DERIVE DRIVER FUNC ADR TO CALL - ;PUSH HL ; SAVE INCOMING HL - LD L,(IY+0) ; COPY DRIVER FUNC TABLE - LD H,(IY+1) ; ... START TO HL - RLCA ; CONV UNIT (STILL IN A) TO FN ADR OFFSET - CALL ADDHLA ; HL NOW HAS DRIVER FUNC TBL START ADR - LD A,(HL) ; DEREFERENCE HL - INC HL ; ... TO GET - LD H,(HL) ; ... ACTUAL - LD L,A ; ... TARGET FUNCTION ADDRESS - ;EX (SP),HL ; RESTORE HL, FUNC ADR ON STACK - - ; GET UNIT INSTANCE DATA BLOB ADDRESS TO IY - ;PUSH HL ; SAVE INCOMING HL - PUSH HL ; SAVE FUNC ADR - LD L,(IY+2) ; HL := DATA BLOB ADDRESS - LD H,(IY+3) ; ... - EX (SP),HL ; RESTORE HL, BLOB ADR ON TOS - POP IY ; IY := BLOB ADR - - XOR A ; SIGNAL SUCCESS - RET ; JUMP TO DRIVER FUNC ADR ON TOS -; -HB_FUNCERR: - SYSCHKERR(ERR_NOFUNC) ; SIGNAL ERROR - RET -; -HB_UNITERR: - SYSCHKERR(ERR_NOUNIT) ; SIGNAL ERROR - RET -; -; ADD AN ENTRY TO THE UNIT TABLE AT ADDRESS IN HL -; BC: DRIVER FUNCTION TABLE -; DE: ADDRESS OF UNIT INSTANCE DATA -; RETURN -; A: UNIT NUMBER ASSIGNED -; -HB_ADDENT: - DEC HL ; POINT TO ENTRY COUNT - LD A,(HL) ; GET ENTRY COUNT - PUSH AF ; SAVE VALUE TO RETURN AS ENTRY NUM AT END - INC A ; INCREMENT TO ACCOUNT FOR NEW ENTRY - DEC HL ; POINT TO ENTRY MAX - CP (HL) ; COMPARE MAX TO CURRENT COUNT (COUNT - MAX) - CALL NC,PANIC ; OVERFLOW - INC HL ; POINT TO COUNT - LD (HL),A ; SAVE NEW COUNT - INC HL ; POINT TO START OF TABLE - DEC A ; CONVERT A FROM ENTRY COUNT TO ENTRY INDEX - RLCA ; MULTIPLY BY 4 - RLCA ; ... TO GET BYTE OFFSET OF ENTRY - CALL ADDHLA ; MAKE HL POINT TO ACTUAL ENTRY ADDRESS - PUSH BC ; GET TABLE ENTRY ADDRESS TO BC - EX (SP),HL ; ... AND DISPATCH ADDRESS TO HL - POP BC ; ... SO THAT DE:HL HAS 32 BIT ENTRY - CALL ST32 ; LD (BC),DE:HL STORES THE ENTRY - POP AF ; RETURN ENTRY INDEX (UNIT NUMBER ASSIGNED) - RET -; -; ALLOCATE HL BYTES OF MEMORY ON THE HEAP -; RETURNS POINTER TO ALLOCATED SPACE IN HL -; ON SUCCESS RETURN A == 0, AND Z SET -; ON FAILURE A <> 0 AND NZ SET AND HL TRASHED -; ALL OTHER REGISTERS PRESERVED -; -; A 4 BYTE HEADER IS PLACED IN FRONT OF THE ALLOCATED MEMORY -; - DWORD: SIZE OF MEMORY ALLOCATED (DOES NOT INCLUDE 4 BYTE HEADER) -; - DWORD: ADDRESS WHERE ALLOC WAS CALLED (VALUE ON TOP OF STACK AT CALL) -; -HB_ALLOC: -; -#IFDEF MEMDBG - CALL PRTSTRD - .TEXT "\r\n>>> ALLOC SIZE=0x$") - CALL PRTHEXWORDHL -#ENDIF -; - ; SAVE ALLOC SIZE AND REFERENCE ADR FOR SUBSEQUENT HEADER CONSTRUCTION - LD (HB_TMPSZ),HL ; SAVE INCOMING SIZE REQUESTED - ; USE EX (SP),HL INSTEAD???? - POP HL ; GET RETURN ADDRESS - LD (HB_TMPREF),HL ; SAVE AS REFERENCE - ; USE EX (SP),HL INSTEAD???? - PUSH HL ; PUT IT BACK ON STACK - LD HL,(HB_TMPSZ) ; RECOVER INCOMING MEM SIZE PARM -; - ; CALC NEW HEAP TOP AND HANDLE OUT-OF-SPACE ERROR - PUSH DE ; SAVE INCOMING DE - LD DE,4 ; SIZE OF HEADER - ADD HL,DE ; ADD IT IN - JR C,HB_ALLOC1 ; ERROR ON OVERFLOW - LD DE,(CB_HEAPTOP) ; CURRENT HEAP TOP - ADD HL,DE ; ADD IT IN, HL := NEW HEAP TOP - JR C,HB_ALLOC1 ; ERROR ON OVERFLOW - BIT 7,H ; TEST PAST END OF BANK (>= 32K) - JR NZ,HB_ALLOC1 ; ERROR IF PAST END -; - ; SAVE NEW HEAP TOP - LD DE,(CB_HEAPTOP) ; GET ORIGINAL HEAP TOP - LD (CB_HEAPTOP),HL ; SAVE NEW HEAP TOP -; -#IFDEF MEMDBG - CALL PRTSTRD - .TEXT " TOP=0x$") - CALL PRTHEXWORDHL -#ENDIF -; - ; SET HEADER VALUES - EX DE,HL ; HEADER ADR TO HL - LD DE,(HB_TMPSZ) ; GET THE ORIG SIZE REQUESTED - LD (HL),E ; SAVE SIZE (LSB) - INC HL ; BUMP HEADER POINTER - LD (HL),D ; SAVE SIZE (MSB) - INC HL ; BUMP HEADER POINTER - LD DE,(HB_TMPREF) ; GET THE REFERENCE ADR - LD (HL),E ; SAVE REF ADR (LSB) - INC HL ; BUMP HEADER POINTER - LD (HL),D ; SAVE REF ADR (MSB) - INC HL ; BUMP HEADER POINTER -; - ; RETURN SUCCESS, HL POINTS TO START OF ALLOCATED MEMORY (PAST HEADER) - POP DE ; RESTORE INCOMING DE - XOR A ; SIGNAL SUCCESS - RET ; AND RETURN -; -HB_ALLOC1: - ; ERROR RETURN - POP DE ; RESTORE INCOMING DE - SYSCHKERR(ERR_NOMEM) ; SIGNAL ERROR - RET -; -HB_TMPSZ .DW 0 -HB_TMPREF .DW 0 -; -; Z280 BANK SELECTION (CALLED FROM PROXY) -; -#IF (MEMMGR == MM_Z280) -; -; REG A HAS BANK ID, REG B HAS INITIAL PDR TO PROGRAM -; REGISTERS AF, BC, HL DESTROYED -; -; THIS ROUTINE MAY BE RELOCATED TO RUN IN HIGH MEMORY IN CERTAIN CASES -; LIKE A SYSTEM RESTART. IT MUST BE KEPT ENTIRELY RELOCATABLE. -; -Z280_BNKSEL: - ;; *DEBUG* - ;CALL PC_LBKT - ;CALL PRTHEXBYTE - ;CALL PC_RBKT - - ; SELECT I/O PAGE $FE (SAVING PREVIOUS VALUE) - LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER - LDCTL HL,(C) ; GET CURRENT I/O PAGE - PUSH HL ; SAVE IT - LD L,$FF ; NEW I/O PAGE - LDCTL (C),HL ; IMPLEMENT -; - ; CONVERT BANK ID TO TOP 12 BITS OF PHYSICAL ADDRESS - ; WITH $0A IN THE LOW ORDER NIBBLE: - ; BANK ID: R000 BBBB - ; PDR: R000 0BBB B000 1010 (RCBUS) - ; PDR: 0000 RBBB B000 1010 (ZZ80MB) -; - MULTU A,$80 ; HL=0R00 0BBB B000 0000 - BIT 6,H ; RAM BIT SET? - JR Z,Z280_BNKSEL2 ; IF NOT, ALL DONE - RES 6,H ; OTHERWISE, REMOVE RAM BIT - LD A,RAMBIAS >> 6 ; RAM OFFSET (TOP 8 BITS) - OR H ; RECOMBINE - LD H,A ; AND PUT BACK IN H -; -Z280_BNKSEL2: -; - ; SET LOW NIBBLE - LD A,$0A ; VALUE FOR LOW NIBBLE - ADD HL,A ; ADD HL,A ; HL=0000 RBBB B000 1010 -; - ; POINT TO FIRST PDR TO PROGRAM - LD A,B ; INITIAL PDR TO PROG - OUT (Z280_MMUPDRPTR),A ; SET THE PDR POINTER -; - ; PROGRAM 8 PDRS - LD C,Z280_MMUBLKMOV ; PDR BLOCK MOVE PORT - ;LD B,8 ; PROGRAM 8 PDRS - LD A,$10 ; PDR VALUE INCREMENT -Z280_BNKSEL3: - ; PROGRAM 8 PDR VALUES - ; LOOP UNROLLED FOR SPEED - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - OUTW (C),HL ; WRITE VALUE - ADD HL,A ; BUMP VALUE - ;DJNZ Z280_BNKSEL3 ; DO ALL PDRS -; - ; RESTORE I/O PAGE - LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER - POP HL ; RECOVER ORIGINAL I/O PAGE - LDCTL (C),HL -; - RET -; -Z280_BNKSEL_LEN .EQU $ - Z280_BNKSEL -; -#ENDIF -; -; Z280 BANK COPY (CALLED FROM PROXY) -; -; USE Z280 PHYSICAL MEMORY DMA COPY TO PERFORM AN INTERBANK COPY. -; COPY FROM (HB_SRCBNK):(HL) TO (HB_DSTBNK):(DE) FOR BC BYTES. BOTH -; HB_SRCBNK AND HB_DSTBNK MUST BE INITIALIZED PRIOR TO CALLING THIS -; ROUTINE. -; -; ADDRESSES ARE TRANSLATED FROM LOGICAL (Z80) TO PHYSICAL (Z280) TO -; SETUP THE DMA COPY PARAMETERS. IF THE SOURCE OR DESTINATION RANGE -; CROSSES OVER THE BANKED/COMMON BOUNDARY AT $8000, THEN SPECIAL STEPS -; MUST BE TAKEN BECAUSE THE BANKED AND COMMON AEAS ARE PROBABLY NOT -; SEQUENTIALLY LOCATED IN PHYSICAL MEMORY. TWO ENTRY POINTS ARE -; PROVIDED. Z280_BNKCPY IS MUCH FASTER, BUT DOES NOT ACCOUNT FOR THE -; COPY RANGES CROSSING OVER THE BANKED/COMMON BOUNDARY (WORKS GREAT -; FOR ANY COPY KNOWN TO STAY WITHIN IT'S OWN AREA). Z280_BNKCPYX -; WILL HANDLE COPIES WHERE THE SOURCE AND/OR DESTINATION RANGES -; CROSS OVER THE BANKED/COMMON MEMORY BOUNDARY. IT DOES THIS BY -; BREAKING UP THE COPY REQUESTS INTO MULTIPLE REQUESTS THAT ALL FIT -; WITHIN A SINGLE BANKED/COMMON MEMORY SEGMENT AND CALLING Z280_BNKCPY -; ITERATIVELY UNTIL THE COPY IS COMPLETE. -; -; THERE IS ESSENTIALLY NO PROTECTION FOR CALLING THESE ROUTINES WITH -; INVALID PARAMETERS. FOR EXAMPLE, A REQUEST TO COPY $2000 BYTES -; STARTING AT $F000 EXCEEDS THE SIZE OF THE Z80 MEMORY SPACES AND -; RESULTS IN UNDEFINED BEHAVIOR. +; THERE IS ESSENTIALLY NO PROTECTION FOR CALLING THESE ROUTINES WITH +; INVALID PARAMETERS. FOR EXAMPLE, A REQUEST TO COPY $2000 BYTES +; STARTING AT $F000 EXCEEDS THE SIZE OF THE Z80 MEMORY SPACES AND +; RESULTS IN UNDEFINED BEHAVIOR. ; ; THE COPY IS ALWAYS DONE FROM START TO END. IF THE SOURCE AND ; DESTINATION RANGES OVERLAP, THEN YOU MUST TAKE THIS INTO ACCOUNT. @@ -6256,589 +6750,262 @@ Z2DMAADR2: ; #ENDIF ; -; Z280 SYSCALL VECTOR ENTRY POINT. TAKES STACK PARAMETER AS A BRANCH -; ADDRESS AND CALLS IT. ALLOWS ANY USER MODE CODE TO CALL INTO AN -; ARBITRARY LOCATION OF SYSTEM MODE CODE. -; -#IF (MEMMGR == MM_Z280) -Z280_SYSCALL: - EX (SP),HL - LD (Z280_SYSCALL_GO+1),HL - POP HL -Z280_SYSCALL_GO: - CALL $FFFF ; PARM SET ABOVE - RETIL ; RETURN FROM INT -#ENDIF +HB_INTFUNC_END .EQU $ ; ;================================================================================================== -; DEVICE DRIVERS +; UTILITY FUNCTIONS ;================================================================================================== ; -#IF (DSKYENABLE) - #IF (ICMENABLE) -ORG_ICM .EQU $ - #INCLUDE "icm.asm" -SIZ_ICM .EQU $ - ORG_ICM - .ECHO "ICM occupies " - .ECHO SIZ_ICM - .ECHO " bytes.\n" - #ENDIF +HB_UTIL_BEG .EQU $ ; - #IF (PKDENABLE) -ORG_PKD .EQU $ - #INCLUDE "pkd.asm" -SIZ_PKD .EQU $ - ORG_PKD - .ECHO "PKD occupies " - .ECHO SIZ_PKD - .ECHO " bytes.\n" - #ENDIF -; - #IF (H8PENABLE) -ORG_H8P .EQU $ - #INCLUDE "h8p.asm" -SIZ_H8P .EQU $ - ORG_H8P - .ECHO "H8P occupies " - .ECHO SIZ_H8P - .ECHO " bytes.\n" - #ENDIF -#ENDIF -; -#IF (DSRTCENABLE) -ORG_DSRTC .EQU $ - #INCLUDE "dsrtc.asm" -SIZ_DSRTC .EQU $ - ORG_DSRTC - .ECHO "DSRTC occupies " - .ECHO SIZ_DSRTC - .ECHO " bytes.\n" -#ENDIF +#DEFINE USEDELAY +#INCLUDE "util.asm" +#INCLUDE "time.asm" +#INCLUDE "bcd.asm" +#INCLUDE "decode.asm" +#INCLUDE "encode.asm" ; -#IF (DS1501RTCENABLE) -ORG_DS1501RTC .EQU $ - #INCLUDE "ds1501rtc.asm" -SIZ_DS1501RTC .EQU $ - ORG_DS1501RTC - .ECHO "DS1501RTC occupies " - .ECHO SIZ_DS1501RTC - .ECHO " bytes.\n" +#IF (WBWDEBUG == USEXIO) +#INCLUDE "xio.asm" #ENDIF -; -#IF (BQRTCENABLE) -ORG_BQRTC .EQU $ - #INCLUDE "bqrtc.asm" -SIZ_BQRTC .EQU $ - ORG_BQRTC - .ECHO "BQRTC occupies " - .ECHO SIZ_BQRTC - .ECHO " bytes.\n" +#IF (WBWDEBUG == USEMIO) +#INCLUDE "mio.asm" #ENDIF ; -#IF (SIMRTCENABLE) -ORG_SIMRTC .EQU $ - #INCLUDE "simrtc.asm" -SIZ_SIMRTC .EQU $ - ORG_SIMRTC - .ECHO "SIMRTC occupies " - .ECHO SIZ_SIMRTC - .ECHO " bytes.\n" -#ENDIF +; INCLUDE LZSA2 decompression engine if required. ; -#IF (PCFENABLE) -ORG_PCF .EQU $ - #INCLUDE "pcf.asm" -SIZ_PCF .EQU $ - ORG_PCF - .ECHO "PCF occupies " - .ECHO SIZ_PCF - .ECHO " bytes.\n" +#IF ((CVDUENABLE | GDCENABLE | TMSENABLE | VGAENABLE | VRCENABLE) & USELZSA2) +#INCLUDE "unlzsa2s.asm" #ENDIF ; -#IF (DS7RTCENABLE) -ORG_DS7RTC .EQU $ - #INCLUDE "ds7rtc.asm" -SIZ_DS7RTC .EQU $ - ORG_DS7RTC - .ECHO "DS7RTC occupies " - .ECHO SIZ_DS7RTC - .ECHO " bytes.\n" -#ENDIF +;-------------------------------------------------------------------------------------------------- +; CONSOLE CHARACTER I/O HELPER ROUTINES (REGISTERS PRESERVED) +;-------------------------------------------------------------------------------------------------- ; -#IF (INTRTCENABLE) -ORG_INTRTC .EQU $ - #INCLUDE "intrtc.asm" -SIZ_INTRTC .EQU $ - ORG_INTRTC - .ECHO "INTRTC occupies " - .ECHO SIZ_INTRTC - .ECHO " bytes.\n" -#ENDIF +; OUTPUT CHARACTER FROM A ; -#IF (RP5RTCENABLE) -ORG_RP5RTC .EQU $ - #INCLUDE "rp5rtc.asm" -SIZ_RP5RTC .EQU $ - ORG_RP5RTC - .ECHO "RP5RTC occupies " - .ECHO SIZ_RP5RTC - .ECHO " bytes.\n" -#ENDIF -#IF (ASCIENABLE) -ORG_ASCI .EQU $ - #INCLUDE "asci.asm" -SIZ_ASCI .EQU $ - ORG_ASCI - .ECHO "ASCI occupies " - .ECHO SIZ_ASCI - .ECHO " bytes.\n" -#ENDIF +COUT: + ; SAVE ALL INCOMING REGISTERS + PUSH AF + PUSH BC + PUSH DE + PUSH HL ; -#IF (Z2UENABLE) -ORG_Z2U .EQU $ - #INCLUDE "z2u.asm" -SIZ_Z2U .EQU $ - ORG_Z2U - .ECHO "Z2U occupies " - .ECHO SIZ_Z2U - .ECHO " bytes.\n" -#ENDIF + ; GET CURRENT CONSOLE UNIT + LD E,A ; TEMPORARILY STASH OUTPUT CHAR IN E + LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE + CP $FF ; TEST FOR $FF (HBIOS NOT READY) + JR Z,COUT1 ; IF NOT READY, TRY DEBUG OUTPUT ; -#IF (UARTENABLE) -ORG_UART .EQU $ - #INCLUDE "uart.asm" -SIZ_UART .EQU $ - ORG_UART - .ECHO "UART occupies " - .ECHO SIZ_UART - .ECHO " bytes.\n" -#ENDIF + ; USE HBIOS + LD C,A ; CONSOLE UNIT TO C + LD B,BF_CIOOUT ; HBIOS FUNC: OUTPUT CHAR + CALL CIO_DISPATCH ; CALL CIO DISPATCHER DIRECTLY + JR COUT2 ; CONTINUE ; -#IF (DUARTENABLE) -ORG_DUART .EQU $ - #INCLUDE "duart.asm" -SIZ_DUART .EQU $ - ORG_DUART - .ECHO "DUART occupies " - .ECHO SIZ_DUART - .ECHO " bytes.\n" -#ENDIF +COUT1: ; -#IF (SIOENABLE) -ORG_SIO .EQU $ - #INCLUDE "sio.asm" -SIZ_SIO .EQU $ - ORG_SIO - .ECHO "SIO occupies " - .ECHO SIZ_SIO - .ECHO " bytes.\n" +#IF (WBWDEBUG == USEXIO) + LD A,E ; GET OUTPUT CHAR BACK TO ACCUM + CALL XIO_OUTC ; OUTPUT VIA XIO #ENDIF ; -#IF (ACIAENABLE) -ORG_ACIA .EQU $ - #INCLUDE "acia.asm" -SIZ_ACIA .EQU $ - ORG_ACIA - .ECHO "ACIA occupies " - .ECHO SIZ_ACIA - .ECHO " bytes.\n" +#IF (WBWDEBUG == USEMIO) + LD A,E + CALL MIO_OUTC ; OUTPUT VIA MIO #ENDIF ; -#IF (PIOENABLE) -ORG_PIO .EQU $ - #INCLUDE "pio.asm" -SIZ_PIO .EQU $ - ORG_PIO - .ECHO "PIO occupies " - .ECHO SIZ_PIO - .ECHO " bytes.\n" -#ENDIF +COUT2: + ; RESTORE ALL REGISTERS + POP HL + POP DE + POP BC + POP AF + RET ; -#IF (LPTENABLE) -ORG_LPT .EQU $ - #INCLUDE "lpt.asm" -SIZ_LPT .EQU $ - ORG_LPT - .ECHO "LPT occupies " - .ECHO SIZ_LPT - .ECHO " bytes.\n" -#ENDIF +; INPUT CHARACTER TO A ; -#IF (PIO_4P | PIO_ZP | PIO_SBC) -ORG_PIO .EQU $ - #INCLUDE "pio.asm" -SIZ_PIO .EQU $ - ORG_PIO - .ECHO "PIO occupies " - .ECHO SIZ_PIO - .ECHO " bytes.\n" -#ENDIF +CIN: + ; SAVE INCOMING REGISTERS (AF IS OUTPUT) + PUSH BC + PUSH DE + PUSH HL ; -#IF (UFENABLE) -ORG_UF .EQU $ - #INCLUDE "uf.asm" -SIZ_UF .EQU $ - ORG_UF - .ECHO "UF occupies " - .ECHO SIZ_UF - .ECHO " bytes.\n" -#ENDIF + LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE + CP $FF ; TEST FOR $FF (HBIOS NOT READY) + JR Z,CIN1 ; IF NOT READY, TRY DEBUG INPUT ; -#IF (VGAENABLE) -ORG_VGA .EQU $ - #INCLUDE "vga.asm" -SIZ_VGA .EQU $ - ORG_VGA - .ECHO "VGA occupies " - .ECHO SIZ_VGA - .ECHO " bytes.\n" -#ENDIF + ; USE HBIOS + LD C,A ; CONSOLE UNIT TO C + LD B,BF_CIOIN ; HBIOS FUNC: INPUT CHAR + CALL CIO_DISPATCH ; CALL CIO DISPATCHER DIRECTLY + LD A,E ; RESULTANT CHAR TO A + JR CIN2 ; CONTINUE ; -#IF (CVDUENABLE) -ORG_CVDU .EQU $ - #INCLUDE "cvdu.asm" -SIZ_CVDU .EQU $ - ORG_CVDU - .ECHO "CVDU occupies " - .ECHO SIZ_CVDU - .ECHO " bytes.\n" -#ENDIF +CIN1: ; -#IF (VDUENABLE) -ORG_VDU .EQU $ - #INCLUDE "vdu.asm" -SIZ_VDU .EQU $ - ORG_VDU - .ECHO "VDU occupies " - .ECHO SIZ_VDU - .ECHO " bytes.\n" +#IF (WBWDEBUG == USEXIO) + CALL XIO_INC ; GET CHAR #ENDIF ; -#IF (TMSENABLE) -ORG_TMS .EQU $ - #INCLUDE "tms.asm" -SIZ_TMS .EQU $ - ORG_TMS - .ECHO "TMS occupies " - .ECHO SIZ_TMS - .ECHO " bytes.\n" +#IF (WBWDEBUG == USEMIO) + CALL MIO_INC ; GET CHAR #ENDIF ; -#IF (EFENABLE) -ORG_EF .EQU $ - #INCLUDE "ef.asm" -SIZ_EF .EQU $ - ORG_EF - .ECHO "EF occupies " - .ECHO SIZ_EF - .ECHO " bytes.\n" -#ENDIF +CIN2: ; -#IF (GDCENABLE) -ORG_GDC .EQU $ - #INCLUDE "gdc.asm" -SIZ_GDC .EQU $ - ORG_GDC - .ECHO "GDC occupies " - .ECHO SIZ_GDC - .ECHO " bytes.\n" -#ENDIF + ; RESTORE REGISTERS (AF IS OUTPUT) + POP HL + POP DE + POP BC + RET ; -#IF (VRCENABLE) -ORG_VRC .EQU $ - #INCLUDE "vrc.asm" -SIZ_VRC .EQU $ - ORG_VRC - .ECHO "VRC occupies " - .ECHO SIZ_VRC - .ECHO " bytes.\n" -#ENDIF +; RETURN INPUT STATUS IN A (0 = NO CHAR, !=0 CHAR WAITING) ; -#IF (DMAENABLE) -ORG_DMA .EQU $ -#INCLUDE "dma.asm" -SIZ_DMA .EQU $ - ORG_DMA - .ECHO "DMA occupies " - .ECHO SIZ_DMA - .ECHO " bytes.\n" -#ENDIF +CST: + ; SAVE INCOMING REGISTERS (AF IS OUTPUT) + PUSH BC + PUSH DE + PUSH HL ; -; FONTS AREA + LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE + CP $FF ; TEST FOR $FF (HBIOS NOT READY) + JR Z,CST1 ; IF NOT READY, TRY DEBUG DEBUG STATUS ; -ORG_FONTS .EQU $ + ; USE HBIOS + LD C,A ; CONSOLE UNIT TO C + LD B,BF_CIOIST ; HBIOS FUNC: INPUT STATUS + CALL CIO_DISPATCH ; CALL CIO DISPATCHER DIRECTLY + JR CST2 ; CONTINUE ; - .ECHO "FONTS" +CST1: ; -#IFDEF USEFONT8X8 -FONT8X8: - #IF USELZSA2 - #INCLUDE "font8x8c.asm" - #ELSE - #INCLUDE "font8x8u.asm" - #ENDIF - .ECHO " 8X8" +#IF (WBWDEBUG == USEXIO) + CALL XIO_IST ; GET STATUS #ENDIF ; -#IFDEF USEFONT8X11 -FONT8X11: - #IF USELZSA2 - #INCLUDE "font8x11c.asm" - #ELSE - #INCLUDE "font8x11u.asm" - #ENDIF - .ECHO " 8X11" +#IF (WBWDEBUG == USEMIO) + CALL MIO_IST ; GET STATUS #ENDIF ; -#IFDEF USEFONT8X16 -FONT8X16: - #IF USELZSA2 - #INCLUDE "font8x16c.asm" - #ELSE - #INCLUDE "font8x16u.asm" - #ENDIF - .ECHO " 8X16" -#ENDIF +CST2: + ; RESTORE REGISTERS (AF IS OUTPUT) + POP HL + POP DE + POP BC + RET ; -#IFDEF USEFONTCGA -FONTCGA: - #IF USELZSA2 - #INCLUDE "fontcgac.asm" - #ELSE - #INCLUDE "fontcgau.asm" - #ENDIF - .ECHO " CGA" -#ENDIF -; -#IFDEF USEFONTVGARC -FONTVGARC: - #IF USELZSA2 - #INCLUDE "fontvgarcc.asm" - #ELSE - #INCLUDE "fontvgarcu.asm" - #ENDIF - .ECHO " VGARC" -#ENDIF -; -SIZ_FONTS .EQU $ - ORG_FONTS - .ECHO " occupy " - .ECHO SIZ_FONTS - .ECHO " bytes.\n" -; -#IF (KBDENABLE) -ORG_KBD .EQU $ - #INCLUDE "kbd.asm" -SIZ_KBD .EQU $ - ORG_KBD - .ECHO "KBD occupies " - .ECHO SIZ_KBD - .ECHO " bytes.\n" -#ENDIF -; -#IF (PPKENABLE) -ORG_PPK .EQU $ - #INCLUDE "ppk.asm" -SIZ_PPK .EQU $ - ORG_PPK - .ECHO "PPK occupies " - .ECHO SIZ_PPK - .ECHO " bytes.\n" -#ENDIF -; -#IF (MKYENABLE) -ORG_MKY .EQU $ - #INCLUDE "mky.asm" -SIZ_MKY .EQU $ - ORG_MKY - .ECHO "MKY occupies " - .ECHO SIZ_MKY - .ECHO " bytes.\n" -#ENDIF -; -#IF (PRPENABLE) -ORG_PRP .EQU $ - #INCLUDE "prp.asm" -SIZ_PRP .EQU $ - ORG_PRP - .ECHO "PRP occupies " - .ECHO SIZ_PRP - .ECHO " bytes.\n" -#ENDIF -; -#IF (PPPENABLE) -ORG_PPP .EQU $ - #INCLUDE "ppp.asm" -SIZ_PPP .EQU $ - ORG_PPP - .ECHO "PPP occupies " - .ECHO SIZ_PPP - .ECHO " bytes.\n" -#ENDIF -; -#IF (SCONENABLE) -ORG_SCON .EQU $ - #INCLUDE "scon.asm" -SIZ_SCON .EQU $ - ORG_SCON - .ECHO "SCON occupies " - .ECHO SIZ_SCON - .ECHO " bytes.\n" -#ENDIF -; -#IF (CHENABLE) -ORG_CH .EQU $ - #INCLUDE "ch.asm" -SIZ_CH .EQU $ - ORG_CH - .ECHO "CH occupies " - .ECHO SIZ_CH - .ECHO " bytes.\n" -#ENDIF -; -#IF (ESPENABLE) -ORG_ESP .EQU $ - #INCLUDE "esp.asm" -SIZ_ESP .EQU $ - ORG_ESP - .ECHO "ESP occupies " - .ECHO SIZ_ESP - .ECHO " bytes.\n" -#ENDIF -; -#IF (MDENABLE) -ORG_MD .EQU $ - #INCLUDE "md.asm" -SIZ_MD .EQU $ - ORG_MD - .ECHO "MD occupies " - .ECHO SIZ_MD - .ECHO " bytes.\n" -#ENDIF -; -#IF (FDENABLE) -ORG_FD .EQU $ - #INCLUDE "fd.asm" -SIZ_FD .EQU $ - ORG_FD - .ECHO "FD occupies " - .ECHO SIZ_FD - .ECHO " bytes.\n" -#ENDIF -; -#IF (RFENABLE) -ORG_RF .EQU $ - #INCLUDE "rf.asm" -SIZ_RF .EQU $ - ORG_RF - .ECHO "RF occupies " - .ECHO SIZ_RF - .ECHO " bytes.\n" -#ENDIF -; -#IF (IDEENABLE) -ORG_IDE .EQU $ - #INCLUDE "ide.asm" -SIZ_IDE .EQU $ - ORG_IDE - .ECHO "IDE occupies " - .ECHO SIZ_IDE - .ECHO " bytes.\n" -#ENDIF -; -#IF (PPIDEENABLE) -ORG_PPIDE .EQU $ - #INCLUDE "ppide.asm" -SIZ_PPIDE .EQU $ - ORG_PPIDE - .ECHO "PPIDE occupies " - .ECHO SIZ_PPIDE - .ECHO " bytes.\n" -#ENDIF -; -#IF (SDENABLE) -ORG_SD .EQU $ - #INCLUDE "sd.asm" -SIZ_SD .EQU $ - ORG_SD - .ECHO "SD occupies " - .ECHO SIZ_SD - .ECHO " bytes.\n" -#ENDIF -; -#IF (HDSKENABLE) -ORG_HDSK .EQU $ - #INCLUDE "hdsk.asm" -SIZ_HDSK .EQU $ - ORG_HDSK - .ECHO "HDSK occupies " - .ECHO SIZ_HDSK - .ECHO " bytes.\n" -#ENDIF +;================================================================================================== +; DYNAMIC RAM SIZE DETECTION ROUTINE +;================================================================================================== ; -#IF (PPAENABLE) -ORG_PPA .EQU $ - #INCLUDE "ppa.asm" -SIZ_PPA .EQU $ - ORG_PPA - .ECHO "PPA occupies " - .ECHO SIZ_PPA - .ECHO " bytes.\n" -#ENDIF +; THIS CODE IS COPIED TO $F000 TO PERFORM RAM SIZE DETECTION. ; -#IF (IMMENABLE) -ORG_IMM .EQU $ - #INCLUDE "imm.asm" -SIZ_IMM .EQU $ - ORG_IMM - .ECHO "IMM occupies " - .ECHO SIZ_IMM - .ECHO " bytes.\n" -#ENDIF +#IFDEF SIZERAM ; -#IF (SYQENABLE) -ORG_SYQ .EQU $ - #INCLUDE "syq.asm" -SIZ_SYQ .EQU $ - ORG_SYQ - .ECHO "SYQ occupies " - .ECHO SIZ_SYQ - .ECHO " bytes.\n" -#ENDIF +RS_IMAGE: + .ORG $F000 +RS_START: + LD A,(HB_CURBNK) ; GET CURRENT BANK + PUSH AF ; SAVE IT + + LD C,0 ; RUNNING BANK COUNT + LD HL,$7FFF ; BYTE TEST ADDRESS + LD IX,RS_ARY ; ORIG BYTE STORAGE ARRAY PTR +RS_LOOP1: + LD A,C + ADD A,$80 ; OFFSET BY START OF RAM BANKS + CALL RS_BNKSEL ; SELECT THE BANK + + LD A,(HL) ; GET ORIGINAL VALUE + LD (IX),A ; SAVE IT TO RESTORE LATER + INC IX ; BUMP IX + + LD A,$AA ; TEST LOC WITH $AA + LD (HL),A ; AVOID PROBLEMS WITH + LD (HL),A ; ... DS1210 + LD (HL),A + LD A,(HL) + CP $AA + JR NZ,RS_DONE + + LD A,$55 ; TEST LOC WITH $55 + LD (HL),A + LD A,(HL) + CP $55 + JR NZ,RS_DONE + + ; STORE A UNIQUE VALUE + LD A,C + LD (HL),A + OR A ; ZERO? + JR Z,RS_NEXT ; SKIP STORED VALUE CHECK + + ; VERIFY ALL STORED VALUES + LD B,C ; INIT LOOP COUNTER + LD E,0 ; INIT BANK ID +RS_LOOP3: + LD A,E + ADD A,$80 + CALL RS_BNKSEL + LD A,(HL) + CP E ; VERIFY + JR NZ,RS_DONE ; ABORT IF MISCOMPARE + INC E ; NEXT BANK + DJNZ RS_LOOP3 ; -; TERM IS ALWAYS INCLUDED -ORG_TERM .EQU $ - #INCLUDE "term.asm" -SIZ_TERM .EQU $ - ORG_TERM - .ECHO "TERM occupies " - .ECHO SIZ_TERM - .ECHO " bytes.\n" +RS_NEXT: + INC C ; ADD 1 TO RAM BANK COUNT + JR RS_LOOP1 ; AND LOOP TILL DONE +; +RS_DONE: + LD E,C ; FINAL BANK COUNT TO E + LD A,C + OR A + JR Z,RS_LOOPZ + ; RESTORE SAVED VALUES + LD IX,RS_ARY + LD B,C ; LOOP COUNT + LD C,$80 ; BANK ID +RS_LOOP2: + LD A,C + CALL RS_BNKSEL + INC C + LD A,(IX) ; GET VALUE + LD (HL),A ; RESTORE IT + INC IX + DJNZ RS_LOOP2 ; ALL BANKS +RS_LOOPZ: ; -;#IF (SPKENABLE & DSRTCENABLE) -#IF (SPKENABLE) -ORG_SPK .EQU $ - #INCLUDE "spk.asm" -SIZ_SPK .EQU $ - ORG_SPK - .ECHO "SPK occupies " - .ECHO SIZ_SPK - .ECHO " bytes.\n" -#ENDIF -#IF (KIOENABLE) -ORG_KIO .EQU $ - #INCLUDE "kio.asm" -SIZ_KIO .EQU $ - ORG_KIO - .ECHO "KIO occupies " - .ECHO SIZ_KIO - .ECHO " bytes.\n" -#ENDIF -#IF (CTCENABLE) -ORG_CTC .EQU $ - #INCLUDE "ctc.asm" -SIZ_CTC .EQU $ - ORG_CTC - .ECHO "CTC occupies " - .ECHO SIZ_CTC - .ECHO " bytes.\n" -#ENDIF -#IF (SN76489ENABLE) -ORG_SN76489 .EQU $ - #INCLUDE "sn76489.asm" -SIZ_SN76489 .EQU $ - ORG_SN76489 - .ECHO "SN76489 occupies " - .ECHO SIZ_SN76489 - .ECHO " bytes.\n" -#ENDIF -#IF (AY38910ENABLE) -ORG_AY38910 .EQU $ - #INCLUDE "ay38910.asm" -SIZ_AY38910 .EQU $ - ORG_AY38910 - .ECHO "AY38910 occupies " - .ECHO SIZ_AY38910 - .ECHO " bytes.\n" -#ENDIF -#IF (YM2612ENABLE) -ORG_YM2612 .EQU $ - #INCLUDE "ym2612.asm" -SIZ_YM2612 .EQU $ - ORG_YM2612 - .ECHO "YM2612 occupies " - .ECHO SIZ_YM2612 - .ECHO " bytes.\n" -#ENDIF + ; RETURN TO ORIGINAL BANK + POP AF + CALL RS_BNKSEL + LD A,E ; RETURN BANK COUNT + RET ; - .ECHO "RTCDEF=" - .ECHO RTCDEF - .ECHO "\n" +; SPECIAL BANK SELECT FOR MEMORY SIZING ; -#DEFINE USEDELAY -#INCLUDE "util.asm" -#INCLUDE "time.asm" -#INCLUDE "bcd.asm" -#INCLUDE "decode.asm" -#INCLUDE "encode.asm" +RS_BNKSEL: + #IF (MEMMGR == MM_Z280) + ; IF Z280 MEMMGR, THEN WE ARE IN SYSTEM MODE, SO WE NEED TO + ; BANK SELECT THE SYSTEM PDRS INSTEAD OF THE NORMAL USER PDRS. + PUSH BC ; SAVE BC + PUSH HL ; SAVE HL + LD B,$10 ; FIRST SYSTEM PDR + CALL Z280_BNKSEL ; DO IT + POP HL ; RESTORE HL + POP BC ; RESTORE BC + RET ; DONE + #ELSE + ; NORMAL BANK SELECT + JP HBX_BNKSEL + #ENDIF ; -#IF (WBWDEBUG == USEXIO) -#INCLUDE "xio.asm" -#ENDIF -#IF (WBWDEBUG == USEMIO) -#INCLUDE "mio.asm" -#ENDIF +RS_ARY .EQU $ ; -; INCLUDE LZSA2 decompression engine if required. +RS_LEN .EQU $ - RS_START + .ORG RS_IMAGE + RS_LEN ; -#IF ((CVDUENABLE | GDCENABLE | TMSENABLE | VGAENABLE | VRCENABLE) & USELZSA2) -#INCLUDE "unlzsa2s.asm" #ENDIF ; ;================================================================================================== @@ -7053,10 +7220,14 @@ HB_CPUSPD2: OR $FF ; SIGNAL ERROR RET ; AND DONE ; +HB_UTIL_END .EQU $ +; ;================================================================================================== ; DISPLAY SUMMARY OF ATTACHED UNITS/DEVICES ;================================================================================================== ; +HB_PRTSUM_BEG .EQU $ +; PRTSUM: CALL NEWLINE2 ; SKIP A LINE LD DE,PS_STRHDR ; POINT TO HEADER @@ -7618,288 +7789,608 @@ PS_VTCRT .TEXT "CRT$" ; PS_SDSND .TEXT "SND$" ; -; SOUND TYPE STRINGS +; SOUND TYPE STRINGS +; +PS_SDSN76489 .TEXT "SN76489$" +PS_SDAY38910 .TEXT "AY-3-8910$" +PS_SDBITMODE .TEXT "I/O PORT$" +PS_SDYM2612 .TEXT "YM2612$" +; +; 0 1 2 3 4 5 6 7 +; 01234567890123456789012345678901234567890123456789012345678901234567890123456789 +PS_STRHDR .TEXT "Unit Device Type Capacity/Mode\r\n" + .TEXT "---------- ---------- ---------------- --------------------\r\n$" +; +HB_PRTSUM_END .EQU $ +; +;================================================================================================== +; DEVICE DRIVERS +;================================================================================================== +; +HB_DRIVERS_BEG .EQU $ +; +#IF (DSKYENABLE) + #IF (ICMENABLE) +ORG_ICM .EQU $ + #INCLUDE "icm.asm" +SIZ_ICM .EQU $ - ORG_ICM + MEMECHO "ICM occupies " + MEMECHO SIZ_ICM + MEMECHO " bytes.\n" + #ENDIF +; + #IF (PKDENABLE) +ORG_PKD .EQU $ + #INCLUDE "pkd.asm" +SIZ_PKD .EQU $ - ORG_PKD + MEMECHO "PKD occupies " + MEMECHO SIZ_PKD + MEMECHO " bytes.\n" + #ENDIF +; + #IF (H8PENABLE) +ORG_H8P .EQU $ + #INCLUDE "h8p.asm" +SIZ_H8P .EQU $ - ORG_H8P + MEMECHO "H8P occupies " + MEMECHO SIZ_H8P + MEMECHO " bytes.\n" + #ENDIF +#ENDIF +; +#IF (PLATFORM == PLT_NABU) +ORG_NABU .EQU $ + #INCLUDE "nabu.asm" +SIZ_NABU .EQU $ - ORG_NABU + MEMECHO "NABU occupies " + MEMECHO SIZ_NABU + MEMECHO " bytes.\n" +#ENDIF +; +#IF (DSRTCENABLE) +ORG_DSRTC .EQU $ + #INCLUDE "dsrtc.asm" +SIZ_DSRTC .EQU $ - ORG_DSRTC + MEMECHO "DSRTC occupies " + MEMECHO SIZ_DSRTC + MEMECHO " bytes.\n" +#ENDIF +; +#IF (DS1501RTCENABLE) +ORG_DS1501RTC .EQU $ + #INCLUDE "ds1501rtc.asm" +SIZ_DS1501RTC .EQU $ - ORG_DS1501RTC + MEMECHO "DS1501RTC occupies " + MEMECHO SIZ_DS1501RTC + MEMECHO " bytes.\n" +#ENDIF +; +#IF (BQRTCENABLE) +ORG_BQRTC .EQU $ + #INCLUDE "bqrtc.asm" +SIZ_BQRTC .EQU $ - ORG_BQRTC + MEMECHO "BQRTC occupies " + MEMECHO SIZ_BQRTC + MEMECHO " bytes.\n" +#ENDIF +; +#IF (SIMRTCENABLE) +ORG_SIMRTC .EQU $ + #INCLUDE "simrtc.asm" +SIZ_SIMRTC .EQU $ - ORG_SIMRTC + MEMECHO "SIMRTC occupies " + MEMECHO SIZ_SIMRTC + MEMECHO " bytes.\n" +#ENDIF +; +#IF (PCFENABLE) +ORG_PCF .EQU $ + #INCLUDE "pcf.asm" +SIZ_PCF .EQU $ - ORG_PCF + MEMECHO "PCF occupies " + MEMECHO SIZ_PCF + MEMECHO " bytes.\n" +#ENDIF +; +#IF (DS7RTCENABLE) +ORG_DS7RTC .EQU $ + #INCLUDE "ds7rtc.asm" +SIZ_DS7RTC .EQU $ - ORG_DS7RTC + MEMECHO "DS7RTC occupies " + MEMECHO SIZ_DS7RTC + MEMECHO " bytes.\n" +#ENDIF +; +#IF (INTRTCENABLE) +ORG_INTRTC .EQU $ + #INCLUDE "intrtc.asm" +SIZ_INTRTC .EQU $ - ORG_INTRTC + MEMECHO "INTRTC occupies " + MEMECHO SIZ_INTRTC + MEMECHO " bytes.\n" +#ENDIF +; +#IF (RP5RTCENABLE) +ORG_RP5RTC .EQU $ + #INCLUDE "rp5rtc.asm" +SIZ_RP5RTC .EQU $ - ORG_RP5RTC + MEMECHO "RP5RTC occupies " + MEMECHO SIZ_RP5RTC + MEMECHO " bytes.\n" +#ENDIF +#IF (ASCIENABLE) +ORG_ASCI .EQU $ + #INCLUDE "asci.asm" +SIZ_ASCI .EQU $ - ORG_ASCI + MEMECHO "ASCI occupies " + MEMECHO SIZ_ASCI + MEMECHO " bytes.\n" +#ENDIF +; +#IF (Z2UENABLE) +ORG_Z2U .EQU $ + #INCLUDE "z2u.asm" +SIZ_Z2U .EQU $ - ORG_Z2U + MEMECHO "Z2U occupies " + MEMECHO SIZ_Z2U + MEMECHO " bytes.\n" +#ENDIF +; +#IF (UARTENABLE) +ORG_UART .EQU $ + #INCLUDE "uart.asm" +SIZ_UART .EQU $ - ORG_UART + MEMECHO "UART occupies " + MEMECHO SIZ_UART + MEMECHO " bytes.\n" +#ENDIF +; +#IF (DUARTENABLE) +ORG_DUART .EQU $ + #INCLUDE "duart.asm" +SIZ_DUART .EQU $ - ORG_DUART + MEMECHO "DUART occupies " + MEMECHO SIZ_DUART + MEMECHO " bytes.\n" +#ENDIF ; -PS_SDSN76489 .TEXT "SN76489$" -PS_SDAY38910 .TEXT "AY-3-8910$" -PS_SDBITMODE .TEXT "I/O PORT$" -PS_SDYM2612 .TEXT "YM2612$" +#IF (SIOENABLE) +ORG_SIO .EQU $ + #INCLUDE "sio.asm" +SIZ_SIO .EQU $ - ORG_SIO + MEMECHO "SIO occupies " + MEMECHO SIZ_SIO + MEMECHO " bytes.\n" +#ENDIF ; -; 0 1 2 3 4 5 6 7 -; 01234567890123456789012345678901234567890123456789012345678901234567890123456789 -PS_STRHDR .TEXT "Unit Device Type Capacity/Mode\r\n" - .TEXT "---------- ---------- ---------------- --------------------\r\n$" +#IF (ACIAENABLE) +ORG_ACIA .EQU $ + #INCLUDE "acia.asm" +SIZ_ACIA .EQU $ - ORG_ACIA + MEMECHO "ACIA occupies " + MEMECHO SIZ_ACIA + MEMECHO " bytes.\n" +#ENDIF ; -;================================================================================================== -; CONSOLE CHARACTER I/O HELPER ROUTINES (REGISTERS PRESERVED) -;================================================================================================== +#IF (PIOENABLE) +ORG_PIO .EQU $ + #INCLUDE "pio.asm" +SIZ_PIO .EQU $ - ORG_PIO + MEMECHO "PIO occupies " + MEMECHO SIZ_PIO + MEMECHO " bytes.\n" +#ENDIF ; -; OUTPUT CHARACTER FROM A +#IF (LPTENABLE) +ORG_LPT .EQU $ + #INCLUDE "lpt.asm" +SIZ_LPT .EQU $ - ORG_LPT + MEMECHO "LPT occupies " + MEMECHO SIZ_LPT + MEMECHO " bytes.\n" +#ENDIF ; -COUT: - ; SAVE ALL INCOMING REGISTERS - PUSH AF - PUSH BC - PUSH DE - PUSH HL +#IF (PIO_4P | PIO_ZP | PIO_SBC) +ORG_PIO .EQU $ + #INCLUDE "pio.asm" +SIZ_PIO .EQU $ - ORG_PIO + MEMECHO "PIO occupies " + MEMECHO SIZ_PIO + MEMECHO " bytes.\n" +#ENDIF ; - ; GET CURRENT CONSOLE UNIT - LD E,A ; TEMPORARILY STASH OUTPUT CHAR IN E - LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE - CP $FF ; TEST FOR $FF (HBIOS NOT READY) - JR Z,COUT1 ; IF NOT READY, TRY DEBUG OUTPUT +#IF (UFENABLE) +ORG_UF .EQU $ + #INCLUDE "uf.asm" +SIZ_UF .EQU $ - ORG_UF + MEMECHO "UF occupies " + MEMECHO SIZ_UF + MEMECHO " bytes.\n" +#ENDIF ; - ; USE HBIOS - LD C,A ; CONSOLE UNIT TO C - LD B,BF_CIOOUT ; HBIOS FUNC: OUTPUT CHAR - CALL CIO_DISPATCH ; CALL CIO DISPATCHER DIRECTLY - JR COUT2 ; CONTINUE +#IF (VGAENABLE) +ORG_VGA .EQU $ + #INCLUDE "vga.asm" +SIZ_VGA .EQU $ - ORG_VGA + MEMECHO "VGA occupies " + MEMECHO SIZ_VGA + MEMECHO " bytes.\n" +#ENDIF ; -COUT1: +#IF (CVDUENABLE) +ORG_CVDU .EQU $ + #INCLUDE "cvdu.asm" +SIZ_CVDU .EQU $ - ORG_CVDU + MEMECHO "CVDU occupies " + MEMECHO SIZ_CVDU + MEMECHO " bytes.\n" +#ENDIF ; -#IF (WBWDEBUG == USEXIO) - LD A,E ; GET OUTPUT CHAR BACK TO ACCUM - CALL XIO_OUTC ; OUTPUT VIA XIO +#IF (VDUENABLE) +ORG_VDU .EQU $ + #INCLUDE "vdu.asm" +SIZ_VDU .EQU $ - ORG_VDU + MEMECHO "VDU occupies " + MEMECHO SIZ_VDU + MEMECHO " bytes.\n" #ENDIF ; -#IF (WBWDEBUG == USEMIO) - LD A,E - CALL MIO_OUTC ; OUTPUT VIA MIO +#IF (TMSENABLE) +ORG_TMS .EQU $ + #INCLUDE "tms.asm" +SIZ_TMS .EQU $ - ORG_TMS + MEMECHO "TMS occupies " + MEMECHO SIZ_TMS + MEMECHO " bytes.\n" #ENDIF ; -COUT2: - ; RESTORE ALL REGISTERS - POP HL - POP DE - POP BC - POP AF - RET +#IF (EFENABLE) +ORG_EF .EQU $ + #INCLUDE "ef.asm" +SIZ_EF .EQU $ - ORG_EF + MEMECHO "EF occupies " + MEMECHO SIZ_EF + MEMECHO " bytes.\n" +#ENDIF ; -; INPUT CHARACTER TO A +#IF (GDCENABLE) +ORG_GDC .EQU $ + #INCLUDE "gdc.asm" +SIZ_GDC .EQU $ - ORG_GDC + MEMECHO "GDC occupies " + MEMECHO SIZ_GDC + MEMECHO " bytes.\n" +#ENDIF ; -CIN: - ; SAVE INCOMING REGISTERS (AF IS OUTPUT) - PUSH BC - PUSH DE - PUSH HL +#IF (VRCENABLE) +ORG_VRC .EQU $ + #INCLUDE "vrc.asm" +SIZ_VRC .EQU $ - ORG_VRC + MEMECHO "VRC occupies " + MEMECHO SIZ_VRC + MEMECHO " bytes.\n" +#ENDIF ; - LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE - CP $FF ; TEST FOR $FF (HBIOS NOT READY) - JR Z,CIN1 ; IF NOT READY, TRY DEBUG INPUT +#IF (DMAENABLE) +ORG_DMA .EQU $ +#INCLUDE "dma.asm" +SIZ_DMA .EQU $ - ORG_DMA + MEMECHO "DMA occupies " + MEMECHO SIZ_DMA + MEMECHO " bytes.\n" +#ENDIF ; - ; USE HBIOS - LD C,A ; CONSOLE UNIT TO C - LD B,BF_CIOIN ; HBIOS FUNC: INPUT CHAR - CALL CIO_DISPATCH ; CALL CIO DISPATCHER DIRECTLY - LD A,E ; RESULTANT CHAR TO A - JR CIN2 ; CONTINUE +#IF (KBDENABLE) +ORG_KBD .EQU $ + #INCLUDE "kbd.asm" +SIZ_KBD .EQU $ - ORG_KBD + MEMECHO "KBD occupies " + MEMECHO SIZ_KBD + MEMECHO " bytes.\n" +#ENDIF ; -CIN1: +#IF (PPKENABLE) +ORG_PPK .EQU $ + #INCLUDE "ppk.asm" +SIZ_PPK .EQU $ - ORG_PPK + MEMECHO "PPK occupies " + MEMECHO SIZ_PPK + MEMECHO " bytes.\n" +#ENDIF ; -#IF (WBWDEBUG == USEXIO) - CALL XIO_INC ; GET CHAR +#IF (MKYENABLE) +ORG_MKY .EQU $ + #INCLUDE "mky.asm" +SIZ_MKY .EQU $ - ORG_MKY + MEMECHO "MKY occupies " + MEMECHO SIZ_MKY + MEMECHO " bytes.\n" #ENDIF ; -#IF (WBWDEBUG == USEMIO) - CALL MIO_INC ; GET CHAR +#IF (NABUKBENABLE) +ORG_NABUKB .EQU $ + #INCLUDE "nabukb.asm" +SIZ_NABUKB .EQU $ - ORG_NABUKB + MEMECHO "NABUKB occupies " + MEMECHO SIZ_NABUKB + MEMECHO " bytes.\n" #ENDIF ; -CIN2: +#IF (PRPENABLE) +ORG_PRP .EQU $ + #INCLUDE "prp.asm" +SIZ_PRP .EQU $ - ORG_PRP + MEMECHO "PRP occupies " + MEMECHO SIZ_PRP + MEMECHO " bytes.\n" +#ENDIF ; - ; RESTORE REGISTERS (AF IS OUTPUT) - POP HL - POP DE - POP BC - RET +#IF (PPPENABLE) +ORG_PPP .EQU $ + #INCLUDE "ppp.asm" +SIZ_PPP .EQU $ - ORG_PPP + MEMECHO "PPP occupies " + MEMECHO SIZ_PPP + MEMECHO " bytes.\n" +#ENDIF ; -; RETURN INPUT STATUS IN A (0 = NO CHAR, !=0 CHAR WAITING) +#IF (SCONENABLE) +ORG_SCON .EQU $ + #INCLUDE "scon.asm" +SIZ_SCON .EQU $ - ORG_SCON + MEMECHO "SCON occupies " + MEMECHO SIZ_SCON + MEMECHO " bytes.\n" +#ENDIF ; -CST: - ; SAVE INCOMING REGISTERS (AF IS OUTPUT) - PUSH BC - PUSH DE - PUSH HL +#IF (CHENABLE) +ORG_CH .EQU $ + #INCLUDE "ch.asm" +SIZ_CH .EQU $ - ORG_CH + MEMECHO "CH occupies " + MEMECHO SIZ_CH + MEMECHO " bytes.\n" +#ENDIF ; - LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE - CP $FF ; TEST FOR $FF (HBIOS NOT READY) - JR Z,CST1 ; IIF NOT READY, TRY DEBUG DEBUG STATUS +#IF (ESPENABLE) +ORG_ESP .EQU $ + #INCLUDE "esp.asm" +SIZ_ESP .EQU $ - ORG_ESP + MEMECHO "ESP occupies " + MEMECHO SIZ_ESP + MEMECHO " bytes.\n" +#ENDIF ; - ; USE HBIOS - LD C,A ; CONSOLE UNIT TO C - LD B,BF_CIOIST ; HBIOS FUNC: INPUT STATUS - CALL CIO_DISPATCH ; CALL CIO DISPATCHER DIRECTLY - JR CST2 ; CONTINUE +#IF (MDENABLE) +ORG_MD .EQU $ + #INCLUDE "md.asm" +SIZ_MD .EQU $ - ORG_MD + MEMECHO "MD occupies " + MEMECHO SIZ_MD + MEMECHO " bytes.\n" +#ENDIF ; -CST1: +#IF (FDENABLE) +ORG_FD .EQU $ + #INCLUDE "fd.asm" +SIZ_FD .EQU $ - ORG_FD + MEMECHO "FD occupies " + MEMECHO SIZ_FD + MEMECHO " bytes.\n" +#ENDIF ; -#IF (WBWDEBUG == USEXIO) - CALL XIO_IST ; GET STATUS +#IF (RFENABLE) +ORG_RF .EQU $ + #INCLUDE "rf.asm" +SIZ_RF .EQU $ - ORG_RF + MEMECHO "RF occupies " + MEMECHO SIZ_RF + MEMECHO " bytes.\n" #ENDIF ; -#IF (WBWDEBUG == USEMIO) - CALL MIO_IST ; GET STATUS +#IF (IDEENABLE) +ORG_IDE .EQU $ + #INCLUDE "ide.asm" +SIZ_IDE .EQU $ - ORG_IDE + MEMECHO "IDE occupies " + MEMECHO SIZ_IDE + MEMECHO " bytes.\n" #ENDIF ; -CST2: - ; RESTORE REGISTERS (AF IS OUTPUT) - POP HL - POP DE - POP BC - RET +#IF (PPIDEENABLE) +ORG_PPIDE .EQU $ + #INCLUDE "ppide.asm" +SIZ_PPIDE .EQU $ - ORG_PPIDE + MEMECHO "PPIDE occupies " + MEMECHO SIZ_PPIDE + MEMECHO " bytes.\n" +#ENDIF ; -;================================================================================================== -; INTERNAL UTILITY FUNCTIONS -;================================================================================================== +#IF (SDENABLE) +ORG_SD .EQU $ + #INCLUDE "sd.asm" +SIZ_SD .EQU $ - ORG_SD + MEMECHO "SD occupies " + MEMECHO SIZ_SD + MEMECHO " bytes.\n" +#ENDIF ; -; SET HL TO IY+A, A IS TRASHED +#IF (HDSKENABLE) +ORG_HDSK .EQU $ + #INCLUDE "hdsk.asm" +SIZ_HDSK .EQU $ - ORG_HDSK + MEMECHO "HDSK occupies " + MEMECHO SIZ_HDSK + MEMECHO " bytes.\n" +#ENDIF ; -LDHLIYA: - PUSH IY ; COPY INSTANCE DATA PTR - POP HL ; ... TO HL - ;JP ADDHLA ; APPLY OFFSET TO HL AND RETURN - ADD A,L ; ADD OFFSET TO LSB - LD L,A ; ... PUT BACK IN L - RET NC ; DONE IF CF NOT SET - INC H ; IF CF SET, BUMP MSB - RET ; ... AND RETURN +#IF (PPAENABLE) +ORG_PPA .EQU $ + #INCLUDE "ppa.asm" +SIZ_PPA .EQU $ - ORG_PPA + MEMECHO "PPA occupies " + MEMECHO SIZ_PPA + MEMECHO " bytes.\n" +#ENDIF ; -; CONVERT AN HBIOS STANDARD HARD DISK CHS ADDRESS TO -; AN LBA ADDRESS. A STANDARD HBIOS HARD DISK IS ASSUMED -; TO HAVE 16 SECTORS PER TRACK AND 16 HEADS PER CYLINDER. +#IF (IMMENABLE) +ORG_IMM .EQU $ + #INCLUDE "imm.asm" +SIZ_IMM .EQU $ - ORG_IMM + MEMECHO "IMM occupies " + MEMECHO SIZ_IMM + MEMECHO " bytes.\n" +#ENDIF ; -; INPUT: HL=TRACK, D=HEAD, E=SECTOR -; OUTPUT: DE:HL=32 BIT LBA ADDRESS (D:7 IS NOT SET IN THE RESULT) +#IF (SYQENABLE) +ORG_SYQ .EQU $ + #INCLUDE "syq.asm" +SIZ_SYQ .EQU $ - ORG_SYQ + MEMECHO "SYQ occupies " + MEMECHO SIZ_SYQ + MEMECHO " bytes.\n" +#ENDIF ; -HB_CHS2LBA: +; TERM IS ALWAYS INCLUDED +ORG_TERM .EQU $ + #INCLUDE "term.asm" +SIZ_TERM .EQU $ - ORG_TERM + MEMECHO "TERM occupies ") + MEMECHO SIZ_TERM + MEMECHO " bytes.\n" ; - LD A,D ; HEAD TO A - RLCA ; LEFT SHIFT TO HIGH NIBBLE - RLCA ; ... DEPENDS ON HIGH - RLCA ; ... NIBBLE BEING 0 SINCE - RLCA ; ... IT ROTATES INTO LOW NIBBLE - OR E ; COMBINE WITH SECTOR (HIGH NIBBLE MUST BE ZERO) - LD D,0 - LD E,H - LD H,L - LD L,A - XOR A - RET +;#IF (SPKENABLE & DSRTCENABLE +#IF (SPKENABLE) +ORG_SPK .EQU $ + #INCLUDE "spk.asm" +SIZ_SPK .EQU $ - ORG_SPK + MEMECHO "SPK occupies " + MEMECHO SIZ_SPK + MEMECHO " bytes.\n" +#ENDIF +#IF (KIOENABLE) +ORG_KIO .EQU $ + #INCLUDE "kio.asm" +SIZ_KIO .EQU $ - ORG_KIO + MEMECHO "KIO occupies " + MEMECHO SIZ_KIO + MEMECHO " bytes.\n" +#ENDIF +#IF (CTCENABLE) +ORG_CTC .EQU $ + #INCLUDE "ctc.asm" +SIZ_CTC .EQU $ - ORG_CTC + MEMECHO "CTC occupies " + MEMECHO SIZ_CTC + MEMECHO " bytes.\n" +#ENDIF +#IF (SN76489ENABLE) +ORG_SN76489 .EQU $ + #INCLUDE "sn76489.asm" +SIZ_SN76489 .EQU $ - ORG_SN76489 + MEMECHO "SN76489 occupies " + MEMECHO SIZ_SN76489 + MEMECHO " bytes.\n" +#ENDIF +#IF (AY38910ENABLE) +ORG_AY38910 .EQU $ + #INCLUDE "ay38910.asm" +SIZ_AY38910 .EQU $ - ORG_AY38910 + MEMECHO "AY38910 occupies " + MEMECHO SIZ_AY38910 + MEMECHO " bytes.\n" +#ENDIF +#IF (YM2612ENABLE) +ORG_YM2612 .EQU $ + #INCLUDE "ym2612.asm" +SIZ_YM2612 .EQU $ - ORG_YM2612 + MEMECHO "YM2612 occupies " + MEMECHO SIZ_YM2612 + MEMECHO " bytes.\n" +#ENDIF ; -; SYSTEM CHECK: DUMP MACHINE STATE AND CONTINUE? + MEMECHO "RTCDEF=" + MEMECHO RTCDEF + MEMECHO "\n" ; -SYSCHKA: - ; CHECK DIAG LEVEL TO SEE IF WE SHOULD DISPLAY - PUSH AF ; PRESERVE INCOMING AF VALUE - LD A,(CB_DIAGLVL) ; GET DIAGNOSTIC LEVEL - CP DL_ERROR ; >= ERROR LEVEL - JR C,SYSCHK1 ; IF NOT, GO HOME - POP AF ; RESTORE INCOMING AF VALUE +HB_DRIVERS_END .EQU $ ; - ; DISPLAY SYSCHK MESSAGE - PUSH DE ; PRESERVE DE VALUE - LD DE,STR_SYSCHK ; POINT TO PREFIX STRING - CALL WRITESTR ; PRINT IT - POP DE ; RESTORE DE VALUE - CALL XREGDMP ; DUMP REGISTERS - - ; DISPLAY ERROR CODE. IT IS AT RETURN ADDRESS+1 .. LD A,XX - EX (SP),HL ; GET RETURN ADDRESS - INC HL ; POINT TO THE ERROR CODE - PUSH AF - LD A,(HL) ; DISPLAY - CALL PRTHEXBYTE - POP AF - DEC HL ; RESTORE RETURN ADDRESS - EX (SP),HL +;================================================================================================== +; FONTS +;================================================================================================== ; - JR CONTINUE ; CHECK W/ USER +HB_FONTS_BEG .EQU $ ; -SYSCHK1: - ; RETURN IF MESSAGING BYPASSED BY DIAG LEVEL - POP AF - RET +ORG_FONTS .EQU $ ; -; PANIC: DUMP MACHINE STATE AND HALT + MEMECHO "FONTS" ; -PANIC: - PUSH DE - LD DE,STR_PANIC - CALL WRITESTR - POP DE - CALL XREGDMP ; DUMP REGISTERS - JR SYSHALT ; FULL STOP +#IFDEF USEFONT8X8 +FONT8X8: ; +; FOR NOW, WE NEVER COMPRESS THE 8X8 FONT. SEE TMS DRIVER. ; + #IF USELZSA2 & FALSE + #INCLUDE "font8x8c.asm" + #ELSE + #INCLUDE "font8x8u.asm" + #ENDIF + MEMECHO " 8X8" +#ENDIF ; -CONTINUE: - PUSH AF -CONTINUE1: - PUSH DE - LD DE,STR_CONTINUE - CALL WRITESTR - POP DE - CALL CIN - RES 5,A ; FORCE UPPERCASE (IMPERFECTLY) - CALL COUT ; ECHO - CP 'Y' - JR Z,CONTINUE3 - CP 'N' - JR Z,SYSHALT - JR CONTINUE1 -CONTINUE3: - CALL NEWLINE - POP AF - RET +#IFDEF USEFONT8X11 +FONT8X11: + #IF USELZSA2 + #INCLUDE "font8x11c.asm" + #ELSE + #INCLUDE "font8x11u.asm" + #ENDIF + MEMECHO " 8X11" +#ENDIF ; +#IFDEF USEFONT8X16 +FONT8X16: + #IF USELZSA2 + #INCLUDE "font8x16c.asm" + #ELSE + #INCLUDE "font8x16u.asm" + #ENDIF + MEMECHO " 8X16" +#ENDIF ; +#IFDEF USEFONTCGA +FONTCGA: + #IF USELZSA2 + #INCLUDE "fontcgac.asm" + #ELSE + #INCLUDE "fontcgau.asm" + #ENDIF + MEMECHO " CGA" +#ENDIF ; -SYSHALT: - LD DE,STR_HALT - CALL WRITESTR - DI - HALT +#IFDEF USEFONTVGARC +FONTVGARC: + #IF USELZSA2 + #INCLUDE "fontvgarcc.asm" + #ELSE + #INCLUDE "fontvgarcu.asm" + #ENDIF + MEMECHO " VGARC" +#ENDIF ; -; PRINT VALUE OF HL AS THOUSANDTHS, IE. 0.000 +SIZ_FONTS .EQU $ - ORG_FONTS + MEMECHO " occupy " + MEMECHO SIZ_FONTS + MEMECHO " bytes.\n" ; -PRTD3M: - PUSH BC - PUSH DE - PUSH HL - LD E,'0' - LD BC,-10000 - CALL PRTD3M1 - LD E,0 - LD BC,-1000 - CALL PRTD3M1 - CALL PC_PERIOD - LD BC,-100 - CALL PRTD3M1 - LD C,-10 - CALL PRTD3M1 - LD C,-1 - CALL PRTD3M1 - POP HL - POP DE - POP BC - RET -PRTD3M1: - LD A,'0' - 1 -PRTD3M2: - INC A - ADD HL,BC - JR C,PRTD3M2 - SBC HL,BC - CP E - JR Z,PRTD3M3 - LD E,0 - CALL COUT -PRTD3M3: - RET +HB_FONTS_END .EQU $ ; ;================================================================================================== ; HBIOS GLOBAL DATA ;================================================================================================== ; +HB_DATA_BEG .EQU $ +; IDLECOUNT .DB 0 ; HEAPCURB .DW 0 ; MARK HEAP ADDRESS AFTER INITIALIZATION @@ -7919,9 +8410,12 @@ RTCDEFVAL .DB RTCDEF ; STORAGE FOR RTC DEFAULT VALUE HB_BOOT_REC .DB 0 ; BOOT MODE (0=NORMAL, 1=RECOVERY MODE) #ENDIF ; -STR_BANNER .DB "RomWBW HBIOS v", BIOSVER, ", ", TIMESTAMP, "$" +STR_BANNER .DB "\r\n\r\nRomWBW HBIOS v", BIOSVER, ", ", TIMESTAMP +#IFDEF APPBOOT + .DB " (App Boot)" +#ENDIF + .DB "$" STR_PLATFORM .DB PLATFORM_NAME, "$" -;STR_SWITCH .DB "*** Activating CRT Console ***$" STR_CONSOLE .DB "\r\n\r\n Console on Unit #$" STR_BADINT .DB "\r\n*** BAD INT ***\r\n$" STR_LOWBAT .DB "\r\n\r\n+++ LOW BATTERY +++$" @@ -7934,8 +8428,6 @@ STR_CONTINUE .TEXT "\r\nContinue (Y/N)? $" MSG_HBVER .DB $76,$7F,$30,$3F,$00,$00,$00,$00 ; "HBIO " #ENDIF ; -HB_APPBNK .DB 0 ; START BANK WHEN RUN IN APP MODE -; HB_CURSEC .DB 0 ; CURRENT SECOND (TEMP) ; HB_BCDTMP .FILL 5,0 ; BCD NUMBER STORAGE (TEMP) @@ -7951,9 +8443,116 @@ HB_CONCFGSAV .DW 0 ; CONSOLE CONFIG SAVE AREA ; HB_HASFP .DB 0 ; NON-ZERO MEANS FP EXISTS ; -HB_WRKBUF .FILL 512,0 ; INTERNAL DISK BUFFER +HB_WRKBUF .EQU $ ; INTERNAL DISK BUFFER +; +; THIS AREA IS USED AS A TEMPORARY DISK BUFFER. IT IS ALSO USED +; FOR THE APPBOOT STARTUP CODE SINCE THAT CODE CAN BE DISCARDED +; AFTER STARTUP. +; +HB_APPBOOT: +; +#IFDEF APPBOOT + ; APPBOOT IS ONLY SUPPORTED ON A RUNNING ROMWBW SYSTEM. + ; CONFIRM AND DIAGNOSE IF NOT. + LD HL,(HB_IDENT) ; HL := ADR OR ROMWBW HBIOS IDENT + LD A,(HL) ; GET FIRST BYTE OF ROMWBW MARKER + CP 'W' ; MATCH? + JR NZ,HB_APPBOOTERR ; ABORT WITH INVALID CONFIG BLOCK + INC HL ; NEXT BYTE (MARKER BYTE 2) + LD A,(HL) ; LOAD IT + CP ~'W' ; MATCH? + JR NZ,HB_APPBOOTERR ; ABORT WITH INVALID CONFIG BLOCK + JR HB_APPBOOT1 ; WE ARE RUNNING ROMWBW, CONTINUE +; +HB_APPBOOTERR: + LD DE,STR_APPBOOTERR ; POINT TO ERROR MESSAGE + LD C,9 ; BDOS FUNC 9: WRITE STR + CALL $0005 ; DO IT + OR $FF ; SIGNAL ERROR + RET ; AND RETURN +; +STR_APPBOOTERR .DB "\r\n\r\n*** App Boot is only possible on running RomWBW system!\r\n\r\n$" +; +HB_APPBOOT1: + ; ANNOUNCE THE APPLICATION BOOT + LD DE,STR_APPBOOT ; POINT TO MESSAGE + LD C,9 ; BDOS FUNC 9: WRITE STR + CALL $0005 ; DO IT + JR HB_APPBOOT2 ; AND CONTINUE +; +STR_APPBOOT .DB "\r\n\r\n*** Launching RomWBW HBIOS v", BIOSVER, ", ", TIMESTAMP, " for" + .DB "\r\n\r\n ", PLATFORM_NAME, "$" +; +HB_APPBOOT2: + ; IF THIS IS AN APPLICATION BOOT, WE CAPTURE THE CURRENT BANK ID + ; AND UPDATE THE PROXY IMAGE. LATER, WHEN THE PROXY IMAGE IS COPIED + ; TO IT'S RUNNING LOCATION AT TOP OF RAM, THE CORRECT HB_CURBNK + ; VALUE WILL BE INSTALLED. NOTE: THE ADDRESSES IN THE PROXY + ; IMAGE ARE FOR IT'S RUNNING LOCATION. WE NEED TO USE *MATH* + ; TO DERIVE THE LOCATION OF HB_CURBNK IN THE IMAGE. + LD A,(HB_CURBNK) + LD (HB_CURBNK - HBX_LOC + HBX_IMG),A +; + ; FOR AN APPLICATION BOOT, WE ALSO COPY THE CONCATENATED OS + ; IMAGES TO THE AUX BANK WHERE WE WILL JUMP TO ROMLDR LATER. + ; THE AUX BANK WILL BE DESTROYED IF CP/M 3 IS LOADED. WE DON'T + ; LIVE IN A PERFECT WORLD. + LD B,BF_SYSSETCPY ; HBIOS FUNC: SETUP BANK COPY + LD D,BID_AUX ; D = DEST BANK = AUX BANK + LD A,(HB_CURBNK) ; E = SRC BANK = CUR BANK + LD E,A ; USE AS SOURCE + LD HL,$8000 ; HL = COPY LEN = ENTIRE BANK + RST 08 ; DO IT + LD B,BF_SYSBNKCPY ; HBIOS FUNC: PERFORM BANK COPY + LD HL,HB_END ; COPY FROM END OF HBIOS + LD DE,0 ; TO START OF TARGET BANK + RST 08 ; DO IT +; + #IF (MEMMGR == MM_Z280) + ; WE NEED TO SWITCH FROM USER MODE TO SYSTEM MODE, BUT CONTINUE + ; RUNNING IN THE CURRENT BANK. THIS IS A LITTLE MESSY. +; + ; FIRST, OVERLAY PROXY CODE WITH NEW CODE SO WE CAN USE THE + ; PROXY ROUTINES SAFELY. + LD DE,HBX_LOC ; RUNNING LOCATION + LD HL,HBX_IMG ; LOCATION IN IMAGE + LD BC,HBX_SIZ ; SIZE + LDIR ; INSTALL IT +; + ; NEXT, COPY A BIT OF CODE TO DO THE SYSTEM TRANSITION TO + ; UPPER MEM. WE CAN BORROW THE PROXY BOUNCE BUFFER FOR THIS. + LD HL,Z280_GOSYS + LD DE,HBX_BUF + LD BC,Z280_GOSYS_LEN + LDIR +; + ; THEN SYSCALL IT. NOTE THAT THE ROUTINE CALLED DOES NOT + ; (RET)URN, IT JUMPS TO CONTINUE SO THAT THE SYSCALL DOES + ; NOT RETURN TO USER MODE. + SC HBX_BUF ; SYSCALL ROUTINE +; +Z280_GOSYS: + ; THIS BIT OF CODE RUNS IN UPPER MEM. IT REMAPS THE LOW MEM + ; SYSTEM PAGES TO THE CURRENT BANK. WE LOSE STACK CONTEXT IN + ; THE PROCESS, SO IN THIS CASE WE NEED TO JUMP BACK TO CONTINUE + ; THE APP BOOT. + DI ; NO INTERRUPTS + LD SP,HBX_LOC ; SETUP INITIAL STACK JUST BELOW HBIOS PROXY + LD A,(HB_CURBNK) ; CURRENT BANK + LD B,$10 ; FIRST SYSTEM PDR + CALL Z280_BNKSEL ; DO THE SWITCH + JP HB_APPBOOT_Z ; AND RESUME BOOT +; +Z280_GOSYS_LEN .EQU $ - Z280_GOSYS +; + #ENDIF +; + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN ; +#ENDIF ; + .FILL (512 - ($ - HB_WRKBUF)) ; PAD REMAINDER OF WORK BUF ; #IFDEF MG014_MAP ; @@ -8000,16 +8599,12 @@ MG014_STATMAPHI: ; #ENDIF ; -#IF (DSKYENABLE) -; -;================================================================================================== -; STORAGE -;================================================================================================== -; ; CODES FOR NUMERICS ; HIGH BIT ALWAYS CLEAR TO SUPPRESS DECIMAL POINT ; SET HIGH BIT TO SHOW DECIMAL POINT ; +#IF (DSKYENABLE) +; DSKY_HEXMAP: .DB $3F ; 0 .DB $06 ; 1 @@ -8035,18 +8630,46 @@ DSKY_HEXBUFLEN .EQU $ - DSKY_HEXBUF ; #ENDIF ; +HB_DATA_END .EQU $ +; HB_END .EQU $ ; SLACK .EQU BNKTOP - $ - .ECHO "HBIOS space remaining: " - .ECHO SLACK - .ECHO " bytes.\n" +; +; +; +#IFDEF MEMINFO + .ECHO "SECTION \tSTART\tLENGTH\n" + .ECHO "-------------- \t-------\t-------\n" + + .ECHO "PAGE ZERO \t" \ .ECHO HB_PGZERO_BEG \ .ECHO "\t" \ .ECHO HB_PGZERO_END - HB_PGZERO_BEG \ .ECHO "\n" + .ECHO "HCB \t" \ .ECHO HB_HCB_BEG \ .ECHO "\t" \ .ECHO HB_HCB_END - HB_HCB_BEG \ .ECHO "\n" + .ECHO "PROXY \t" \ .ECHO HB_PROXY_BEG \ .ECHO "\t" \ .ECHO HB_PROXY_END - HB_PROXY_BEG \ .ECHO "\n" + .ECHO "ENTRY \t" \ .ECHO HB_ENTRY_BEG \ .ECHO "\t" \ .ECHO HB_ENTRY_END - HB_ENTRY_BEG \ .ECHO "\n" + .ECHO "INTVEC \t" \ .ECHO HB_INTVEC_BEG \ .ECHO "\t" \ .ECHO HB_INTVEC_END - HB_INTVEC_BEG \ .ECHO "\n" + .ECHO "SYSINIT \t" \ .ECHO HB_SYSINIT_BEG \ .ECHO "\t" \ .ECHO HB_SYSINIT_END - HB_SYSINIT_BEG \ .ECHO "\n" + .ECHO "DISP \t" \ .ECHO HB_DISP_BEG \ .ECHO "\t" \ .ECHO HB_DISP_END - HB_DISP_BEG \ .ECHO "\n" + .ECHO "SYSAPI \t" \ .ECHO HB_SYSAPI_BEG \ .ECHO "\t" \ .ECHO HB_SYSAPI_END - HB_SYSAPI_BEG \ .ECHO "\n" + .ECHO "Z280IVT \t" \ .ECHO HB_Z280IVT_BEG \ .ECHO "\t" \ .ECHO HB_Z280IVT_END - HB_Z280IVT_BEG \ .ECHO "\n" + .ECHO "INTFUNC \t" \ .ECHO HB_INTFUNC_BEG \ .ECHO "\t" \ .ECHO HB_INTFUNC_END - HB_INTFUNC_BEG \ .ECHO "\n" + .ECHO "UTIL \t" \ .ECHO HB_UTIL_BEG \ .ECHO "\t" \ .ECHO HB_UTIL_END - HB_UTIL_BEG \ .ECHO "\n" + .ECHO "PRTSUM \t" \ .ECHO HB_PRTSUM_BEG \ .ECHO "\t" \ .ECHO HB_PRTSUM_END - HB_PRTSUM_BEG \ .ECHO "\n" + .ECHO "DRIVERS \t" \ .ECHO HB_DRIVERS_BEG \ .ECHO "\t" \ .ECHO HB_DRIVERS_END - HB_DRIVERS_BEG \ .ECHO "\n" + .ECHO "FONTS \t" \ .ECHO HB_FONTS_BEG \ .ECHO "\t" \ .ECHO HB_FONTS_END - HB_FONTS_BEG \ .ECHO "\n" + .ECHO "DATA \t" \ .ECHO HB_DATA_BEG \ .ECHO "\t" \ .ECHO HB_DATA_END - HB_DATA_BEG \ .ECHO "\n" + .ECHO "SLACK \t" \ .ECHO HB_END \ .ECHO "\t" \ .ECHO SLACK \ .ECHO "\n" +; +#ENDIF +; + .ECHO "HBIOS space remaining: " + .ECHO SLACK + .ECHO " bytes.\n" ; ; DIAGNOSE HBIOS BANK OVERFLOW ; -#IF (SLACK<0) - .ECHO "*** ERROR: HBIOS too big!!!\n" - !!! ; FORCE AN ASSEMBLY ERROR +#IF (SLACK < 0) + .ECHO "*** ERROR: HBIOS too big!!!\n" + !!! ; FORCE AN ASSEMBLY ERROR #ENDIF ; ; CHECK TO SEE IF WE HAVE ENOUGH HEAP TO CACHE THE CP/M CCP @@ -8054,15 +8677,20 @@ SLACK .EQU BNKTOP - $ ; MAY NOT NEED THIS, THE MOST COMMON ONES DO. CREATING AN HBIOS ; WITHOUT SPACE FOR THIS WILL NOT BE USEFUL. ; -#IF ((CCP_SIZ + 512) > SLACK) - .ECHO "*** ERROR: Insufficient HEAP space!!!\n" - !!! ; FORCE AN ASSEMBLY ERROR +#IF ((CCP_SIZ + 512 + 8) > SLACK) + .ECHO "*** ERROR: Insufficient HEAP space!!!\n" + !!! ; FORCE AN ASSEMBLY ERROR #ENDIF ; +;;;#IF (SLACK < (1024 * 3)) +;;; .ECHO "*** ERROR: Low HEAP space!!!\n" +;;; !!! ; FORCE AN ASSEMBLY ERROR +;;;#ENDIF +; #IFDEF ROMBOOT #IF (ROMSIZE > 0) - .FILL SLACK + .FILL SLACK #ENDIF #ENDIF ; - .END + .END diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc index cb573649..9c00f6e2 100644 --- a/Source/HBIOS/hbios.inc +++ b/Source/HBIOS/hbios.inc @@ -156,6 +156,8 @@ PLT_DUO .EQU 17 ; DUODYNE Z80 SYSTEM PLT_HEATH .EQU 18 ; HEATHKIT H8 Z80 SYSTEM PLT_EPITX .EQU 19 ; Z180 MINI-ITX PLT_MON .EQU 20 ; MONSPUTER +PLT_STDZ180 .EQU 21 ; GENESIS Z180 SYSTEM +PLT_NABU .EQU 22 ; NABU PERSONAL COMPUTER ; ; HBIOS GLOBAL ERROR RETURN VALUES ; diff --git a/Source/HBIOS/hdsk.asm b/Source/HBIOS/hdsk.asm index 2fa6fddf..6dfc426f 100644 --- a/Source/HBIOS/hdsk.asm +++ b/Source/HBIOS/hdsk.asm @@ -22,11 +22,11 @@ HDSK_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE) HDSK_STAT .EQU 1 ; OFFSET OF STATUS (BYTE) HDSK_LBA .EQU 2 ; OFFSET OF LBA (DWORD) ; - .ECHO "HDSK: IO=" - .ECHO HDSK_IO - .ECHO ", DEVICE COUNT=" - .ECHO HDSK_DEVCNT - .ECHO "\n" + DEVECHO "HDSK: IO=" + DEVECHO HDSK_IO + DEVECHO ", DEVICE COUNT=" + DEVECHO HDSK_DEVCNT + DEVECHO "\n" ; HDSK_CFGTBL: ; DEVICE 0 diff --git a/Source/HBIOS/icm.asm b/Source/HBIOS/icm.asm index 79aab3fd..a0490cd4 100644 --- a/Source/HBIOS/icm.asm +++ b/Source/HBIOS/icm.asm @@ -31,6 +31,10 @@ ICM_PPIA .EQU ICMPPIBASE + 0 ; PORT A ICM_PPIB .EQU ICMPPIBASE + 1 ; PORT B ICM_PPIC .EQU ICMPPIBASE + 2 ; PORT C ICM_PPIX .EQU ICMPPIBASE + 3 ; PPI CONTROL PORT +; + DEVECHO "ICM: IO=" + DEVECHO ICMPPIBASE + DEVECHO "\n" ; ;__ICM_INIT__________________________________________________________________________________________ ; diff --git a/Source/HBIOS/ide.asm b/Source/HBIOS/ide.asm index aae7173e..388c3181 100644 --- a/Source/HBIOS/ide.asm +++ b/Source/HBIOS/ide.asm @@ -214,26 +214,26 @@ IDE_DEV0M: ; DEVICE 0, MASTER .DB IDE0DATHI ; IO BASE ADDRESS .DW IDE_DEV0S ; PARTNER ; - .ECHO "IDE: MODE=" + DEVECHO "IDE: MODE=" #IF (IDE0MODE == IDEMODE_NONE) - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (IDE0MODE == IDEMODE_DIO) - .ECHO "DIO" + DEVECHO "DIO" #ENDIF #IF (IDE0MODE == IDEMODE_DIDE) - .ECHO "DIDE" + DEVECHO "DIDE" #ENDIF #IF (IDE0MODE == IDEMODE_MK4) - .ECHO "MK4" + DEVECHO "MK4" #ENDIF #IF (IDE0MODE == IDEMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF - .ECHO ", IO=" - .ECHO IDE0BASE - .ECHO ", MASTER" - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IDE0BASE + DEVECHO ", MASTER" + DEVECHO "\n" ; IDE_DEV0S: ; DEVICE 0, SLAVE .DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY) @@ -249,26 +249,26 @@ IDE_DEV0S: ; DEVICE 0, SLAVE .DB IDE0DATHI ; IO BASE ADDRESS .DW IDE_DEV0M ; PARTNER ; - .ECHO "IDE: MODE=" + DEVECHO "IDE: MODE=" #IF (IDE0MODE == IDEMODE_NONE) - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (IDE0MODE == IDEMODE_DIO) - .ECHO "DIO" + DEVECHO "DIO" #ENDIF #IF (IDE0MODE == IDEMODE_DIDE) - .ECHO "DIDE" + DEVECHO "DIDE" #ENDIF #IF (IDE0MODE == IDEMODE_MK4) - .ECHO "MK4" + DEVECHO "MK4" #ENDIF #IF (IDE0MODE == IDEMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF - .ECHO ", IO=" - .ECHO IDE0BASE - .ECHO ", SLAVE" - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IDE0BASE + DEVECHO ", SLAVE" + DEVECHO "\n" #ENDIF ; #IF (IDECNT >= 2) @@ -287,26 +287,26 @@ IDE_DEV1M: ; DEVICE 1, MASTER .DB IDE1DATHI ; IO BASE ADDRESS .DW IDE_DEV1S ; PARTNER ; - .ECHO "IDE: MODE=" + DEVECHO "IDE: MODE=" #IF (IDE1MODE == IDEMODE_NONE) - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (IDE1MODE == IDEMODE_DIO) - .ECHO "DIO" + DEVECHO "DIO" #ENDIF #IF (IDE1MODE == IDEMODE_DIDE) - .ECHO "DIDE" + DEVECHO "DIDE" #ENDIF #IF (IDE1MODE == IDEMODE_MK4) - .ECHO "MK4" + DEVECHO "MK4" #ENDIF #IF (IDE1MODE == IDEMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF - .ECHO ", IO=" - .ECHO IDE1BASE - .ECHO ", MASTER" - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IDE1BASE + DEVECHO ", MASTER" + DEVECHO "\n" ; IDE_DEV1S: ; DEVICE 1, SLAVE .DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY) @@ -322,26 +322,26 @@ IDE_DEV1S: ; DEVICE 1, SLAVE .DB IDE1DATHI ; IO BASE ADDRESS .DW IDE_DEV1M ; PARTNER ; - .ECHO "IDE: MODE=" + DEVECHO "IDE: MODE=" #IF (IDE1MODE == IDEMODE_NONE) - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (IDE1MODE == IDEMODE_DIO) - .ECHO "DIO" + DEVECHO "DIO" #ENDIF #IF (IDE1MODE == IDEMODE_DIDE) - .ECHO "DIDE" + DEVECHO "DIDE" #ENDIF #IF (IDE1MODE == IDEMODE_MK4) - .ECHO "MK4" + DEVECHO "MK4" #ENDIF #IF (IDE1MODE == IDEMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF - .ECHO ", IO=" - .ECHO IDE1BASE - .ECHO ", SLAVE" - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IDE1BASE + DEVECHO ", SLAVE" + DEVECHO "\n" #ENDIF ; #IF (IDECNT >= 3) @@ -360,26 +360,26 @@ IDE_DEV2M: ; DEVICE 2, MASTER .DB IDE2DATHI ; IO BASE ADDRESS .DW IDE_DEV2S ; PARTNER ; - .ECHO "IDE: MODE=" + DEVECHO "IDE: MODE=" #IF (IDE2MODE == IDEMODE_NONE) - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (IDE2MODE == IDEMODE_DIO) - .ECHO "DIO" + DEVECHO "DIO" #ENDIF #IF (IDE2MODE == IDEMODE_DIDE) - .ECHO "DIDE" + DEVECHO "DIDE" #ENDIF #IF (IDE2MODE == IDEMODE_MK4) - .ECHO "MK4" + DEVECHO "MK4" #ENDIF #IF (IDE2MODE == IDEMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF - .ECHO ", IO=" - .ECHO IDE2BASE - .ECHO ", MASTER" - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IDE2BASE + DEVECHO ", MASTER" + DEVECHO "\n" ; IDE_DEV2S: ; DEVICE 2, SLAVE .DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY) @@ -395,26 +395,26 @@ IDE_DEV2S: ; DEVICE 2, SLAVE .DB IDE2DATHI ; IO BASE ADDRESS .DW IDE_DEV1M ; PARTNER ; - .ECHO "IDE: MODE=" + DEVECHO "IDE: MODE=" #IF (IDE2MODE == IDEMODE_NONE) - .ECHO "NONE" + DEVECHO "NONE" #ENDIF #IF (IDE2MODE == IDEMODE_DIO) - .ECHO "DIO" + DEVECHO "DIO" #ENDIF #IF (IDE2MODE == IDEMODE_DIDE) - .ECHO "DIDE" + DEVECHO "DIDE" #ENDIF #IF (IDE2MODE == IDEMODE_MK4) - .ECHO "MK4" + DEVECHO "MK4" #ENDIF #IF (IDE2MODE == IDEMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF - .ECHO ", IO=" - .ECHO IDE2BASE - .ECHO ", SLAVE" - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IDE2BASE + DEVECHO ", SLAVE" + DEVECHO "\n" #ENDIF ; #IF ($ - IDE_CFGTBL) != (IDE_DEVCNT * IDE_CFGSIZ) diff --git a/Source/HBIOS/imm.asm b/Source/HBIOS/imm.asm index d85a76cd..237c6ed4 100644 --- a/Source/HBIOS/imm.asm +++ b/Source/HBIOS/imm.asm @@ -1526,16 +1526,16 @@ IMM0_CFG: ; DEVICE 0 .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA ; - .ECHO "IMM: MODE=" + DEVECHO "IMM: MODE=" #IF (IMMMODE == IMMMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (IMMMODE == IMMMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO IMM0BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IMM0BASE + DEVECHO "\n" #ENDIF ; #IF (IMMCNT >= 2) @@ -1548,16 +1548,16 @@ IMM1_CFG: ; DEVICE 1 .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA ; - .ECHO "IMM: MODE=" + DEVECHO "IMM: MODE=" #IF (IMMMODE == IMMMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (IMMMODE == IMMMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO IMM1BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO IMM1BASE + DEVECHO "\n" #ENDIF ; #IF ($ - IMM_CFG) != (IMMCNT * IMM_CFGSIZ) diff --git a/Source/HBIOS/intrtc.asm b/Source/HBIOS/intrtc.asm index 8d65e2e2..49eb9573 100644 --- a/Source/HBIOS/intrtc.asm +++ b/Source/HBIOS/intrtc.asm @@ -5,7 +5,7 @@ ; INTRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS) ; - .ECHO "INTRTC: ENABLED\n" + DEVECHO "INTRTC: ENABLED\n" ; ; RTC DEVICE INITIALIZATION ENTRY ; diff --git a/Source/HBIOS/kbd.asm b/Source/HBIOS/kbd.asm index 113c8aa1..67014d2b 100644 --- a/Source/HBIOS/kbd.asm +++ b/Source/HBIOS/kbd.asm @@ -56,7 +56,7 @@ KBD_STATUS .DB 0 ; CURRENT STATUS BITS (SEE ABOVE) KBD_REPEAT .DB 0 ; CURRENT REPEAT RATE KBD_IDLE .DB 0 ; IDLE COUNT ; - .ECHO "KBD: ENABLED\n" + DEVECHO "KBD: ENABLED\n" ; ;__________________________________________________________________________________________________ ; KEYBOARD INITIALIZATION diff --git a/Source/HBIOS/kio.asm b/Source/HBIOS/kio.asm index 8c7867c7..bb7cd109 100644 --- a/Source/HBIOS/kio.asm +++ b/Source/HBIOS/kio.asm @@ -25,6 +25,10 @@ KIO_KIOCMD .EQU KIOBASE + $0E KIO_KIOCMDB .EQU KIOBASE + $0F ; ; +; + DEVECHO "KIO: IO=" + DEVECHO KIOBASE + DEVECHO "\n" ; KIO_PREINIT: CALL KIO_DETECT diff --git a/Source/HBIOS/lpt.asm b/Source/HBIOS/lpt.asm index 73f26b5e..917a5a38 100644 --- a/Source/HBIOS/lpt.asm +++ b/Source/HBIOS/lpt.asm @@ -421,16 +421,16 @@ LPT0_CFG: .DB LPT0BASE ; BASE PORT .DW 0 ; LINE CONFIGURATION ; - .ECHO "LPT: MODE=" + DEVECHO "LPT: MODE=" #IF (LPTMODE == LPTMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (LPTMODE == LPTMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO LPT0BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO LPT0BASE + DEVECHO "\n" ; LPT_CFGSIZ .EQU $ - LPT_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -444,16 +444,16 @@ LPT1_CFG: .DB LPT1BASE ; BASE PORT .DW 0 ; LINE CONFIGURATION ; - .ECHO "LPT: MODE=" + DEVECHO "LPT: MODE=" #IF (LPTMODE == LPTMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (LPTMODE == LPTMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO LPT1BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO LPT1BASE + DEVECHO "\n" ; #ENDIF ; diff --git a/Source/HBIOS/md.asm b/Source/HBIOS/md.asm index 6e8adbb8..0d8b3378 100644 --- a/Source/HBIOS/md.asm +++ b/Source/HBIOS/md.asm @@ -40,7 +40,7 @@ MD_CFGTBL: .DB MID_MDRAM ; DEVICE MEDIA ID .DB MD_ARAM ; DEVICE ATTRIBUTE ; - .ECHO "MD: TYPE=RAM\n" + DEVECHO "MD: TYPE=RAM\n" #ENDIF ; #IF (MDROM) @@ -51,7 +51,7 @@ MD_CFGTBL: .DB MID_MDROM ; DEVICE MEDIA ID .DB MD_AROM ; DEVICE ATTRIBUTE ; - .ECHO "MD: TYPE=ROM\n" + DEVECHO "MD: TYPE=ROM\n" #ENDIF ; MD_DEVCNT .EQU ($ - MD_CFGTBL) / MD_CFGSIZ diff --git a/Source/HBIOS/mky.asm b/Source/HBIOS/mky.asm index 0a86dd16..34650e82 100644 --- a/Source/HBIOS/mky.asm +++ b/Source/HBIOS/mky.asm @@ -177,6 +177,11 @@ SCANCODE_TBL: .DB S_RETURN, S_SELECT, S_BACKSPACE, S_STOP, S_TAB, S_ESC, S_F5, S_F4 ; 07 .DB S_RIGHT, S_DOWN, S_UP, S_LEFT, S_DELETE, S_INSERT, S_HOME, S_SPACE ; 08 + + DEVECHO "MKY: IO=" + DEVECHO MKY_REGA + DEVECHO "\n" + ;__________________________________________________________________________________________________ ; KEYBOARD INITIALIZATION ;__________________________________________________________________________________________________ diff --git a/Source/HBIOS/nabu.asm b/Source/HBIOS/nabu.asm new file mode 100644 index 00000000..bb4db4f4 --- /dev/null +++ b/Source/HBIOS/nabu.asm @@ -0,0 +1,123 @@ +; +;================================================================================================== +; NABU INTERRUPT INTERCEPTOR +;================================================================================================== +; +NABU_INT1CLR .EQU $68 +NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B +; +; NABU INTERRUPT ENABLE PORT AND STATUS PORTS ARE MANAGED BY THE +; PSG IO PORTS. +; +; INTERRUPT ENABLE (OUTPUT) - PSG PORT A +; +; D7 - HCCA Receive +; D6 - HCCA Send +; D5 - Keyboard +; D4 - Video Frame Sync +; D3 - Option Card 0 (J9) +; D2 - Option Card 1 (J10) +; D1 - Option Card 2 (J11) +; DO - Option Card 3 (J12) +; +; STATUS BYTE (INPUT) - PSG PORT B +; +; D7 - N.C. +; D6 - Overrun Error (HCCA UART) +; D5 - Framing Error (HCCA UART) +; D4 - Printer Busy +; D3 - A2 Priority +; D2 - A1 Priority +; D1 - AO Priority +; DO - Interrupt Request +; +; PORTS TO MANAGE PSG +; +NABU_RSEL .EQU $41 ; SELECT PSG REGISTER +NABU_RDAT .EQU $40 ; WRITE TO SELECTED REGISTER +NABU_RIN .EQU $40 ; READ FROM SELECTED REGISTER +; + DEVECHO "NABU: IO=" + DEVECHO NABU_INT1CLR + DEVECHO "\n" +; +; +; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION +; +NABU_PREINIT: + ; INITIALIZE THE NABU PSG I/O PORTS + ; PORT A IN WRITE MODE AND SET ALL BITS TO ZERO + ; PORT B IN READ MODE +; + CALL NABU_SETPSG +; +;#IF (INTMODE == 1) +; ; ADD TO INTERRUPT CHAIN +; LD HL,NABU_STAT +; CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST +;#ENDIF +; +;#IF (INTMODE == 2) +; LD HL,NABU_STAT +; LD (IVT(INT_NABUKB)),HL ; IVT INDEX +;#ENDIF +; RET +; +NABU_INIT: + CALL NEWLINE ; FORMATTING + PRTS("NABU: INT1$") +; XOR A +; OUT (NABU_INT1CLR),A + RET ; DONE +; +NABU_SETPSG: + ; SET I/O PORT MODES + LD A,7 ; PSG R7 (ENABLE REG) + OUT (NABU_RSEL),A ; SELECT IT + LD A,%01111111 ; PORT B INPUT, PORT A OUPUT + OUT (NABU_RDAT),A ; SET IT +; + ; SET PORT A TO VALUE 0 + LD A,14 ; PSG R14 (PORT A DATA) + OUT (NABU_RSEL),A ; SELECT IT +#IF (INTMODE > 0) + #IF (TMSTIMENABLE == TRUE) + LD A,%00110000 ; ENABLE NABU KB & VDP INTS + #ELSE + LD A,%00100000 ; ENABLE NABU KB INTS + #ENDIF +#ELSE + XOR A +#ENDIF + OUT (NABU_RDAT),A ; SET IT +; + LD A,15 + OUT (NABU_RSEL),A + IN A,(NABU_RIN) + RET +; +; INTERRUPT ENTRY POINT +; +NABU_STAT: +; CALL NABU_SETPSG +; XOR A +; OUT (NABU_INT1CLR),A ; CLEAR THE INTERRUPT + LD HL,(NABU_TICCNT) ; INCREMENT NABU TICK COUNTER + + + INC HL ; ... IN HBIOS PROXY + LD (NABU_TICCNT),HL +; LD A,(NABU_HBTICK) ; INCREMENT INTERNAL TICK CTR +; INC A +; LD (NABU_HBTICK),A +; CP $0A ; CALL HB_TICK EVERY 10 INTERRUPTS (50HZ) +; RET NZ ; NOT TIME THEN JUST RETURN + CALL HB_TICK ; DO NORMAL HBIOS TICK + XOR A +; LD (NABU_HBTICK),A ; RESET HBTICK COUNTER + INC A ; INTERRUPT HANDLED + RET +; +NABU_HBTICK: + .DB 0 ; INTERNAL TICK CTR +; diff --git a/Source/HBIOS/nabukb.asm b/Source/HBIOS/nabukb.asm new file mode 100644 index 00000000..5d949032 --- /dev/null +++ b/Source/HBIOS/nabukb.asm @@ -0,0 +1,265 @@ +;====================================================================== +; NABU KEYBOARD DRIVER +; +; CREATED BY: LES BIRD +; +;====================================================================== +; +; NABU KEYBOARD CODES: +; +; $00-$7F STANDARD ASCII CODES +; $80-$8F JOYSTICK PREFIXES ($80 = JS1, $81 = JS2) +; $90-$9F KEYBOARD ERROR CODES +; $A0-$BF JOYSTICK DATA +; $C0-$DF UNUSED +; $E0-$EF SPECIAL KEYS +; +; NOTE THAT THE ERROR CODE $94 IS A WATCHDOG TIMER THAT WILL BE +; SENT BY THE KEYBOARD EVERY 3.7 SECONDS. +; +; THE CODE BELOW WILL IGNORE (SWALLOW) THE ERROR CODES ($90-$9F) AND +; WILL TRANSLATE SPECIAL KEYS ($E0-$FF) TO ROMWBW EQUIVALENTS. ALL +; OTHER KEYS WILL BE PASSED THROUGH AS IS. +; +; KBPORT EQU $90 +; +; POLL FOR INPUT +; KBLOOP: +; IN A,(KBPORT+1) +; BIT 1,A +; JR Z,KBLOOP +; IN A,(KBPORT) +; +; INIT: +; XOR A +; CALL SUB12 +; CALL SUB12 +; CALL SUB12 +; CALL SUB12 +; CALL SUB12 +; LD A,40H +; CALL SUB12 +; LD A,4EH +; CALL SUB12 +; LD A,04H +; CALL SUB12 +; +NABUKB_IODAT .EQU $90 ; KEYBOARD DATA (READ) +NABUKB_IOSTAT .EQU $91 ; STATUS (READ), CMD (WRITE) +; + DEVECHO "NABUKB: IO=" + DEVECHO NABUKB_IODAT + DEVECHO "\n" +; +; SETUP INTERRUPT HANDLING, IF ENABLED +; +NABUKB_PREINIT: +#IF (INTMODE == 1) + ; ADD TO INTERRUPT CHAIN + LD HL,NABUKB_INT + CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST +#ENDIF +; +#IF (INTMODE == 2) + ; INSTALL VECTOR + LD HL,NABUKB_INT + LD (IVT(INT_NABUKB)),HL ; IVT INDEX +#ENDIF + RET +; +; INITIALZIZE THE KEYBOARD CONTROLLER. +; +NABUKB_INIT: + CALL NEWLINE + PRTS("NABUKB: IO=0x$") + LD A,NABUKB_IODAT + CALL PRTHEXBYTE +; + XOR A + CALL NABUKB_PUT + CALL NABUKB_PUT + CALL NABUKB_PUT + CALL NABUKB_PUT + CALL NABUKB_PUT + LD A,$40 ; RESET 8251 + CALL NABUKB_PUT + LD A,$4E ; 1 STOP BIT, 8 BITS, 64X CLK + CALL NABUKB_PUT + LD A,$04 ; ENABLE RECV + CALL NABUKB_PUT +; + XOR A + RET +; +#IF (INTMODE > 0) +; +; INTERRUPT HANDLER FOR NABU KEYBOARD. HANDLES INTERRUPTS FOR EITHER +; INT MODE 1 OR INT MODE 2. THE KEYBOARD BUFFER IS JUST A SINGLE CHAR +; AT THIS POINT. NEW CHARACTERS ARRIVING WHEN THE BUFFER IS FULL WILL +; BE DISCARDED. +; +NABUKB_INT: + IN A,(NABUKB_IOSTAT) ; GET KBD STATUS + AND $02 ; CHECK DATA RDY BIT + RET Z ; ABORT W/ Z (INT NOT HANDLED) +; + ;CALL PC_LT ; *DEBUG* + IN A,(NABUKB_IODAT) ; GET THE KEY + LD E,A ; STASH IN REG E + ;CALL PRTHEXBYTE ; *DEBUG* + ;CALL PC_GT ; *DEBUG* +; + LD A,(NABUKB_KSTAT) ; GET KEY BUFFER STAT + OR A ; SET FLAGS + RET NZ ; BUFFER FULL, BAIL OUT W/ NZ (INT HANDLED), KEY DISCARDED +; + LD A,E ; RECOVER THE KEY CODE + CALL NABUKB_XB ; TRANSLATE AND BUFFER KEY + OR $FF ; SIGNAL INT HANDLED + RET ; DONE +; +#ENDIF +; +; NORMAL HBIOS CHAR INPUT STATUS. IF INTERRUPTS ARE NOT ACTIVE, THEN +; KEYBOARD POLLING IS IMPLEMENTED HERE. +; +NABUKB_STAT: + LD A,(NABUKB_KSTAT) ; GET KEY WAITING STATUS + OR A ; SET FLAGS +#IF (INTMODE > 0) + JR Z,NABUKB_STATX ; BAIL OUT W/ Z (NO KEY) + RET ; KEY WAITING, ALL SET +#ELSE + RET NZ ; KEY WAITING, ALL SET + IN A,(NABUKB_IOSTAT) ; GET KBD STATUS + AND $02 ; CHECK DATA RDY BIT + JR Z,NABUKB_STATX ; BAIL OUT W/ Z (NO KEY) + IN A,(NABUKB_IODAT) ; GET THE KEY + CALL NABUKB_XB ; TRANSLATE AND BUFFER KEY + LD A,(NABUKB_KSTAT) ; GET NEW KEY WAITING STATUS + OR A ; SET FLAGS + RET ; DONE +#ENDIF +; +NABUKB_STATX: + XOR A ; SIGNAL NO CHAR READY + JP CIO_IDLE ; RETURN VIA IDLE PROCESSOR +; +; ROUTINE TO TRANSLATE AND BUFFER INCOMING NABU KEYBOARD KEYCODES +; +NABUKB_XB: + BIT 7,A ; HIGH BIT IS SPECIAL CHAR + JR Z,NABUKB_XB2 ; IF NORMAL CHAR, BUFFER IT + CP $90 ; START OF ERR CODES + JR C,NABUKB_XB1 ; NOT ERR CODE, CONTINUE + CP $A0 ; END OF ERR CODES + JR NC,NABUKB_XB1 ; NOT ERR CODE, CONTINUE + RET ; DISCARD ERR CODE AND RETURN +NABUKB_XB1: + CP $E0 ; SPECIAL CHARACTER? + JR C,NABUKB_XB2 ; IF NOT, SKIP XLAT, BUFFER KEY + CALL NABUKB_XLAT ; IF SO, TRANSLATE IT + RET C ; CF INDICATES INVALID, DISCARD AND RETURN +NABUKB_XB2: + LD (NABUKB_KEY),A ; BUFFER IT + LD A,1 ; SIGNAL KEY WAITING + LD (NABUKB_KSTAT),A ; SAVE IT + RET ; DONE +; +; ROUTINE TO TRANSLATE SPECIAL NABU KEYBOARD KEY CODES +; +NABUKB_XLAT: + ; NABU KEYBOARD USES $E0-$FF FOR SPECIAL KEYS + ; HERE WE TRANSLATE TO ROMWBW SPECIAL KEYS AS BEST WE CAN + ; CF IS SET ON RETURN IF KEY IS INVALID (NO TRANSLATION) + SUB $E0 ; ZERO OFFSET + RET C ; ABORT IF < $E0, CF SET! + LD HL,NABUKB_XTBL ; POINT TO XLAT TABLE + CALL ADDHLA ; OFFSET BY SPECIAL KEY VAL + LD A,(HL) ; GET TRANSLATED VALUE + OR A ; CHECK FOR N/A (0) + RET NZ ; XLAT OK, RET W/ CF CLEAR + SCF ; SIGNAL INVALID + RET ; DONE +; +NABUKB_XLAT1: + SCF ; SIGNAL INVALID + RET ; AND DONE +; +; FLUSH KEYBOARD BUFFER +; +NABUKB_FLUSH: + XOR A + LD (NABUKB_KSTAT),A + RET +; +; WAIT FOR A KEY TO BE READY AND RETURN IT. +; +NABUKB_READ: + CALL NABUKB_STAT ; CHECK FOR KEY READY + JR Z,NABUKB_READ ; LOOP TIL ONE IS READY + LD A,(NABUKB_KEY) ; GET THE BUFFERED KEY + LD E,A ; PUT IN E FOR RETURN + XOR A ; ZERO TO ACCUM + LD C,A ; NO SCANCODE + LD D,A ; NO KEYSTATE + LD (NABUKB_KSTAT),A ; CLEAR KEY WAITING STATUS + RET ; AND RETURN +; +; HELPER ROUTINE TO WRITE +; +NABUKB_PUT: + OUT (NABUKB_IOSTAT),A + NOP + NOP + NOP + NOP + NOP + RET +; +; +; +NABUKB_KSTAT .DB 0 ; KEY STATUS +NABUKB_KEY .DB 0 ; KEY BUFFER +; +; THIS TABLE TRANSLATES THE NABU KEYBOARD SPECIAL CHARS INTO +; ANALOGOUS ROMWBW STANDARD SPECIAL CHARACTERS. THE TABLE STARTS WITH +; NABU KEY CODE $E0 AND HANDLES $20 POSSIBLE VALUES ($E0-$FF) +; THE SPECIAL KEYS SEND A SPECIFIC KEYCODE TO INDICATE DOWN (KEY +; PRESSED) AND UP (KEY RELEASED). WE WILL ARBITRARILY CHOOSE TO +; RESPOND TO KEY PRESSED. a TRANSLATION VALUE OF $00 MEANS THAT THE +; KEY CODE SHOULD BE DISCARDED. +; +NABUKB_XTBL: + .DB $F9 ; $E0, RIGHT ARROW (DN) -> RIGHT ARROW + .DB $F8 ; $E1, LEFT ARROW (DN) -> LEFT ARROW + .DB $F6 ; $E2, UP ARROW (DN) -> UP ARROW + .DB $F7 ; $E3, DOWN ARROW (DN) -> DOWN ARROW + .DB $F5 ; $E4, PAGE RIGHT (DN) -> PAGE DOWN + .DB $F4 ; $E5, PAGE LEFT (DN) -> PAGE UP + .DB $F3 ; $E6, NO (DN) -> END + .DB $F2 ; $E7, YES (DN) -> HOME + .DB $EE ; $E8, SYM (DN) -> SYSRQ + .DB $EF ; $E9, PAUSE (DN) -> PAUSE + .DB $00 ; $EA, TV/NABU (DN) -> APP + .DB $00 ; $EB, N/A + .DB $00 ; $EC, N/A + .DB $00 ; $ED, N/A + .DB $00 ; $EE, N/A + .DB $00 ; $EF, N/A + .DB $00 ; $F0, RIGHT ARROW (UP) + .DB $00 ; $F1, LEFT ARROW (UP) + .DB $00 ; $F2, UP ARROW (UP) + .DB $00 ; $F3, DOWN ARROW (UP) + .DB $00 ; $F4, PAGE RIGHT (UP) + .DB $00 ; $F5, PAGE LEFT (UP) + .DB $00 ; $F6, NO (UP) + .DB $00 ; $F7, YES (UP) + .DB $00 ; $F8, SYM (UP) + .DB $00 ; $F9, PAUSE (UP) + .DB $00 ; $FA, TV/NABU (UP) + .DB $00 ; $FB, N/A + .DB $00 ; $FC, N/A + .DB $00 ; $FD, N/A + .DB $00 ; $FE, N/A + .DB $00 ; $FF, N/A diff --git a/Source/HBIOS/pcf.asm b/Source/HBIOS/pcf.asm index 92023bc9..c8c0eaa1 100644 --- a/Source/HBIOS/pcf.asm +++ b/Source/HBIOS/pcf.asm @@ -94,9 +94,9 @@ PCF_ACKTO .EQU 65000 PCF_BBTO .EQU 65000 PCF_LABDLY .EQU 65000 ; - .ECHO "PCF: IO=" - .ECHO PCF_BASE - .ECHO "\n" + DEVECHO "PCF: IO=" + DEVECHO PCF_BASE + DEVECHO "\n" ; ; DATA PORT REGISTERS ; diff --git a/Source/HBIOS/pio.asm b/Source/HBIOS/pio.asm index 1dc823a9..444fb64b 100644 --- a/Source/HBIOS/pio.asm +++ b/Source/HBIOS/pio.asm @@ -308,9 +308,9 @@ PIO0A_CFG: .DW DEFSERCFG ; LINE CONFIGURATION .DW PIO0A_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "PIO: IO=" - .ECHO PIO0BASE - .ECHO ", CHANNEL A\n" + DEVECHO "PIO: IO=" + DEVECHO PIO0BASE + DEVECHO ", CHANNEL A\n" ; PIO_CFGSIZ .EQU $ - PIO_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -324,9 +324,9 @@ PIO0B_CFG: .DW DEFSERCFG ; LINE CONFIGURATION .DW PIO0B_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "PIO: IO=" - .ECHO PIO0BASE - .ECHO ", CHANNEL B\n" + DEVECHO "PIO: IO=" + DEVECHO PIO0BASE + DEVECHO ", CHANNEL B\n" ; #IF (PIOCNT >= 2) ; @@ -340,9 +340,9 @@ PIO1A_CFG: .DW DEFSERCFG ; LINE CONFIGURATION .DW PIO1A_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "PIO: IO=" - .ECHO PIO1BASE - .ECHO ", CHANNEL A\n" + DEVECHO "PIO: IO=" + DEVECHO PIO1BASE + DEVECHO ", CHANNEL A\n" ; ; PIO1 CHANNEL B PIO1B_CFG: @@ -354,9 +354,9 @@ PIO1B_CFG: .DW DEFSERCFG ; LINE CONFIGURATION .DW PIO1B_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "PIO: IO=" - .ECHO PIO1BASE - .ECHO ", CHANNEL B\n" + DEVECHO "PIO: IO=" + DEVECHO PIO1BASE + DEVECHO ", CHANNEL B\n" ; #ENDIF ; diff --git a/Source/HBIOS/pkd.asm b/Source/HBIOS/pkd.asm index fbaa6317..5da7dda4 100644 --- a/Source/HBIOS/pkd.asm +++ b/Source/HBIOS/pkd.asm @@ -66,9 +66,9 @@ PKD_CMD_FIFO .EQU %01000000 ; READ FIFO ; PKD_PRESCL .EQU PKDOSC/100000 ; PRESCALER ; - .ECHO "PKD: IO=" - .ECHO PKDPPIBASE - .ECHO "\n" + DEVECHO "PKD: IO=" + DEVECHO PKDPPIBASE + DEVECHO "\n" ; ;__PKD_PREINIT_______________________________________________________________________________________ ; diff --git a/Source/HBIOS/ppa.asm b/Source/HBIOS/ppa.asm index e13493d8..0b6da099 100644 --- a/Source/HBIOS/ppa.asm +++ b/Source/HBIOS/ppa.asm @@ -1386,16 +1386,16 @@ PPA0_CFG: ; DEVICE 0 .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA ; - .ECHO "PPA: MODE=" + DEVECHO "PPA: MODE=" #IF (PPAMODE == PPAMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (PPAMODE == PPAMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO PPA0BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO PPA0BASE + DEVECHO "\n" #ENDIF ; #IF (PPACNT >= 2) @@ -1408,16 +1408,16 @@ PPA1_CFG: ; DEVICE 1 .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA ; - .ECHO "PPA: MODE=" + DEVECHO "PPA: MODE=" #IF (PPAMODE == PPAMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (PPAMODE == PPAMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO PPA1BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO PPA1BASE + DEVECHO "\n" #ENDIF ; #IF ($ - PPA_CFG) != (PPACNT * PPA_CFGSIZ) diff --git a/Source/HBIOS/ppide.asm b/Source/HBIOS/ppide.asm index d70ede57..de956828 100644 --- a/Source/HBIOS/ppide.asm +++ b/Source/HBIOS/ppide.asm @@ -230,10 +230,10 @@ PPIDE_DEV0M: ; DEVICE 0, MASTER .DB PPIDE0BASE+3 ; PPI .DW PPIDE_DEV0S ; PARTNER ; - .ECHO "PPIDE: IO=" - .ECHO PPIDE0BASE - .ECHO ", MASTER" - .ECHO "\n" + DEVECHO "PPIDE: IO=" + DEVECHO PPIDE0BASE + DEVECHO ", MASTER" + DEVECHO "\n" ; PPIDE_DEV0S: ; DEVICE 0, SLAVE .DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY) @@ -248,10 +248,10 @@ PPIDE_DEV0S: ; DEVICE 0, SLAVE .DB PPIDE0BASE+3 ; PPI .DW PPIDE_DEV0M ; PARTNER ; - .ECHO "PPIDE: IO=" - .ECHO PPIDE0BASE - .ECHO ", SLAVE" - .ECHO "\n" + DEVECHO "PPIDE: IO=" + DEVECHO PPIDE0BASE + DEVECHO ", SLAVE" + DEVECHO "\n" ; #ENDIF ; @@ -270,10 +270,10 @@ PPIDE_DEV1M: ; DEVICE 1, MASTER .DB PPIDE1BASE+3 ; PPI .DW PPIDE_DEV1S ; PARTNER ; - .ECHO "PPIDE: IO=" - .ECHO PPIDE1BASE - .ECHO ", MASTER" - .ECHO "\n" + DEVECHO "PPIDE: IO=" + DEVECHO PPIDE1BASE + DEVECHO ", MASTER" + DEVECHO "\n" ; PPIDE_DEV1S: ; DEVICE 1, SLAVE .DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY) @@ -288,10 +288,10 @@ PPIDE_DEV1S: ; DEVICE 1, SLAVE .DB PPIDE1BASE+3 ; PPI .DW PPIDE_DEV1M ; PARTNER ; - .ECHO "PPIDE: IO=" - .ECHO PPIDE1BASE - .ECHO ", SLAVE" - .ECHO "\n" + DEVECHO "PPIDE: IO=" + DEVECHO PPIDE1BASE + DEVECHO ", SLAVE" + DEVECHO "\n" ; #ENDIF ; @@ -310,10 +310,10 @@ PPIDE_DEV2M: ; DEVICE 2, MASTER .DB PPIDE2BASE+3 ; PPI .DW PPIDE_DEV2S ; PARTNER ; - .ECHO "PPIDE: IO=" - .ECHO PPIDE2BASE - .ECHO ", MASTER" - .ECHO "\n" + DEVECHO "PPIDE: IO=" + DEVECHO PPIDE2BASE + DEVECHO ", MASTER" + DEVECHO "\n" ; PPIDE_DEV2S: ; DEVICE 2, SLAVE .DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY) @@ -328,10 +328,10 @@ PPIDE_DEV2S: ; DEVICE 2, SLAVE .DB PPIDE2BASE+3 ; PPI .DW PPIDE_DEV2M ; PARTNER ; - .ECHO "PPIDE: IO=" - .ECHO PPIDE2BASE - .ECHO ", SLAVE" - .ECHO "\n" + DEVECHO "PPIDE: IO=" + DEVECHO PPIDE2BASE + DEVECHO ", SLAVE" + DEVECHO "\n" ; #ENDIF ; diff --git a/Source/HBIOS/ppk.asm b/Source/HBIOS/ppk.asm index 3c8dbb0a..50ac9a98 100644 --- a/Source/HBIOS/ppk.asm +++ b/Source/HBIOS/ppk.asm @@ -60,7 +60,7 @@ PPK_REPEAT .DB 0 ; CURRENT REPEAT RATE PPK_IDLE .DB 0 ; IDLE COUNT PPK_WAITTO .DW 0 ; TIMEOUT WAIT LOOP COUNT (COMPUTED IN INIT) ; - .ECHO "PPK: ENABLED\n" + DEVECHO "PPK: ENABLED\n" ; ;__________________________________________________________________________________________________ ; KEYBOARD INITIALIZATION diff --git a/Source/HBIOS/ppp.asm b/Source/HBIOS/ppp.asm index 2ebcad99..9b1c1301 100644 --- a/Source/HBIOS/ppp.asm +++ b/Source/HBIOS/ppp.asm @@ -9,9 +9,9 @@ PPP_IO .EQU PPPBASE + 0 ; PPP DATA I/O (PPI PORT A) PPP_CTL .EQU PPPBASE + 2 ; PPP CTL LINES (PPI PORT C) PPP_PPICTL .EQU PPPBASE + 3 ; PPI CONTROL PORT ; - .ECHO "PPP: IO=" - .ECHO PPP_IO - .ECHO "\n" + DEVECHO "PPP: IO=" + DEVECHO PPP_IO + DEVECHO "\n" ; ; COMMAND BYTES ; @@ -253,7 +253,7 @@ PPP_FWVER .DB $00, $00, $00, $00 ; MMNNBBB (M=MAJOR, N=MINOR, B=BUILD) PPPCON_ROWS .EQU 29 ; PROPELLER VGA DISPLAY ROWS (30 - 1 STATUS LINES) PPPCON_COLS .EQU 80 ; PROPELLER VGA DISPLAY COLS ; - .ECHO "PPPCON: ENABLED\n" + DEVECHO "PPPCON: ENABLED\n" ; PPPCON_INIT: CALL NEWLINE @@ -420,7 +420,7 @@ PPPSD_CFGTBL: ; .DB $FF ; END MARKER ; - .ECHO "PPPSD: ENABLED\n" + DEVECHO "PPPSD: ENABLED\n" ; ; SD CARD INITIALIZATION ; diff --git a/Source/HBIOS/prp.asm b/Source/HBIOS/prp.asm index 38849dce..6cc98ff2 100644 --- a/Source/HBIOS/prp.asm +++ b/Source/HBIOS/prp.asm @@ -7,9 +7,9 @@ ; PRP_IOBASE .EQU $A8 ; - .ECHO "PRP: IO=" - .ECHO PRP_IOBASE - .ECHO "\n" + DEVECHO "PRP: IO=" + DEVECHO PRP_IOBASE + DEVECHO "\n" ; ; GLOBAL PROPIO INITIALIZATION ; @@ -124,7 +124,7 @@ PRPCON_DSPRDY .EQU $10 ; BIT SET WHEN DISPLAY BUF IS READY FOR A BYTE (BUF EMPT PRPCON_ROWS .EQU 29 ; PROPELLER VGA DISPLAY ROWS (30 - 1 STATUS LINES) PRPCON_COLS .EQU 80 ; PROPELLER VGA DISPLAY COLS ; - .ECHO "PRPCON: ENABLED\n" + DEVECHO "PRPCON: ENABLED\n" ; ; ; @@ -317,7 +317,7 @@ PRPSD_CFGTBL: ; .DB $FF ; END MARKER ; - .ECHO "PRPSD: ENABLED\n" + DEVECHO "PRPSD: ENABLED\n" ; ; SD CARD INITIALIZATION ; diff --git a/Source/HBIOS/rf.asm b/Source/HBIOS/rf.asm index 29d9dabc..cd804074 100644 --- a/Source/HBIOS/rf.asm +++ b/Source/HBIOS/rf.asm @@ -43,9 +43,9 @@ RF_CFGTBL: .DB 0 ; UNUSED .DB RF_U0IO ; DEVICE BASE ADDR ; - .ECHO "RF: IO=" - .ECHO RF_U0IO - .ECHO "\n" + DEVECHO "RF: IO=" + DEVECHO RF_U0IO + DEVECHO "\n" ; #IF (RF_DEVCNT > 1) ; DEVICE 1 @@ -56,9 +56,9 @@ RF_CFGTBL: .DB RF_U1IO ; DEVICE BASE ADDR #ENDIF ; - .ECHO "RF: IO=" - .ECHO RF_U1IO - .ECHO "\n" + DEVECHO "RF: IO=" + DEVECHO RF_U1IO + DEVECHO "\n" ; #IF (RF_DEVCNT > 2) ; DEVICE 2 @@ -69,9 +69,9 @@ RF_CFGTBL: .DB RF_U2IO ; DEVICE BASE ADDR #ENDIF ; - .ECHO "RF: IO=" - .ECHO RF_U2IO - .ECHO "\n" + DEVECHO "RF: IO=" + DEVECHO RF_U2IO + DEVECHO "\n" ; #IF (RF_DEVCNT > 3) ; DEVICE 3 @@ -81,9 +81,9 @@ RF_CFGTBL: .DB 0 ; UNUSED .DB RF_U3IO ; DEVICE BASE ADDR ; - .ECHO "RF: IO=" - .ECHO RF_U3IO - .ECHO "\n" + DEVECHO "RF: IO=" + DEVECHO RF_U3IO + DEVECHO "\n" ; #ENDIF ; diff --git a/Source/HBIOS/romldr.asm b/Source/HBIOS/romldr.asm index 611a50cf..4d4395d8 100644 --- a/Source/HBIOS/romldr.asm +++ b/Source/HBIOS/romldr.asm @@ -148,7 +148,7 @@ start: ld bc,$01FB ; UNA func: set bank ld de,BID_USR ; select user bank rst 08 ; do it - ld (bid_ldr),de ; ... for later + ld (bid_ldr),de ; save previous bank for later bit 7,d ; starting from ROM? #endif ; @@ -156,6 +156,8 @@ start: ld hl,ra_tbl ; assume ROM startup jr z,start1 ; if so, ra_tbl OK, skip ahead ld hl,ra_tbl_app ; not ROM boot, get app tbl loc + ld a,$ff ; signal for app boot + ld (appboot),a ; ... goes in flag start1: ld (ra_tbl_loc),hl ; and overlay pointer ; @@ -206,6 +208,10 @@ start1: call nl2 ; formatting ld hl,str_banner ; display boot banner call pstr ; do it + ld a,(appboot) ; get app boot flag + or a ; set flags + ld hl,str_appboot ; signal application boot mode + call nz,pstr ; print if app boot active call clrbuf ; zero fill the cmd buffer ; #if ((BIOS == BIOS_WBW) & FPSW_ENABLE) @@ -398,7 +404,6 @@ conpoll4: ;======================================================================= ; concmd: - call clrled ; clear LEDs ; #if (DSKYENABLE) call dsky_highlightkeysoff @@ -617,7 +622,6 @@ fp_flopboot2: #if (DSKYENABLE) ; dskycmd: - call clrled ; clear LEDs ; call dsky_getkey ; get DSKY key ld a,e ; put in A @@ -1474,32 +1478,6 @@ str_s100con .db "\r\n\r\nConsole on S100 Bus",0 ; Utility functions ;======================================================================= ; -; Clear LEDs -; -clrled: -#if (BIOS == BIOS_WBW) - #if (FPLED_ENABLE) - ld b,BF_SYSSET ; HBIOS SysGet - ld c,BF_SYSSET_PANEL ; ... Panel swiches value - ld l,$00 ; all LEDs off - rst 08 ; do it - #endif - #if (LEDENABLE) - #if (LEDMODE == LEDMODE_STD) - ld a,$FF ; led is inverted - out (LEDPORT),a ; clear led - #endif - #if (LEDMODE == LEDMODE_RTC) - ; Bits 0 and 1 of the RTC latch are for the LEDs. - ld a,(HB_RTCVAL) - and ~%00000011 - out (RTCIO),a ; clear led - ld (HB_RTCVAL),a - #endif - #endif -#endif - ret -; ; Print string at HL on console, null terminated ; pstr: @@ -2315,6 +2293,7 @@ acmd_to .dw BOOT_TIMEOUT ; auto cmd timeout ;======================================================================= ; str_banner .db PLATFORM_NAME," Boot Loader",0 +str_appboot .db " (App Boot)",0 str_autoboot .db "AutoBoot: ",0 str_prompt .db "Boot [H=Help]: ",0 str_bs .db bs,' ',bs,0 @@ -2430,7 +2409,7 @@ ra_ent .equ 12 ; be pre-loaded into the currently executing ram bank thereby allowing ; those images to be dynamically loaded as well. To support this ; concept, a pseudo-bank called bid_cur is used to specify the images -; normally found in BID_IMG0. In romload, this special value will cause +; normally found in BID_IMG0. This special value will cause ; the associated image to be loaded from the currently executing bank ; which will be correct regardless of the load mode. Images in other ; banks (BID_IMG1) will always be loaded directly from ROM. @@ -2509,6 +2488,7 @@ dma .dw 0 ; address for load sps .dw 0 ; sectors per slice mediaid .db 0 ; media id ; +appboot .db 0 ; app boot if != 0 ra_tbl_loc .dw 0 ; points to active ra_tbl bootunit .db 0 ; boot disk unit bootslice .db 0 ; boot disk slice diff --git a/Source/HBIOS/rp5rtc.asm b/Source/HBIOS/rp5rtc.asm index fe1d5e90..66753fcc 100644 --- a/Source/HBIOS/rp5rtc.asm +++ b/Source/HBIOS/rp5rtc.asm @@ -55,9 +55,9 @@ MODE_RAM1 .EQU 3 MD_TIME .EQU 8 MD_ALRM .EQU 4 - .ECHO "RP5C01: IO=" - .ECHO RP5RTC_REG - .ECHO "\n" + DEVECHO "RP5C01: IO=" + DEVECHO RP5RTC_REG + DEVECHO "\n" RP5RTC_INIT: LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? diff --git a/Source/HBIOS/scon.asm b/Source/HBIOS/scon.asm index 749175bb..1d3b4a5d 100644 --- a/Source/HBIOS/scon.asm +++ b/Source/HBIOS/scon.asm @@ -16,9 +16,9 @@ SCON_DSPRDY .EQU %00000100 SCON_COLS .EQU 80 SCON_ROWS .EQU 40 ; - .ECHO "SCON: IO=" - .ECHO SCON_IOBASE - .ECHO "\n" + DEVECHO "SCON: IO=" + DEVECHO SCON_IOBASE + DEVECHO "\n" ; ; ; diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm index 88904021..f96abca5 100644 --- a/Source/HBIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -117,7 +117,7 @@ SD_NOPULLUP .EQU TRUE ; ASSUME NO PULLUP ; SD_DEVCNT .EQU SDCNT ; SET SD_DEVCNT TO SDCNT CONFIG VAR ; - .ECHO "SD: MODE=" + DEVECHO "SD: MODE=" ; #IF (SDMODE == SDMODE_JUHA) ; JUHA MINI-BOARD SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS) @@ -131,7 +131,7 @@ SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU) SD_DO .EQU %10000000 ; RTC:7 IS DATA OUT (CARD -> CPU) SD_IOBASE .EQU SD_OPRREG ; IOBASE SD_INVCS .EQU FALSE ; INVERT CS - .ECHO "JUHA" + DEVECHO "JUHA" ; RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE #ENDIF @@ -148,7 +148,7 @@ SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU) SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU) SD_IOBASE .EQU SD_OPRREG ; IOBASE SD_INVCS .EQU FALSE ; INVERT CS - .ECHO "N8" + DEVECHO "N8" ; RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE #ENDIF @@ -163,7 +163,7 @@ SD_CNTR .EQU Z180_CNTR SD_TRDR .EQU Z180_TRDR SD_IOBASE .EQU SD_OPRREG ; IOBASE SD_INVCS .EQU FALSE ; INVERT CS - .ECHO "CSIO" + DEVECHO "CSIO" ; RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE #ENDIF @@ -184,7 +184,7 @@ SD_DI .EQU %00000001 ; PPIC:0 IS DATA IN (CARD <- CPU) SD_DO .EQU %10000000 ; PPIB:7 IS DATA OUT (CARD -> CPU) SD_IOBASE .EQU SD_PPIBASE ; IOBASE SD_INVCS .EQU TRUE ; INVERT CS - .ECHO "PPI" + DEVECHO "PPI" #ENDIF ; #IF (SDMODE == SDMODE_UART) @@ -199,7 +199,7 @@ SD_DI .EQU %00000001 ; UART MCR:0 IS DATA IN (CARD <- CPU) SD_DO .EQU %00100000 ; UART MSR:5 IS DATA OUT (CARD -> CPU) SD_IOBASE .EQU UARTIOB ; IOBASE SD_INVCS .EQU TRUE ; INVERT CS - .ECHO "UART" + DEVECHO "UART" #ENDIF ; #IF (SDMODE == SDMODE_DSD) ; DUAL SD @@ -215,7 +215,7 @@ SD_DI .EQU %00000001 ; RTC:6 IS DATA IN (CARD <- CPU) SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU) SD_IOBASE .EQU SD_OPRREG ; IOBASE SD_INVCS .EQU FALSE ; INVERT CS - .ECHO "DSD" + DEVECHO "DSD" #ENDIF ; #IF (SDMODE == SDMODE_MK4) ; MARK IV (CSIO STYLE INTERFACE) @@ -227,7 +227,7 @@ SD_CNTR .EQU Z180_CNTR SD_TRDR .EQU Z180_TRDR SD_IOBASE .EQU SD_OPRREG ; IOBASE SD_INVCS .EQU FALSE ; INVERT CS - .ECHO "MK4" + DEVECHO "MK4" #ENDIF ; #IF (SDMODE == SDMODE_SC) ; SC @@ -241,16 +241,10 @@ SD_CNTR .EQU Z180_CNTR SD_TRDR .EQU Z180_TRDR SD_IOBASE .EQU SD_OPRREG ; IOBASE SD_INVCS .EQU TRUE ; INVERT CS - .ECHO "SC" + DEVECHO "SC" ; RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE #ENDIF -; - .ECHO ", IO=" - .ECHO SD_IOBASE - .ECHO ", UNITS=" - .ECHO SDCNT - .ECHO "\n" ; #IF (SDMODE == SDMODE_MT) ; MT shift register for RCBUS (ref SDMODE_CSIO) ; @@ -300,6 +294,7 @@ SD_CS1 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present #ENDIF SD_IOBASE .EQU SD_BASE ; IOBASE SD_INVCS .EQU FALSE ; INVERT CS + DEVECHO "DUO" #ENDIF ; ; @@ -332,6 +327,7 @@ SD_CINIT .EQU TRUE ; INITIALIZE OUTPUT PORT SD_DDR .EQU $6B ; DATA DIRECTION REGISTER SD_DDRVAL .EQU %11100110 ; DATA DIRECTION REGISTER VALUE SD_INVCS .EQU TRUE ; INVERT CS + DEVECHO "PIO" #ENDIF ; ; @@ -355,6 +351,7 @@ SD_CINIT .EQU TRUE ; INITIALIZE OUTPUT PORT SD_DDR .EQU $03 ; DATA DIRECTION REGISTER SD_DDRVAL .EQU %00001101 ; DATA DIRECTION REGISTER VALUE SD_INVCS .EQU FALSE ; INVERT CS + DEVECHO "USR" #ENDIF ; #IF (SDMODE == SDMODE_Z80R) ; Z80 Retro @@ -376,6 +373,7 @@ SD_DI .EQU %00000001 ; DATA IN (CARD <- CPU) MOSI SD_DO .EQU %00000001 ; DATA OUT (CARD -> CPU) MISO SD_CINIT .EQU FALSE ; INITIALIZE OUTPUT PORT SD_INVCS .EQU FALSE ; INVERT CS + DEVECHO "Z80R" #ENDIF ; FOR NOW WE JUST HOOK UP ONE UNIT. THERE ARE EIGHT PORTS FOR DIFFERENT @@ -389,7 +387,14 @@ SD_CNTR .EQU Z180_CNTR SD_TRDR .EQU Z180_TRDR SD_IOBASE .EQU SD_OPRREG ; IOBASE SD_INVCS .EQU FALSE ; INVERT CS + DEVECHO "EPITX" #ENDIF +; + DEVECHO ", IO=" + DEVECHO SD_IOBASE + DEVECHO ", UNITS=" + DEVECHO SDCNT + DEVECHO "\n" ; #IF (SD_DEVCNT > SD_DEVMAX) .ECHO "*** ERROR: SDCNT EXCEEDS MAXIMUM SUPPORTED BY INTERFACE!!!\n" diff --git a/Source/HBIOS/simrtc.asm b/Source/HBIOS/simrtc.asm index 69943d35..17cc2c3d 100644 --- a/Source/HBIOS/simrtc.asm +++ b/Source/HBIOS/simrtc.asm @@ -8,9 +8,9 @@ SIMRTC_CLKREAD .EQU 7 ; READ CLOCK COMMAND SIMRTC_CLKWRITE .EQU 8 ; WRITE CLOCK COMMAND SIMRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS) ; - .ECHO "SIMRTC: IO=" - .ECHO SIMRTC_IO - .ECHO "\n" + DEVECHO "SIMRTC: IO=" + DEVECHO SIMRTC_IO + DEVECHO "\n" ; ; RTC DEVICE INITIALIZATION ENTRY ; diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm index 3cf5a52b..0274a66e 100644 --- a/Source/HBIOS/sio.asm +++ b/Source/HBIOS/sio.asm @@ -1171,30 +1171,30 @@ SIO0A_CFG: .DB SIO0ACTCC ; CTC CHANNEL .DB SIO0MODE ; MODE ; - .ECHO "SIO MODE=" + DEVECHO "SIO MODE=" #IF (SIO0MODE == SIOMODE_STD) - .ECHO "STD" + DEVECHO "STD" #ENDIF #IF (SIO0MODE == SIOMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF #IF (SIO0MODE == SIOMODE_SMB) - .ECHO "SMB" + DEVECHO "SMB" #ENDIF #IF (SIO0MODE == SIOMODE_ZP) - .ECHO "ZP" + DEVECHO "ZP" #ENDIF #IF (SIO0MODE == SIOMODE_Z80R) - .ECHO "Z80R" + DEVECHO "Z80R" #ENDIF - .ECHO ", IO=" - .ECHO SIO0BASE - .ECHO ", CHANNEL A" + DEVECHO ", IO=" + DEVECHO SIO0BASE + DEVECHO ", CHANNEL A" #IF (INTMODE > 0) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; SIO_CFGSIZ .EQU $ - SIO_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -1212,29 +1212,29 @@ SIO0B_CFG: .DB SIO0BCTCC ; CTC CHANNEL .DB SIO0MODE ; MODE ; - .ECHO "SIO MODE=" + DEVECHO "SIO MODE=" #IF (SIO0MODE == SIOMODE_STD) - .ECHO "STD" + DEVECHO "STD" #ENDIF #IF (SIO0MODE == SIOMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF #IF (SIO0MODE == SIOMODE_SMB) - .ECHO "SMB" + DEVECHO "SMB" #ENDIF #IF (SIO0MODE == SIOMODE_ZP) - .ECHO "ZP" + DEVECHO "ZP" #ENDIF #IF (SIO0MODE == SIOMODE_Z80R) - .ECHO "Z80R" + DEVECHO "Z80R" #ENDIF - .ECHO ", IO=" - .ECHO SIO0BASE - .ECHO ", CHANNEL B" + DEVECHO ", IO=" + DEVECHO SIO0BASE + DEVECHO ", CHANNEL B" #IF (INTMODE > 0) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; #IF (SIOCNT >= 2) ; @@ -1252,30 +1252,30 @@ SIO1A_CFG: .DB SIO1ACTCC ; CTC CHANNEL .DB SIO1MODE ; MODE ; - .ECHO "SIO MODE=" + DEVECHO "SIO MODE=" #IF (SIO1MODE == SIOMODE_STD) - .ECHO "STD" + DEVECHO "STD" #ENDIF #IF (SIO1MODE == SIOMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF #IF (SIO1MODE == SIOMODE_SMB) - .ECHO "SMB" + DEVECHO "SMB" #ENDIF #IF (SIO1MODE == SIOMODE_ZP) - .ECHO "ZP" + DEVECHO "ZP" #ENDIF #IF (SIO1MODE == SIOMODE_Z80R) - .ECHO "Z80R" + DEVECHO "Z80R" #ENDIF - .ECHO ", IO=" - .ECHO SIO1BASE - .ECHO ", CHANNEL A" + DEVECHO ", IO=" + DEVECHO SIO1BASE + DEVECHO ", CHANNEL A" #IF (INTMODE > 0) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; ; SIO1 CHANNEL B SIO1B_CFG: @@ -1291,29 +1291,29 @@ SIO1B_CFG: .DB SIO1BCTCC ; CTC CHANNEL .DB SIO1MODE ; MODE ; - .ECHO "SIO MODE=" + DEVECHO "SIO MODE=" #IF (SIO1MODE == SIOMODE_STD) - .ECHO "STD" + DEVECHO "STD" #ENDIF #IF (SIO1MODE == SIOMODE_RC) - .ECHO "RC" + DEVECHO "RC" #ENDIF #IF (SIO1MODE == SIOMODE_SMB) - .ECHO "SMB" + DEVECHO "SMB" #ENDIF #IF (SIO1MODE == SIOMODE_ZP) - .ECHO "ZP" + DEVECHO "ZP" #ENDIF #IF (SIO1MODE == SIOMODE_Z80R) - .ECHO "Z80R" + DEVECHO "Z80R" #ENDIF - .ECHO ", IO=" - .ECHO SIO1BASE - .ECHO ", CHANNEL B" + DEVECHO ", IO=" + DEVECHO SIO1BASE + DEVECHO ", CHANNEL B" #IF (INTMODE > 0) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; #ENDIF ; diff --git a/Source/HBIOS/sn76489.asm b/Source/HBIOS/sn76489.asm index 413b0883..6f31de33 100644 --- a/Source/HBIOS/sn76489.asm +++ b/Source/HBIOS/sn76489.asm @@ -17,33 +17,33 @@ ;====================================================================== ; - .ECHO "SN76489 MODE=" + DEVECHO "SN76489 MODE=" ; #IF (SNMODE == SNMODE_VGM) SN76489_PORT_LEFT .EQU $C6 ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) SN76489_PORT_RIGHT .EQU $C7 ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT) - .ECHO "VGM" + DEVECHO "VGM" #ENDIF ; #IF (SNMODE == SNMODE_RC) SN76489_PORT_LEFT .EQU $FF ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) SN76489_PORT_RIGHT .EQU $FB ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT) - .ECHO "RC" + DEVECHO "RC" #ENDIF ; #IF (SNMODE == SNMODE_DUO) SN76489_PORT_LEFT .EQU $BE ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) SN76489_PORT_RIGHT .EQU $BF ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT) - .ECHO "RC" + DEVECHO "RC" #ENDIF ; - .ECHO ", IO_LEFT=" - .ECHO SN76489_PORT_LEFT - .ECHO ", IO_RIGHT=" - .ECHO SN76489_PORT_RIGHT - .ECHO ", CLOCK=" - .ECHO SN7CLK - .ECHO " HZ\n" + DEVECHO ", IO_LEFT=" + DEVECHO SN76489_PORT_LEFT + DEVECHO ", IO_RIGHT=" + DEVECHO SN76489_PORT_RIGHT + DEVECHO ", CLOCK=" + DEVECHO SN7CLK + DEVECHO " HZ\n" ; SN7_IDAT .EQU 0 SN7_TONECNT .EQU 3 ; COUNT NUMBER OF TONE CHANNELS diff --git a/Source/HBIOS/spk.asm b/Source/HBIOS/spk.asm index 780ca4b8..302a7990 100644 --- a/Source/HBIOS/spk.asm +++ b/Source/HBIOS/spk.asm @@ -41,9 +41,9 @@ SP_PENDING_PERIOD .DW SP_NOTE_C8 ; PENDING PERIOD (16 BITS) SP_PENDING_VOLUME .DB $FF ; PENDING VOL (8 BITS) SP_PENDING_DURATION .DW 0 ; PENDING DURATION (16 BITS) ; - .ECHO "SPK: IO=" - .ECHO RTCIO - .ECHO "\n" + DEVECHO "SPK: IO=" + DEVECHO RTCIO + DEVECHO "\n" ; ;====================================================================== ; DRIVER INITIALIZATION diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index 49d9f6d8..6ee025ce 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -22,16 +22,24 @@ ; 18. HEATH Les Bird's Heath Z80 Board ; 19. EPITX Alan Cox' Mini-ITX System ; 20. MON Jacques Pelletier's Monsputer - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; 21. STDZ180 Genesis Z180 System +; 22. NABU NABU w/ Les Bird's RomWBW Option Board ; -; INCLUDE VERSION +; INCLUDE BUILD VERSION ; #INCLUDE "../ver.inc" ; ADD BIOSVER ; FALSE .EQU 0 TRUE .EQU ~FALSE ; +; CONTROLS PRINTING OF SYSTEM INFORMATION IN ASSEMBLY OUTPUT +; +#IFDEF SYSINFO + #DEFINE SYSECHO .ECHO +#ELSE + #DEFINE SYSECHO \; +#ENDIF +; ; DEBUGGING OPTIONS ; USENONE .EQU 0 ; NO DEBUG @@ -145,7 +153,9 @@ CONBELL_IOBIT .EQU 2 ; LEDMODE_NONE .EQU 0 LEDMODE_STD .EQU 1 -LEDMODE_RTC .EQU 2 +LEDMODE_SC .EQU 2 +LEDMODE_RTC .EQU 3 +LEDMODE_NABU .EQU 4 ; ; DSKY MODE SELECTIONS ; @@ -216,6 +226,7 @@ AYMODE_MSX .EQU 5 ; RCBUS SOUND MODULE REV6 BY ED BRINDLEY ON Z80/Z180 AT MSX P AYMODE_LINC .EQU 6 ; LINC Z50 AY SOUND CARD AYMODE_MBC .EQU 7 ; MBC SOUND BOARD AYMODE_DUO .EQU 8 ; MBC SOUND BOARD +AYMODE_NABU .EQU 9 ; NABU BUILT-IN SOUND ; ; SN SOUND CHIP MODE SELECTIONS ; @@ -234,7 +245,9 @@ TMSMODE_MSX9958 .EQU 4 ; MSX PORTS, V9958 CHIP TMSMODE_MSXKBD .EQU 5 ; MSX PORTS + PS2 KEYBOARD TMSMODE_MBC .EQU 6 ; MBC V9938/58 VIDEO BOARD TMSMODE_COLECO .EQU 7 ; COLECOVISION PORT MAPPING -TMSMODE_DUO .EQU 8 ; COLECOVISION PORT MAPPING +TMSMODE_DUO .EQU 8 ; DUODYNE PORT MAPPING +TMSMODE_NABU40 .EQU 9 ; NABU V9918 + NABU KBD +TMSMODE_NABU80 .EQU 10 ; NABU V9958 + NABU KBD ; ; CVDU VIDEO MODE SELECTIONS ; @@ -469,6 +482,7 @@ TERMENABLE .EQU FALSE ; TERM PSEUDO DEVICE, WILL AUTO-ENABLE IF A VDA IS ENABLE ; KBDENABLE .EQU FALSE ; PS/2 KEYBOARD DRIVER PPKENABLE .EQU FALSE ; PPK KEYBOARD DRIVER +NABUKBENABLE .EQU FALSE ; NABU KEYBOARD DRIVER ; ; VIDEO MODES ; @@ -557,24 +571,20 @@ CPUKHZ .SET CPUKHZ / 2 ; Z180 PHI IS ALWAYS 1/2 OSC ; CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN MHZ ; - .ECHO "ASSUMED CPU SPEED: " - .ECHO CPUKHZ - .ECHO " KHZ\n" -; - .ECHO "INTERRUPTS: " + SYSECHO "INTERRUPTS: " #IF (INTMODE == 0) - .ECHO "NONE" + SYSECHO "NONE" #ENDIF #IF (INTMODE == 1) - .ECHO "MODE 1" + SYSECHO "MODE 1" #ENDIF #IF (INTMODE == 2) - .ECHO "MODE 2" + SYSECHO "MODE 2" #ENDIF #IF (INTMODE == 3) - .ECHO "MODE 3" + SYSECHO "MODE 3" #ENDIF - .ECHO "\n" + SYSECHO "\n" ; ; SYSTEM PERIODIC TIMER MODE ; @@ -587,110 +597,110 @@ TM_SIMH .EQU 3 TM_Z180 .EQU 4 TM_Z280 .EQU 5 ; - .ECHO "SYSTEM TIMER:" + SYSECHO "SYSTEM TIMER:" SYSTIM .EQU TM_NONE ; #IF (CTCENABLE & (INTMODE == 2)) #IF (CTCTIMER) SYSTIM .SET TM_CTC - .ECHO " CTC" + SYSECHO " CTC" #ENDIF #ENDIF ; #IF (TMSENABLE & (INTMODE == 1)) #IF (TMSTIMENABLE) SYSTIM .SET TM_TMS - .ECHO " TMS9918/V9958" + SYSECHO " TMS9918/V9958" #ENDIF #ENDIF ; #IF ((PLATFORM == PLT_SBC) & (INTMODE == 1)) #IF (HTIMENABLE) SYSTIM .SET TM_SIMH - .ECHO " SIMH" + SYSECHO " SIMH" #ENDIF #ENDIF ; #IF ((CPUFAM == CPU_Z180) & (INTMODE == 2)) #IF (Z180_TIMER) SYSTIM .SET TM_Z180 - .ECHO " Z180" + SYSECHO " Z180" #ENDIF #ENDIF ; #IF ((CPUFAM == CPU_Z280) & (MEMMGR == MM_Z280)) #IF (Z280_TIMER) SYSTIM .SET TM_Z280 - .ECHO " Z280" + SYSECHO " Z280" #ENDIF #ENDIF ; #IF SYSTIM == TM_NONE - .ECHO " NONE" + SYSECHO " NONE" #ENDIF ; - .ECHO "\n" + SYSECHO "\n" ; #ENDIF ; #IF (BIOS == BIOS_WBW) - .ECHO "DEFAULT SERIAL CONFIGURATION: " + SYSECHO "DEFAULT SERIAL CONFIGURATION: " #IF ((DEFSERCFG & %1111100000000) == SER_BAUD9600 - .ECHO "9600" + SYSECHO "9600" #ENDIF #IF ((DEFSERCFG & %1111100000000) == SER_BAUD38400 - .ECHO "38400" + SYSECHO "38400" #ENDIF #IF ((DEFSERCFG & %1111100000000) == SER_BAUD57600 - .ECHO "57600" + SYSECHO "57600" #ENDIF #IF ((DEFSERCFG & %1111100000000) == SER_BAUD115200 - .ECHO "115200" + SYSECHO "115200" #ENDIF - .ECHO " BAUD\n" + SYSECHO " BAUD\n" #ENDIF ; ; ; #IF (BIOS == BIOS_WBW) - .ECHO "MEMORY MANAGER: " + SYSECHO "MEMORY MANAGER: " #IF (MEMMGR == MM_SBC) - .ECHO "N8VEM (SBC)" + SYSECHO "N8VEM (SBC)" #ENDIF #IF (MEMMGR == MM_Z2) - .ECHO "ZETA 2 (Z2)" + SYSECHO "ZETA 2 (Z2)" #ENDIF #IF (MEMMGR == MM_N8) - .ECHO "N8 ONBOARD (N8)" + SYSECHO "N8 ONBOARD (N8)" #ENDIF #IF (MEMMGR == MM_Z180) - .ECHO "Z180 NATIVE (Z180)" + SYSECHO "Z180 NATIVE (Z180)" #ENDIF #IF (MEMMGR == MM_Z280) - .ECHO "Z280 NATIVE (Z280)" + SYSECHO "Z280 NATIVE (Z280)" #ENDIF #IF (MEMMGR == MM_ZRC) - .ECHO "ZRC ONBOARD (ZRC)" + SYSECHO "ZRC ONBOARD (ZRC)" #ENDIF #IF (MEMMGR == MM_MBC) - .ECHO "NHYODYNE (MBC)" + SYSECHO "NHYODYNE (MBC)" #ENDIF #IF (MEMMGR == MM_RPH) - .ECHO "RHYOPHYRE ONBOARD (RPH)" + SYSECHO "RHYOPHYRE ONBOARD (RPH)" #ENDIF #IF (MEMMGR == MM_MON) - .ECHO "MONSPUTER ONBOARD (MON)" + SYSECHO "MONSPUTER ONBOARD (MON)" #ENDIF - .ECHO "\n" + SYSECHO "\n" #ENDIF ; - .ECHO "ROM SIZE: " - .ECHO ROMSIZE - .ECHO " KB\n" + SYSECHO "ROM SIZE: " + SYSECHO ROMSIZE + SYSECHO " KB\n" ; - .ECHO "RAM SIZE: " - .ECHO RAMSIZE - .ECHO " KB\n" + SYSECHO "RAM SIZE: " + SYSECHO RAMSIZE + SYSECHO " KB\n" ; ; MEMORY BANK CONFIGURATION ; @@ -825,11 +835,26 @@ BID_ROMD0 .EQU 0 ; NO ROM DRIVE ; #ENDIF ; +#IF ((!MDRAM) | (RAMD_BNKS <= 0)) +BID_RAMD0 .SET $FF +MDRAM .SET FALSE +#ENDIF +; +#IF ((!MDROM) | (ROMD_BNKS <= 0)) +BID_ROMD0 .SET $FF +MDROM .SET FALSE +#ENDIF +; APP_BNKS .SET BID_BUF - BID_APP0 ; -BID_RAMDN .EQU BID_RAMD0 + RAMD_BNKS - 1 ; LAST RAM DRIVE BANK -BID_ROMDN .EQU BID_ROMD0 + ROMD_BNKS - 1 ; LAST ROM DRIVE BANK -BID_APPN .EQU BID_APP0 + APP_BNKS - 1 ; LAST APP BANK +#IF (APP_BNKS <= 0) +BID_APP0 .SET $FF +APP_BNKS .SET 0 +#ENDIF +; +;;;BID_RAMDN .EQU BID_RAMD0 + RAMD_BNKS - 1 ; LAST RAM DRIVE BANK +;;;BID_ROMDN .EQU BID_ROMD0 + ROMD_BNKS - 1 ; LAST ROM DRIVE BANK +;;;BID_APPN .EQU BID_APP0 + APP_BNKS - 1 ; LAST APP BANK ; #IF TRUE .ECHO "------------- CAPACITY -----------------\n" @@ -849,12 +874,12 @@ BID_APPN .EQU BID_APP0 + APP_BNKS - 1 ; LAST APP BANK .ECHO "BID_IMG1: " \ .ECHO BID_IMG1 \ .ECHO "\n" .ECHO "BID_IMG2: " \ .ECHO BID_IMG2 \ .ECHO "\n" .ECHO "BID_ROMD0: " \ .ECHO BID_ROMD0 \ .ECHO "\n" - .ECHO "BID_ROMDN: " \ .ECHO BID_ROMDN \ .ECHO "\n" +;;; .ECHO "BID_ROMDN: " \ .ECHO BID_ROMDN \ .ECHO "\n" .ECHO "BID_BIOS: " \ .ECHO BID_BIOS \ .ECHO "\n" .ECHO "BID_RAMD0: " \ .ECHO BID_RAMD0 \ .ECHO "\n" - .ECHO "BID_RAMDN: " \ .ECHO BID_RAMDN \ .ECHO "\n" +;;; .ECHO "BID_RAMDN: " \ .ECHO BID_RAMDN \ .ECHO "\n" .ECHO "BID_APP0: " \ .ECHO BID_APP0 \ .ECHO "\n" - .ECHO "BID_APPN: " \ .ECHO BID_APPN \ .ECHO "\n" +;;; .ECHO "BID_APPN: " \ .ECHO BID_APPN \ .ECHO "\n" .ECHO "BID_BUF: " \ .ECHO BID_BUF \ .ECHO "\n" .ECHO "BID_AUX: " \ .ECHO BID_AUX \ .ECHO "\n" .ECHO "BID_USR: " \ .ECHO BID_USR \ .ECHO "\n" @@ -982,17 +1007,6 @@ INT_SIO1 .EQU 14 ; ZILOG SIO 1, CHANNEL A & B #IF (PLATFORM == PLT_MBC) ; -; MBC IM2 PINHEADER INTERRUPTS -; -;INT_IM2PH0 .EQU 0 -;INT_IM2PH1 .EQU 1 -;INT_IM2PH2 .EQU 2 -;INT_IM2PH3 .EQU 3 -;INT_IM2PH4 .EQU 4 -;INT_IM2PH5 .EQU 5 -;INT_IM2PH6 .EQU 6 -;INT_IM2PH7 .EQU 7 -; ; MBC Z80 INTERRUPTS ; ;INT_CTC0A .EQU 0 ; ZILOG CTC 0, CHANNEL A @@ -1017,17 +1031,6 @@ INT_CTC0D .EQU 15 ; ZILOG CTC 0, CHANNEL D #ENDIF #IF (PLATFORM == PLT_DUO) - -; DUO IM2 PINHEADER INTERRUPTS - -;INT_IM2PH0 .EQU 0 -;INT_IM2PH1 .EQU 1 -;INT_IM2PH2 .EQU 2 -;INT_IM2PH3 .EQU 3 -;INT_IM2PH4 .EQU 4 -;INT_IM2PH5 .EQU 5 -;INT_IM2PH6 .EQU 6 -;INT_IM2PH7 .EQU 7 ; ; DUO Z80 IM2 INTERRUPTS ; @@ -1046,7 +1049,22 @@ INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B #ENDIF - #IF ((PLATFORM != PLT_MBC) & (PLATFORM != PLT_DUO)) + #IF (PLATFORM == PLT_NABU) +; +; NABU Z80 IM2 INTERRUPTS +; +INT_HCAARCV .EQU 0 ; UART 0 +INT_HCAASND .EQU 1 ; UART 1 ????? +INT_NABUKB .EQU 2 ; ZILOG CTC 0, CHANNEL A +INT_VDP .EQU 3 ; ZILOG CTC 0, CHANNEL B +INT_OPTCRD0 .EQU 4 ; ZILOG CTC 0, CHANNEL C +INT_OPTCRD1 .EQU 5 ; ZILOG CTC 0, CHANNEL D +INT_OPTCRD2 .EQU 6 ; ZILOG SIO 0, CHANNEL A & B +INT_OPTCRD3 .EQU 7 ; ZILOG SIO 1, CHANNEL A & B + + #ENDIF + + #IF ((PLATFORM != PLT_MBC) & (PLATFORM != PLT_DUO) & (PLATFORM != PLT_NABU)) ; GENERIC Z80 M2 INTERRUPTS @@ -1082,6 +1100,8 @@ Z180_CNTR_DEF .EQU $06 ; DEFAULT VALUE FOR Z180 CSIO CONFIG ; ; HELPER MACROS ; +#DEFINE ALIGN(N) .FILL ((($+(N-1)) & ~(N-1)) - $) +; #DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') #DEFINE PRTS(S) CALL PRTSTRD \ .TEXT S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") #DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) diff --git a/Source/HBIOS/syq.asm b/Source/HBIOS/syq.asm index 824d3bed..a913ddf7 100644 --- a/Source/HBIOS/syq.asm +++ b/Source/HBIOS/syq.asm @@ -1447,16 +1447,16 @@ SYQ0_CFG: ; DEVICE 0 .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA ; - .ECHO "SYQ: MODE=" + DEVECHO "SYQ: MODE=" #IF (SYQMODE == SYQMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (SYQMODE == SYQMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO SYQ0BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO SYQ0BASE + DEVECHO "\n" #ENDIF ; #IF (SYQCNT >= 2) @@ -1469,16 +1469,16 @@ SYQ1_CFG: ; DEVICE 1 .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA ; - .ECHO "SYQ: MODE=" + DEVECHO "SYQ: MODE=" #IF (SYQMODE == SYQMODE_SPP) - .ECHO "SPP" + DEVECHO "SPP" #ENDIF #IF (SYQMODE == SYQMODE_MG014) - .ECHO "MG014" + DEVECHO "MG014" #ENDIF - .ECHO ", IO=" - .ECHO SYQ1BASE - .ECHO "\n" + DEVECHO ", IO=" + DEVECHO SYQ1BASE + DEVECHO "\n" #ENDIF ; #IF ($ - SYQ_CFG) != (SYQCNT * SYQ_CFGSIZ) diff --git a/Source/HBIOS/tms.asm b/Source/HBIOS/tms.asm index d0efcf93..7b0d7815 100644 --- a/Source/HBIOS/tms.asm +++ b/Source/HBIOS/tms.asm @@ -43,32 +43,24 @@ TMSCTRL1: .EQU 1 ; CONTROL BITS TMSINTEN: .EQU 5 ; INTERRUPT ENABLE BIT ; - .ECHO "TMS: MODE=" + DEVECHO "TMS: MODE=" ; #IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958)) TMS_DATREG .EQU $98 ; READ/WRITE DATA TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL -TMS_PPIA .EQU 0 ; PPI PORT A -TMS_PPIB .EQU 0 ; PPI PORT B -TMS_PPIC .EQU 0 ; PPI PORT C -TMS_PPIX .EQU 0 ; PPI CONTROL PORT ; #IF (TMSMODE == TMSMODE_MSX) - .ECHO "MSX" + DEVECHO "MSX" #ENDIF #IF (TMSMODE == TMSMODE_MSX9958) - .ECHO "MSX9958" + DEVECHO "MSX9958" #ENDIF #ENDIF ; #IF (TMSMODE == TMSMODE_COLECO) TMS_DATREG .EQU $BE ; READ/WRITE DATA TMS_CMDREG .EQU $BF ; READ STATUS / WRITE REG SEL -TMS_PPIA .EQU 0 ; PPI PORT A -TMS_PPIB .EQU 0 ; PPI PORT B -TMS_PPIC .EQU 0 ; PPI PORT C -TMS_PPIX .EQU 0 ; PPI CONTROL PORT - .ECHO "COLECO" + DEVECHO "COLECO" #ENDIF ; #IF (TMSMODE == TMSMODE_MSXKBD) @@ -76,7 +68,7 @@ TMS_DATREG .EQU $98 ; READ/WRITE DATA TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL TMS_KBDDATA .EQU $E0 ; KBD CTLR DATA PORT TMS_KBDST .EQU $E1 ; KBD CTLR STATUS/CMD PORT - .ECHO "MSXKBD" + DEVECHO "MSXKBD" #ENDIF ; #IF (TMSMODE == TMSMODE_N8) @@ -86,56 +78,56 @@ TMS_PPIA .EQU $84 ; PPI PORT A TMS_PPIB .EQU $85 ; PPI PORT B TMS_PPIC .EQU $86 ; PPI PORT C TMS_PPIX .EQU $87 ; PPI CONTROL PORT - .ECHO "N8" + DEVECHO "N8" #ENDIF ; #IF (TMSMODE == TMSMODE_SCG) TMS_DATREG .EQU $98 ; READ/WRITE DATA TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL TMS_ACR .EQU $9C ; AUX CONTROL REGISTER -TMS_PPIA .EQU 0 ; PPI PORT A -TMS_PPIB .EQU 0 ; PPI PORT B -TMS_PPIC .EQU 0 ; PPI PORT C -TMS_PPIX .EQU 0 ; PPI CONTROL PORT - .ECHO "SCG" + DEVECHO "SCG" #ENDIF ; #IF (TMSMODE == TMSMODE_MBC) TMS_DATREG .EQU $98 ; READ/WRITE DATA TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL TMS_ACR .EQU $9C ; AUX CONTROL REGISTER -TMS_PPIA .EQU 0 ; PPI PORT A -TMS_PPIB .EQU 0 ; PPI PORT B -TMS_PPIC .EQU 0 ; PPI PORT C -TMS_PPIX .EQU 0 ; PPI CONTROL PORT TMS_KBDDATA .EQU $E2 ; KBD CTLR DATA PORT TMS_KBDST .EQU $E3 ; KBD CTLR STATUS/CMD PORT - .ECHO "MBC" + DEVECHO "MBC" #ENDIF #IF (TMSMODE == TMSMODE_DUO) TMS_DATREG .EQU $A0 ; READ/WRITE DATA TMS_CMDREG .EQU $A1 ; READ STATUS / WRITE REG SEL TMS_ACR .EQU $A6 ; AUX CONTROL REGISTER -TMS_PPIA .EQU 0 ; PPI PORT A -TMS_PPIB .EQU 0 ; PPI PORT B -TMS_PPIC .EQU 0 ; PPI PORT C -TMS_PPIX .EQU 0 ; PPI CONTROL PORT TMS_KBDDATA .EQU $4C ; KBD CTLR DATA PORT TMS_KBDST .EQU $4D ; KBD CTLR STATUS/CMD PORT - .ECHO "DUO" + DEVECHO "DUO" #ENDIF ; - .ECHO ", IO=" - .ECHO TMS_DATREG -#IF TMSTIMENABLE - .ECHO ", INTERRUPTS ENABLED" +#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80)) +TMS_DATREG .EQU $A0 ; READ/WRITE DATA +TMS_CMDREG .EQU $A1 ; READ STATUS / WRITE REG SEL +; + #IF (TMSMODE == TMSMODE_NABU40) + DEVECHO "NABU-40" + #ENDIF + #IF (TMSMODE == TMSMODE_NABU80) + DEVECHO "NABU-80" + #ENDIF +#ENDIF +; + DEVECHO ", IO=" + DEVECHO TMS_DATREG +#IF (TMSTIMENABLE & (INTMODE > 0)) + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; TMS_ROWS .EQU 24 ; -#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO)) +#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO) | (TMSMODE == TMSMODE_NABU80)) TMS_FNTVADDR .EQU $1000 ; VRAM ADDRESS OF FONT DATA TMS_FNTSIZE .EQU 8*256 ; ### JLC Mod for JBL compatibility ### = 8x8 Font 256 Chars TMS_CHRVADDR .EQU $0000 ; VRAM ADDRESS OF CHAR SCREEN DATA (NEW CONSTANT) = REG2 * $400 @@ -162,6 +154,10 @@ PPKENABLE .SET TRUE ; INCLUDE PPK KEYBOARD SUPPORT KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT #ENDIF ; +#IF ((TMSMODE == TMSMODE_NABU40) |(TMSMODE == TMSMODE_NABU80)) +NABUKBENABLE .SET TRUE ; INCLUDE NABU KEYBOARD SUPPORT +#ENDIF +; ; TMS_IODELAY IS USED TO ADD RECOVERY TIME TO TMS9918/V9958 ACCESSES ; IF YOU SEE SCREEN CORRUPTION, ADJUST THIS!!! ; @@ -171,7 +167,7 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT ;#DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP ; 20 W/S ### JLC Mod for Clock/2 (9 MHz) ### #ELSE ; BELOW WAS TUNED FOR SBC AT 8MHZ - #IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO)) + #IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO) | (TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80)) #DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP ; V9958 NEEDS AT WORST CASE, APPROX 4us (28T) DELAY BETWEEN I/O (WHEN IN TEXT MODE) #ELSE #DEFINE TMS_IODELAY NOP \ NOP ; 8 W/S @@ -183,6 +179,9 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT ;====================================================================== ; TMS_PREINIT: +#IF (NABUKBENABLE == TRUE) + CALL NABUKB_PREINIT +#ENDIF ; DISABLE INTERRUPT GENERATION LD A, (TMS_INITVDU_REG_1) RES TMSINTEN, A ; RESET INTERRUPT ENABLE BIT @@ -234,6 +233,12 @@ TMS_INIT: #IF (TMSMODE == TMSMODE_MSX9958) PRTS("RC_V9958$") #ENDIF +#IF (TMSMODE == TMSMODE_NABU40) + PRTS("NABU-40$") +#ENDIF +#IF (TMSMODE == TMSMODE_NABU80) + PRTS("NABU-80$") +#ENDIF ; PRTS(" IO=0x$") LD A,TMS_DATREG @@ -259,18 +264,30 @@ TMS_INIT1: #IF MKYENABLE CALL MKY_INIT ; INITIALIZE MKY KEYBOARD DRIVER #ENDIF +#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80)) + CALL NABUKB_INIT ; INITIALIZE NABU KEYBOARD DRIVER +#ENDIF -#IF (INTMODE == 1 & TMSTIMENABLE) +#IF (TMSTIMENABLE & (INTMODE > 0)) +; + #IF (INTMODE == 1) ; ADD IM1 INT CALL LIST ENTRY - LD HL, TMS_TSTINT ; GET INT VECTOR + LD HL,TMS_TSTINT ; GET INT VECTOR CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST - + #ELSE + ; INSTALL VECTOR + LD HL,TMS_TSTINT + LD (IVT(INT_VDP)),HL ; IVT INDEX + #ENDIF +; LD A, (TMS_INITVDU_REG_1) SET TMSINTEN,A ; SET INTERRUPT ENABLE BIT LD (TMS_INITVDU_REG_1),A LD C, TMSCTRL1 CALL TMS_SET +; #ENDIF + ; ; ADD OURSELVES TO VDA DISPATCH TABLE LD BC,TMS_FNTBL ; BC := FUNCTION TABLE ADDRESS @@ -307,22 +324,26 @@ TMS_FNTBL: .DW PPK_STAT .DW PPK_FLUSH .DW PPK_READ -#ELSE - #IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO)) +#ENDIF +#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO)) .DW KBD_STAT .DW KBD_FLUSH .DW KBD_READ - #ELSE - #IF MKYENABLE +#ENDIF +#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80)) + .DW NABUKB_STAT + .DW NABUKB_FLUSH + .DW NABUKB_READ +#ENDIF +#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_SCG) | (TMSMODE == TMSMODE_COLECO)) + #IF MKYENABLE .DW MKY_STAT .DW MKY_FLUSH .DW MKY_READ - - #ELSE + #ELSE .DW TMS_STAT .DW TMS_FLUSH .DW TMS_READ - #ENDIF #ENDIF #ENDIF .DW TMS_VDARDC @@ -352,15 +373,11 @@ TMS_VDARES: CALL TMS_Z180IO #ENDIF CALL TMS_CRTINIT1A -#IF (!USELZSA2) - ; WE WANT TO RELOAD THE FONT ON RESET, BUT THIS IS NOT CURRENTLY - ; POSSIBLE WHEN FONT COMPRESSION IS IN USE. CALL TMS_CLRCUR ; CLEAR CURSOR CALL TMS_LOADFONT ; RELOAD FONT LD A,$FF ; REMOVE LD (TMS_CURSAV),A ; ... SAVED CURSOR CHAR CALL TMS_SETCUR ; RESTORE CURSOR -#ENDIF XOR A RET @@ -526,12 +543,14 @@ TMS_READ: ;---------------------------------------------------------------------- ; TMS_SET: + HB_DI OUT (TMS_CMDREG),A ; WRITE IT TMS_IODELAY LD A,C ; GET THE DESIRED REGISTER OR $80 ; SET BIT 7 OUT (TMS_CMDREG),A ; SELECT THE DESIRED REGISTER TMS_IODELAY + HB_EI RET ; ;---------------------------------------------------------------------- @@ -541,14 +560,16 @@ TMS_SET: ;---------------------------------------------------------------------- ; TMS_WR: -#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO)) +#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO) | (TMSMODE == TMSMODE_NABU80)) ; CLEAR R#14 FOR V9958 + HB_DI XOR A OUT (TMS_CMDREG), A TMS_IODELAY LD A, $80 | 14 OUT (TMS_CMDREG), A TMS_IODELAY + HB_EI #ENDIF PUSH HL @@ -558,12 +579,14 @@ TMS_WR: RET ; TMS_RD: + HB_DI LD A,L OUT (TMS_CMDREG),A TMS_IODELAY LD A,H OUT (TMS_CMDREG),A TMS_IODELAY + HB_EI RET ; ;---------------------------------------------------------------------- @@ -637,7 +660,7 @@ TMS_CRTINIT2: DJNZ TMS_CRTINIT2 ; LOOP ; ; ENABLE WAIT SIGNAL IF 9938/58 -#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO)) +#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO) | (TMSMODE == TMSMODE_NABU80)) LD C,25 ; REGISTER 25 LD A,%00000100 ; ONLY WTE BIT SET CALL TMS_SET ; DO IT @@ -672,8 +695,15 @@ TMS_LOADFONT: ; SET WRITE ADDRESS TO TMS_FNTVADDR LD HL,TMS_FNTVADDR CALL TMS_WR - -#IF USELZSA2 +; +; THE USE OF COMPRESSED FONT STORAGE FOR THE TMS DRIVER IS DISABLED +; SO THAT WE CAN RELOAD THE FONT DATA ON USER RESET. THE TMS CHIP +; IS FREQUENTLY REPROGRAMMED BY GAMES, ETC., SO IT IS NECESSARY TO +; REINIT AND RELOAD FONTS. RELOADING A COMPRESSED FONT AFTER +; SYSTEM INITIALIZATION REQUIRES A LARGE DECOMPRESSION BUFFER THAT WE +; HAVE NO WAY TO ACCOMMODATE WITHOUT TRASHING OS/APP MEMORY. +; +#IF USELZSA2 & FALSE LD (TMS_STACK),SP ; SAVE STACK LD HL,(TMS_STACK) ; AND SHIFT IT LD DE,$2000 ; DOWN 4KB TO @@ -701,7 +731,7 @@ TMS_LOADFONT1: OR E JR NZ,TMS_LOADFONT1 ; -#IF USELZSA2 +#IF USELZSA2 & FALSE LD HL,(TMS_STACK) ; ERASE DECOMPRESS BUFFER LD SP,HL ; BY RESTORING THE STACK RET ; DONE @@ -1030,11 +1060,11 @@ TMS_Z180IOX: ; #ENDIF -#IF (INTMODE == 1 & TMSTIMENABLE) +#IF (TMSTIMENABLE & (INTMODE > 0)) TMS_TSTINT: - IN A, (TMS_CMDREG) ; TEST FOR INT FLAG + IN A,(TMS_CMDREG) ; TEST FOR INT FLAG AND $80 - JR NZ, TMS_INTHNDL + JR NZ,TMS_INTHNDL AND $00 ; RETURN Z - NOT HANDLED RET @@ -1066,7 +1096,7 @@ TMS_COLOR_TBL .DB $01,$08,$02,$0A,$04,$06,$0C,$0F,$0E,$09,$03,$0B,$05,$0D,$07,$0 ;================================================================================================== ; TMS_IDAT: -#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_N8) | (TMSMODE == TMSMODE_SCG)) +#IF ((TMSMODE == TMSMODE_N8)) .DB TMS_PPIA ; PPI PORT A .DB TMS_PPIB ; PPI PORT B .DB TMS_PPIC ; PPI PORT C @@ -1078,6 +1108,9 @@ TMS_IDAT: .DB TMS_KBDDATA ; 8242 DATA PORT .DB 0 ; FILLER #ENDIF +#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_SCG) | (TMSMODE == TMSMODE_COLECO) | (TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80)) + .FILL 4,0 ; DUMMY KEYBOARD CONFIG DATA +#ENDIF ; .DB TMS_DATREG .DB TMS_CMDREG @@ -1124,7 +1157,7 @@ TMS_IDAT: ; 5S Fifth sprite (not displayed) detected. Value in FS* is valid. ; INT Set at each screen update, used for interrupts. ; -#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO)) +#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO) | (TMSMODE == TMSMODE_NABU80)) ; ; NOTE: YAMAHA 9938/58 DOCUMENTATION SAYS R3 IS SAME AS 9918 (ADR >> 10), ; BUT THIS SEEMS TO BE WRONG AND CORRECTLY DOCUMENTED AT diff --git a/Source/HBIOS/uart.asm b/Source/HBIOS/uart.asm index cd8fe8fb..bedf4487 100644 --- a/Source/HBIOS/uart.asm +++ b/Source/HBIOS/uart.asm @@ -57,7 +57,14 @@ UART_CTSBAD .EQU 4 ; CTS STALL DETECTED #IF (PLATFORM == PLT_DUO) UARTSBASE .EQU $58 UARTDBASE .EQU $70 -#ELSE +#ENDIF +; +#IF (PLATFORM == PLT_NABU) +UARTSBASE .EQU $48 +UARTDBASE .EQU $80 +#ENDIF +; +#IF ((PLATFORM != PLT_DUO) & (PLATFORM != PLT_NABU)) UARTSBASE .EQU $68 UARTDBASE .EQU $80 #ENDIF @@ -78,7 +85,6 @@ UART1_IVT .EQU IVT(INT_UART1) #ENDIF ; #ENDIF - ; #DEFINE UART_INP(RID) CALL UART_INP_IMP \ .DB RID #DEFINE UART_OUTP(RID) CALL UART_OUTP_IMP \ .DB RID @@ -1032,12 +1038,12 @@ UART_CFG_SBC: .DW UARTCFG ; LINE CONFIGURATION .DW UARTSBC_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "UART: MODE=SBC, IO=" - .ECHO UARTSBASE + DEVECHO "UART: MODE=SBC, IO=" + DEVECHO UARTSBASE #IF ((UARTINTS) & (INTMODE > 0)) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" #ENDIF #IF (UARTAUX) UART_CFG_AUX: @@ -1049,9 +1055,9 @@ UART_CFG_AUX: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; NO INT HANDLER ; - .ECHO "UART: MODE=AUX, IO=" - .ECHO UARTABASE - .ECHO "\n" + DEVECHO "UART: MODE=AUX, IO=" + DEVECHO UARTABASE + DEVECHO "\n" #ENDIF #IF (UARTCAS) UART_CFG_CAS: @@ -1063,12 +1069,12 @@ UART_CFG_CAS: .DW UARTCASSPD ; LINE CONFIGURATION .DW UARTCAS_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; - .ECHO "UART: MODE=CAS, IO=" - .ECHO UARTCBASE + DEVECHO "UART: MODE=CAS, IO=" + DEVECHO UARTCBASE #IF ((UARTINTS) & (INTMODE > 0)) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" #ENDIF #IF (UARTMFP) UART_CFG_MFP: @@ -1080,9 +1086,9 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=MFP, IO=" - .ECHO UARTSBASE - .ECHO "\n" + DEVECHO "UART: MODE=MFP, IO=" + DEVECHO UARTSBASE + DEVECHO "\n" #ENDIF #IF (UART4) ; 4UART SERIAL PORT A @@ -1093,9 +1099,9 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=4UART, IO=" - .ECHO UART4BASE+0 - .ECHO "\n" + DEVECHO "UART: MODE=4UART, IO=" + DEVECHO UART4BASE+0 + DEVECHO "\n" ; ; 4UART SERIAL PORT B .DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) @@ -1105,9 +1111,9 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=4UART, IO=" - .ECHO UART4BASE+8 - .ECHO "\n" + DEVECHO "UART: MODE=4UART, IO=" + DEVECHO UART4BASE+8 + DEVECHO "\n" ; ; 4UART SERIAL PORT C .DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) @@ -1117,9 +1123,9 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=4UART, IO=" - .ECHO UART4BASE+16 - .ECHO "\n" + DEVECHO "UART: MODE=4UART, IO=" + DEVECHO UART4BASE+16 + DEVECHO "\n" ; ; 4UART SERIAL PORT D .DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) @@ -1129,9 +1135,9 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=4UART, IO=" - .ECHO UART4BASE+24 - .ECHO "\n" + DEVECHO "UART: MODE=4UART, IO=" + DEVECHO UART4BASE+24 + DEVECHO "\n" #ENDIF #IF (UARTRC) ; UARTRC SERIAL PORT A @@ -1142,9 +1148,9 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=RC, IO=" - .ECHO UARTRBASE+0 - .ECHO "\n" + DEVECHO "UART: MODE=RC, IO=" + DEVECHO UARTRBASE+0 + DEVECHO "\n" ; ; UARTRC SERIAL PORT B .DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) @@ -1154,9 +1160,9 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=RC, IO=" - .ECHO UARTRBASE+8 - .ECHO "\n" + DEVECHO "UART: MODE=RC, IO=" + DEVECHO UARTRBASE+8 + DEVECHO "\n" ; #ENDIF #IF (UARTDUAL) @@ -1175,13 +1181,13 @@ UART_CFG_MFP: .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; - .ECHO "UART: MODE=DUAL, IO=" - .ECHO UARTDBASE+8 - .ECHO "\n" + DEVECHO "UART: MODE=DUAL, IO=" + DEVECHO UARTDBASE+8 + DEVECHO "\n" ; - .ECHO "UART: MODE=DUAL, IO=" - .ECHO UARTDBASE+0 - .ECHO "\n" + DEVECHO "UART: MODE=DUAL, IO=" + DEVECHO UARTDBASE+0 + DEVECHO "\n" ; #ENDIF ; diff --git a/Source/HBIOS/uf.asm b/Source/HBIOS/uf.asm index 328ac033..972ebe05 100644 --- a/Source/HBIOS/uf.asm +++ b/Source/HBIOS/uf.asm @@ -24,9 +24,9 @@ UF_USB_ACTIVE .DB 0 ; USB CABLE CONNECTED STATUS FLAG ; UF_CFG: .DW SER_9600_8N1 ; DUMMY CONFIGURATION ; - .ECHO "USB-FIFO: IO=" - .ECHO UFBASE - .ECHO "\n" + DEVECHO "USB-FIFO: IO=" + DEVECHO UFBASE + DEVECHO "\n" ; ; SETUP THE DISPATCH TABLE ENTRY AND INITIALIZE HARDWARE ; diff --git a/Source/HBIOS/vdu.asm b/Source/HBIOS/vdu.asm index faef9888..c97081d0 100644 --- a/Source/HBIOS/vdu.asm +++ b/Source/HBIOS/vdu.asm @@ -83,11 +83,11 @@ VDU_R10 .EQU (VDU_BLNK + DSCANL-1) VDU_R11 .EQU DSCANL-1 #ENDIF ; - .ECHO "VDU: IO=" - .ECHO VDU_RAMRD - .ECHO ", PPK IO=" - .ECHO VDU_PPIA - .ECHO "\n" + DEVECHO "VDU: IO=" + DEVECHO VDU_RAMRD + DEVECHO ", PPK IO=" + DEVECHO VDU_PPIA + DEVECHO "\n" ; ;====================================================================== ; VDU DRIVER - INITIALIZATION diff --git a/Source/HBIOS/vga.asm b/Source/HBIOS/vga.asm index cbe7f6fe..1b5e023b 100644 --- a/Source/HBIOS/vga.asm +++ b/Source/HBIOS/vga.asm @@ -21,13 +21,13 @@ VGA_HI .EQU VGA_BASE + $05 ; BOARD RAM HI ADDRESS VGA_LO .EQU VGA_BASE + $06 ; BOARD RAM LO ADDRESS VGA_DAT .EQU VGA_BASE + $07 ; BOARD RAM BYTE R/W ; - .ECHO "VGA: " - .ECHO "IO=" - .ECHO VGA_BASE - .ECHO ", KBD MODE=PS/2" - .ECHO ", KBD IO=" - .ECHO VGA_KBDDATA - .ECHO "\n" + DEVECHO "VGA: " + DEVECHO "IO=" + DEVECHO VGA_BASE + DEVECHO ", KBD MODE=PS/2" + DEVECHO ", KBD IO=" + DEVECHO VGA_KBDDATA + DEVECHO "\n" ; VGA_NOBL .EQU 00000000B ; NO BLINK VGA_NOCU .EQU 00100000B ; NO CURSOR @@ -546,7 +546,7 @@ VGA_LOADFONT: LD HL,$7000 | VGA_89BIT ; CLEAR FONT PAGE NUM CALL VGA_SETCFG -#IF USELZSA2 +#IF USELZSA2 & (VGASIZ != V80X60) LD (VGA_STACK),SP ; SAVE STACK LD HL,(VGA_STACK) ; AND SHIFT IT LD DE,$2000 ; DOWN 4KB TO @@ -583,7 +583,7 @@ VGA_LOADFONT2: LD HL,$7070 | VGA_89BIT ; SET FONT PAGE NUM TO 7 CALL VGA_SETCFG -#IF USELZSA2 +#IF USELZSA2 & (VGASIZ != V80X60) LD HL,(VGA_STACK) ; ERASE DECOMPRESS BUFFER LD SP,HL ; BY RESTORING THE STACK RET ; DONE diff --git a/Source/HBIOS/vrc.asm b/Source/HBIOS/vrc.asm index 51d50e63..73b748ce 100644 --- a/Source/HBIOS/vrc.asm +++ b/Source/HBIOS/vrc.asm @@ -27,12 +27,12 @@ VRC_COLS .EQU 64 TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT ; - .ECHO "VRC: IO=" - .ECHO VRC_BASE - .ECHO ", KBD MODE=VRC" - .ECHO ", KBD IO=" - .ECHO VRC_KBDDATA - .ECHO "\n" + DEVECHO "VRC: IO=" + DEVECHO VRC_BASE + DEVECHO ", KBD MODE=VRC" + DEVECHO ", KBD IO=" + DEVECHO VRC_KBDDATA + DEVECHO "\n" ; ;====================================================================== ; VRC DRIVER - INITIALIZATION diff --git a/Source/HBIOS/ym2612.asm b/Source/HBIOS/ym2612.asm index 936dabae..a4818364 100644 --- a/Source/HBIOS/ym2612.asm +++ b/Source/HBIOS/ym2612.asm @@ -39,9 +39,9 @@ YM_DEBUG .EQU 0 ; CHANGE TO 1 TO ENABLE DEBUGGING YM_RSTCFG .EQU 0 ; SET TO 1 FOR FULL REGISTER CLEAR YM_FAST3438 .EQU 0 ; FAST CPU'S WITH A YM3438 MAY REQUIRE A DELAY ; - .ECHO "YM: IO=" - .ECHO YMSEL - .ECHO "\n" + DEVECHO "YM: IO=" + DEVECHO YMSEL + DEVECHO "\n" ; ;------------------------------------------------------------------------------ ; Driver function table and instance data diff --git a/Source/HBIOS/z2u.asm b/Source/HBIOS/z2u.asm index 9e54ebb0..60100438 100644 --- a/Source/HBIOS/z2u.asm +++ b/Source/HBIOS/z2u.asm @@ -716,12 +716,12 @@ Z2U0_CFG: .DW Z2U0_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; ; - .ECHO "Z2U: IO=" - .ECHO Z2U0BASE + DEVECHO "Z2U: IO=" + DEVECHO Z2U0BASE #IF (INTMODE == 3) - .ECHO ", INTERRUPTS ENABLED" + DEVECHO ", INTERRUPTS ENABLED" #ENDIF - .ECHO "\n" + DEVECHO "\n" ; Z2U_CFGSIZ .EQU $ - Z2U_CFG ; SIZE OF ONE CFG TABLE ENTRY diff --git a/Source/Images/Common/All/CLRDIR.COM b/Source/Images/Common/All/CLRDIR.COM index 9c00904f..068bfb4c 100644 Binary files a/Source/Images/Common/All/CLRDIR.COM and b/Source/Images/Common/All/CLRDIR.COM differ diff --git a/Source/Images/Common/All/FLASH.COM b/Source/Images/Common/All/FLASH.COM index ab46a910..b14d74e3 100644 Binary files a/Source/Images/Common/All/FLASH.COM and b/Source/Images/Common/All/FLASH.COM differ diff --git a/Source/Images/Test/z80ccf.com b/Source/Images/Test/z80ccf.com index 5fa0532c..1bb50629 100644 Binary files a/Source/Images/Test/z80ccf.com and b/Source/Images/Test/z80ccf.com differ diff --git a/Source/Images/Test/z80doc.com b/Source/Images/Test/z80doc.com index 3f2af072..ea2cf521 100644 Binary files a/Source/Images/Test/z80doc.com and b/Source/Images/Test/z80doc.com differ diff --git a/Source/Images/Test/z80docf.com b/Source/Images/Test/z80docf.com index d5b7ac89..ddfdf53f 100644 Binary files a/Source/Images/Test/z80docf.com and b/Source/Images/Test/z80docf.com differ diff --git a/Source/Images/Test/z80flags.com b/Source/Images/Test/z80flags.com index 3965c583..18fb3ebe 100644 Binary files a/Source/Images/Test/z80flags.com and b/Source/Images/Test/z80flags.com differ diff --git a/Source/Images/Test/z80full.com b/Source/Images/Test/z80full.com index ff3a7677..4ef97c93 100644 Binary files a/Source/Images/Test/z80full.com and b/Source/Images/Test/z80full.com differ diff --git a/Source/Images/Test/z80mptr.com b/Source/Images/Test/z80mptr.com index 25eb3c89..8edc2d16 100644 Binary files a/Source/Images/Test/z80mptr.com and b/Source/Images/Test/z80mptr.com differ diff --git a/Source/RomDsk/ROM_128KB/CLRDIR.COM b/Source/RomDsk/ROM_128KB/CLRDIR.COM index 9c00904f..068bfb4c 100644 Binary files a/Source/RomDsk/ROM_128KB/CLRDIR.COM and b/Source/RomDsk/ROM_128KB/CLRDIR.COM differ diff --git a/Source/RomDsk/ROM_256KB/CLRDIR.COM b/Source/RomDsk/ROM_256KB/CLRDIR.COM index 9c00904f..068bfb4c 100644 Binary files a/Source/RomDsk/ROM_256KB/CLRDIR.COM and b/Source/RomDsk/ROM_256KB/CLRDIR.COM differ diff --git a/Source/RomDsk/ROM_256KB/FLASH.COM b/Source/RomDsk/ROM_256KB/FLASH.COM index ab46a910..b14d74e3 100644 Binary files a/Source/RomDsk/ROM_256KB/FLASH.COM and b/Source/RomDsk/ROM_256KB/FLASH.COM differ diff --git a/Source/RomDsk/ROM_384KB/CLRDIR.COM b/Source/RomDsk/ROM_384KB/CLRDIR.COM index 9c00904f..068bfb4c 100644 Binary files a/Source/RomDsk/ROM_384KB/CLRDIR.COM and b/Source/RomDsk/ROM_384KB/CLRDIR.COM differ diff --git a/Source/RomDsk/ROM_384KB/FAT.COM b/Source/RomDsk/ROM_384KB/FAT.COM index 004760fb..9c6d2f2c 100644 Binary files a/Source/RomDsk/ROM_384KB/FAT.COM and b/Source/RomDsk/ROM_384KB/FAT.COM differ diff --git a/Source/RomDsk/ROM_384KB/FLASH.COM b/Source/RomDsk/ROM_384KB/FLASH.COM index ab46a910..b14d74e3 100644 Binary files a/Source/RomDsk/ROM_384KB/FLASH.COM and b/Source/RomDsk/ROM_384KB/FLASH.COM differ diff --git a/Source/RomDsk/ROM_896KB/CLRDIR.COM b/Source/RomDsk/ROM_896KB/CLRDIR.COM index 9c00904f..068bfb4c 100644 Binary files a/Source/RomDsk/ROM_896KB/CLRDIR.COM and b/Source/RomDsk/ROM_896KB/CLRDIR.COM differ diff --git a/Source/RomDsk/ROM_896KB/FAT.COM b/Source/RomDsk/ROM_896KB/FAT.COM index 004760fb..9c6d2f2c 100644 Binary files a/Source/RomDsk/ROM_896KB/FAT.COM and b/Source/RomDsk/ROM_896KB/FAT.COM differ diff --git a/Source/RomDsk/ROM_896KB/FLASH.COM b/Source/RomDsk/ROM_896KB/FLASH.COM index ab46a910..b14d74e3 100644 Binary files a/Source/RomDsk/ROM_896KB/FLASH.COM and b/Source/RomDsk/ROM_896KB/FLASH.COM differ diff --git a/Source/RomDsk/ReadMe.txt b/Source/RomDsk/ReadMe.txt index 5fe0d7ed..c5fdee56 100644 --- a/Source/RomDsk/ReadMe.txt +++ b/Source/RomDsk/ReadMe.txt @@ -9,10 +9,15 @@ This is the parent directory for all files to be included in the ROM Disk when a ROM is built. -When constructing the ROM disk as part of a build, the build process +When constructing the ROM Disk as part of a build, the build process first grabs all of the "standard" files for the size of ROM being -built. So, if you are building a normal 512KB ROM, all of the files -in ROM_512KB directory will be pulled in. +built. Note the table at the bottom of this file which indicates +the size of the ROM Disk that will be created depending on +the size of your ROM chip and the boot type of your system. The +size of your ROM Disk determines which sub-folder will be used to +pull in your files. For example, if you are using a typical 512KB +ROM chip and a normal ROM Boot process, you will have a 384KB ROM +Disk and the files will come from the ROM_384KB sub-folder. You may freely add/delete/update the files in these directories to change the contents of the ROM Disk of your ROM firmware. @@ -27,16 +32,22 @@ BuildROM script: The resulting ROM Disk is still OK to use, but will not contain the file(s) that did not fit. -RomWBW also supports the concept of a "ROMless" system in which an -external bootstrap pre-loads the RAM. The RAM_xxxKB directories -contain the files to be used for such systems. Note the size of the -RAM disk on a 512KB ROMless system is not the same as the RAM disk -on a normal system. This is due to different bank layout and overhead. - -System ROM Disk Image RAM Disk Image ------- -------------- -------------- -128KB n/a n/a -256KB 128KB ROM Disk n/a -512KB 384KB ROM Disk 256KB RAM Disk -1024KB 896KB ROM Disk 768KB RAM Disk ??? -2048KB n/a 1792KB RAM Disk ??? \ No newline at end of file +The table below indicates the size of the ROM Disk that you will +have based on your ROM chip size and boot type. The common boot +type is a ROM Boot where your system boots from code on the ROM. +Alternatively, some systems provide a ROMless boot where the +code is loaded from somewhere else (typically a disk or CF/SD Card). +In this case, you actually have no ROM disk, but instead you get +a pre-loaded RAM disk. + +A normal ROM Boot system will have a ROM Disk that is 128KB less +than the size of the ROM chip. A ROMless Boot system will have a +ROM Disk that is 256KB less than the size of the ROM chip. + +ROM Chip ROM Boot ROMless Boot +-------------- -------------- -------------- +128KB n/a n/a +256KB 128KB ROM Disk n/a +512KB 384KB ROM Disk 256KB RAM Disk +1024KB 896KB ROM Disk 768KB RAM Disk +2048KB n/a 1792KB RAM Disk \ No newline at end of file diff --git a/Source/ver.inc b/Source/ver.inc index 1a73d142..93f95abc 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,7 +2,7 @@ #DEFINE RMN 5 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.5.0-dev.25" +#DEFINE BIOSVER "3.5.0-dev.38" #define rmj RMJ #define rmn RMN #define rup RUP diff --git a/Source/ver.lib b/Source/ver.lib index e5411f12..d00f1741 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 5 rup equ 0 rtp equ 0 biosver macro - db "3.5.0-dev.25" + db "3.5.0-dev.38" endm