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XMODEM Bug Fixes

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This commit is contained in:
Wayne Warthen
2017-11-09 12:10:22 -08:00
parent a60eb57a47
commit 8863b071da
3 changed files with 21 additions and 12 deletions
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2
Source/Apps/XM/Build.cmd
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@@ -9,7 +9,7 @@ set ZXBINDIR=%TOOLS%\cpm\bin\
set ZXLIBDIR=%TOOLS%\cpm\lib\
set ZXINCDIR=%TOOLS%\cpm\include\
zx mac xmdm125
zx mac xmdm125.asm $PO
zx slr180 -xmhb/HF
zx mload25 XM=xmdm125,xmhb

14
Source/Apps/XM/xmdm125.asm
View File

@@ -71,6 +71,7 @@ STX EQU 02H ; 'Start of header' for 1024 byte blocks
; Conditional equates - change to suit your system, then assemble
;
MHZ EQU 10 ; Clock speed, use integer (2,4,5,8, etc.)
SCL EQU 6600 ; WBW: Receive loop timeout scalar
CPM3 EQU NO ; Yes, if operating in CP/M v3.0 environment
STOPBIT EQU NO ; No, if using 1 stop bit, yes if using 2
BYEBDOS EQU NO ; Yes, if using BYE338-up, BYE501-up, or NUBYE
@@ -817,7 +818,8 @@ BADROP: POP PSW ; Restore stack
ALLSET: CALL GETCHR
CALL GETCHR
CALL MINIT
STA CPUMHZ ; WBW: Update CPU speed from MINIT in A
STA CPUMHZ ; WBW: Save CPU speed from MINIT
SHLD RCVSCL ; WBW: Save rcv loop scalar from MINIT
;
; Jump to appropriate function
;
@@ -3472,7 +3474,12 @@ MSLOOP: ADD B ; Number of seconds
MOV B,A ; Put total value back into 'B'
;
MSEC: IF NOT BYEBDOS
LXI D,6600 ; 1 second DCR count
;WBW BEGIN: Use scalar passed in by patch
;LXI D,6600 ; 1 second DCR count
XCHG
LHLD RCVSCL ; Use scalar value from patch
XCHG
;WBW END
ENDIF
;
IF BYEBDOS
@@ -5639,7 +5646,8 @@ MSGFLG: DB 0 ; Message upload flag
SAVEHL: DW 0 ; Saves TBUF command line address
TOTERR: DW 0 ; Total errors for transmission attempt
VRECNO: DW 0 ; Virtual record # in 128 byte records
CPUMHZ: DW MHZ ; WBW: CPU speed in MHz, *word value*
CPUMHZ: DB MHZ ; WBW: CPU speed in MHz
RCVSCL: DW SCL ; WBW: Recv loop scalar
;
EOFLG: DB 0 ; 'EOF' flag (1=yes)
EOFCTR: DB 0 ; EOF send counter

17
Source/Apps/XM/xmhb.180
View File

@@ -147,10 +147,10 @@ MINIT2:
;
RCINIT:
; RC2014, use HBIOS calls
LD HL,1250 ; Smaller receive loop tiemout scalar
LD (RCVSCL),HL ; ... to compensate for BIOS overhead
LD HL,HBIOS_JPTBL ; HBIOS jump table address
LD DE,HBCON ; HBIOS console notification string
LD A,1 ; Force lower CPU speed
LD (CPUSPD),A ; ... to compensate for BIOS overhead
LD DE,COMX ; HBIOS console notification string
JR MINIT3 ; Complete the initialization
;
MINIT3:
@@ -172,7 +172,8 @@ MINIT3:
LDIR ; Do the copy
;
; Return with CPU speed in A
LD A,(CPUSPD) ; Get CPU speed saved above
LD A,(CPUSPD) ; A := CPU speed in MHz
LD HL,(RCVSCL) ; HL := receive scalar
RET ; and return
;
; Identify active BIOS. RomWBW HBIOS=1, UNA UBIOS=2, else 0
@@ -216,21 +217,21 @@ IDBIO2:
;
BIOID DB 0 ; BIOS ID, 1=HBIOS, 2=UBIOS
PLTID DB 0 ; Platform ID
CPUSPD DB 0 ; CPU speed in MHz
CPUSPD DB 10 ; CPU speed in MHz
RCVSCL DW 2800 ; RECV loop timeout scalar
;
RBC DB "RBC, 08-Nov-2017$"
;
UART DB ", UART0$"
ASCI DB ", ASCI0$"
HBCON DB ", HBIOS CONSOLE$"
UBCON DB ", UBIOS CONSOLE$"
COMX DB ", COM0$"
;
UBTAG DB " [UNA]$"
HBTAG DB " [WBW]$"
;
CRLF DB 13, 10, "$"
;
BIOERR DB 13, 10, 13, 10, "*** Unknown BIOS ***", 13, 10, "$"
BIOERR DB 13, 10, 13, 10, "++ Unknown BIOS ++", 13, 10, "$"
;
;-----------------------------------------------------------------------
;