Update ppide.asm

Optimization

Source/HBIOS/ppide.asm

@@ -173,7 +173,7 @@ PPIDE1IO	.EQU	20H
 PPIDE2IO	.EQU	00H
 PPIDE3IO	.EQU	00H
 ;
-PPIDE_DEVCNT		.EQU	2	; ASSUME ONLY PRIMARY INTERFACE
+PPIDE_DEVCNT		.EQU	4	; ASSUME ONLY PRIMARY INTERFACE
 ;
 ; COMMAND BYTES
 ;
@@ -213,7 +213,7 @@ PPIDE_DRVSLAVE	.DB	%11110000	; LBA, SLAVE DEVICE
 ;
 ; PPIDE DEVICE CONFIGURATION
 ;
-PPIDE_CFGSIZ	.EQU	16		; SIZE OF CFG TBL ENTRIES
+PPIDE_CFGSIZ	.EQU	15		; SIZE OF CFG TBL ENTRIES
 ;
 ; PER DEVICE DATA OFFSETS
 ;
@@ -223,11 +223,9 @@ PPIDE_TYPE	.EQU	2		; DEVICE TYPE (BYTE)
 PPIDE_FLAGS	.EQU	3		; FLAG BITS BIT 0=CF, 1=LBA (BYTE)
 PPIDE_MEDCAP	.EQU	4		; MEDIA CAPACITY (DWORD)
 PPIDE_LBA	.EQU	8		; OFFSET OF LBA (DWORD)
-PPIDE_PORT	.EQU	12		; PORT ADDRESS OF THIS DEVICE (BYTE)
-PPIDE_DATALO	.EQU	12		; IDE DATA BUS LSB (8255 PORT A) (BYTE)
-PPIDE_DATAHI	.EQU	13		; IDE DATA BUS MSB (8255 PORT B)(BYTE)
-PPIDE_CTL	.EQU	14		; IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)(BYTE)
-PPIDE_PPI	.EQU	15		; 8255 CONTROL PORT(BYTE)
+PPIDE_DATALO	.EQU	12		; BASE PORT AND IDE DATA BUS LSB (8255 PORT A) (BYTE)
+PPIDE_CTL	.EQU	13		; IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)(BYTE)
+PPIDE_PPI	.EQU	14		; 8255 CONTROL PORT(BYTE)
 ;
 PPIDE_CFGTBL:
 	; DEVICE 0, PRIMARY MASTER
@@ -237,10 +235,9 @@ PPIDE_CFGTBL:
 	.DB	0			; FLAGS BYTE
 	.DW	0,0			; DEVICE CAPACITY
 	.DW	0,0			; CURRENT LBA
-	.DB	PPIDE0IO  		; DATALO IDE DATA BUS LSB (8255 PORT A)+ BASE ADDRESS OF PORT	
-	.DB	PPIDE0IO+1		; DATAHI IDE DATA BUS MSB (8255 PORT B)
-	.DB	PPIDE0IO+2		; CTL    IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)
-	.DB	PPIDE0IO+3		; PPI    8255 CONTROL PORT
+	.DB	PPIDE0IO  		; DATALO 	
+	.DB	PPIDE0IO+2		; CTL    
+	.DB	PPIDE0IO+3		; PPI    
 	; DEVICE 1, PRIMARY SLAVE
 	.DB	1			; DRIVER DEVICE NUMBER
 	.DB	0			; DEVICE STATUS
@@ -248,10 +245,31 @@ PPIDE_CFGTBL:
 	.DB	0			; FLAGS BYTE
 	.DW	0,0			; DEVICE CAPACITY
 	.DW	0,0			; CURRENT LBA
-	.DB	PPIDE0IO		; DATALO IDE DATA BUS LSB (8255 PORT A)+ BASE ADDRESS OF PORT
-	.DB	PPIDE0IO+1		; DATAHI IDE DATA BUS MSB (8255 PORT B)
-	.DB	PPIDE0IO+2		; CTL    IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)
-	.DB	PPIDE0IO+3		; PPI    8255 CONTROL PORT
+	.DB	PPIDE0IO		; DATALO 
+	.DB	PPIDE0IO+2		; CTL    
+	.DB	PPIDE0IO+3		; PPI    
+#IF (PPIDE_DEVCNT >= 2)
+	; DEVICE 2, PRIMARY MASTER
+	.DB	2			; DRIVER DEVICE NUMBER
+	.DB	0			; DEVICE STATUS
+	.DB	0			; DEVICE TYPE
+	.DB	0			; FLAGS BYTE
+	.DW	0,0			; DEVICE CAPACITY
+	.DW	0,0			; CURRENT LBA
+	.DB	PPIDE1IO  		; DATALO 	
+	.DB	PPIDE1IO+2		; CTL    
+	.DB	PPIDE1IO+3		; PPI    
+	; DEVICE 3, PRIMARY SLAVE
+	.DB	3			; DRIVER DEVICE NUMBER
+	.DB	0			; DEVICE STATUS
+	.DB	0			; DEVICE TYPE
+	.DB	0			; FLAGS BYTE
+	.DW	0,0			; DEVICE CAPACITY
+	.DW	0,0			; CURRENT LBA
+	.DB	PPIDE1IO		; DATALO 
+	.DB	PPIDE1IO+2		; CTL    
+	.DB	PPIDE1IO+3		; PPI    
+#ENDIF
 ;
 #IF ($ - PPIDE_CFGTBL) != (PPIDE_DEVCNT * PPIDE_CFGSIZ)
 	.ECHO	"*** INVALID PPIDE CONFIG TABLE ***\n"
@@ -286,15 +304,11 @@ PPIDE_INIT:
 	LD	A,(CB_CPUMHZ)		; LOAD CPU SPEED IN MHZ
 	CALL	MULT8X16		; HL := DE * A
 	LD	(PPIDE_TOSCALER),HL	; SAVE IT
-;
-	PRTS(" IO=0x$")			; LABEL FOR IO ADDRESS
-	LD	IY,PPIDE_CFGTBL
-	LD	A,PPIDE_IO_BASE
-	CALL	PRTHEXBYTE
 ;
 #IF (PPIDE8BIT)
 	PRTS(" 8BIT$")
 #ENDIF
+	LD	IY,PPIDE_CFGTBL
 	CALL	PPIDE_DETECT		; CHECK FOR HARDWARE
 	JR	Z,PPIDE_INIT00		; CONTINUE IF PRESENT
 ;
@@ -347,6 +361,11 @@ PPIDE_INIT2:
 ;
 	CALL	PPIDE_PRTPREFIX		; PRINT DEVICE PREFIX
 ;
+;
+	PRTS(" IO=0x$")			; LABEL FOR IO ADDRESS
+	LD	A,(IY+PPIDE_DATALO)
+	CALL	PRTHEXBYTE
+;
 #IF (PPIDE8BIT)
 	PRTS(" 8BIT$")
 #ENDIF
@@ -392,12 +411,17 @@ PPIDE_DETECT:
 	LD	C,(IY+PPIDE_PPI)
 	LD	A,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
 	OUT	(C),A			; OUTPUT TO CONTROL WORD
-
+;
 	LD	C,(IY+PPIDE_DATALO)	; PPI PORT A
+;
+#IF USEZ80OPT
+;;	OUT	(C),0
+	.DB	$ED,$71
+#ELSE
 	XOR	A			; VALUE ZERO
 	OUT	(C),A			; PUSH VALUE TO PORT
-;;	OUT	(C),0
-;;	.DB	$ED,$71
+#ENDIF
+;
 	IN	A,(C)			; GET PORT VALUE
 	DCALL	PC_SPACE
 	DCALL	PRTHEXBYTE
@@ -908,10 +932,13 @@ PPIDE_RESET:
 	LD	DE,20
 	CALL	VDELAY
 ;
-	XOR	A			
-	OUT	(C),A	
+#IF USEZ80OPT
 ;;	OUT	(C),0
-;;	.DB	$ED,$71
+	.DB	$ED,$71
+#ELSE
+	XOR	A			; VALUE ZERO
+	OUT	(C),A			; PUSH VALUE TO PORT
+#ENDIF
 ;
 	LD	DE,20
 	CALL	VDELAY
@@ -1018,10 +1045,13 @@ PPIDE_PROBE:
 	; BECAUSE THE WRITE SIGNAL IS NEVER PULSED.
 ;
 	LD	C,(IY+PPIDE_DATALO)
-	XOR	A		
-	OUT	(C),A
+#IF USEZ80OPT
 ;;	OUT	(C),0
-;;	.DB	$ED,$71
+	.DB	$ED,$71
+#ELSE
+	XOR	A			; VALUE ZERO
+	OUT	(C),A			; PUSH VALUE TO PORT
+#ENDIF
 ;
 	CALL	PPIDE_IN
 	.DB	PPIDE_REG_STAT
@@ -1240,7 +1270,7 @@ PPIDE_WAITBSY1:
 	LD	DE,(PPIDE_TOSCALER)	; CPU SPEED SCALER TO INNER LOOP VAR
 PPIDE_WAITBSY2:
 	;IN	A,(PPIDE_REG_STAT)	; READ STATUS
-	CALL	PPIDE_IN							; 17TS + 170TS
+	CALL	PPIDE_IN							; 17TS + 204TS 
 	.DB	PPIDE_REG_STAT							; 0TS
 	LD	C,A			; SAVE IT				; 4TS
 	AND	%10000000		; TO FILL (OR READY TO FILL)		; 7TS
@@ -1250,65 +1280,60 @@ PPIDE_WAITBSY2:
 	OR	E								; 4TS
 	JR	NZ,PPIDE_WAITBSY2						; 12TS
 	DJNZ	PPIDE_WAITBSY1							; -----
-	JP	PPIDE_BSYTO		; EXIT WITH BSYTO ERR			; 229TS
-;
-;
+	JP	PPIDE_BSYTO		; EXIT WITH BSYTO ERR			; 246TS 
 ;
+; READ A VALUE FROM THE DEVICE POINTED TO BY IY AND RETURN IT IN A
+; 
 PPIDE_IN:				; IY POINT TO CURRENT CFG TABLE
+	EX	(SP),HL			; GET PARM POINTER			; 19TS				
 	PUSH	BC			; SAVE INCOMING BC			; 11TS
 	LD	C,(IY+PPIDE_PPI)	;					; 19TS
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ	; 7TS
 	OUT	(C),A			; DO IT					; 12TS
-	POP	BC			; RECOVER INCOMING BC			; 10TS
-	EX	(SP),HL			; GET PARM POINTER			; 19TS
 ;
-	PUSH	BC			; SAVE INCOMING BC			; 11TS
 	LD	B,(HL)			; GET CTL PORT VALUE			; 7TS
-	LD	C,(IY+PPIDE_CTL)	; SETUP PORT TO WRITE			; 19TS
+	DEC	C			; LD C,(IY+PPIDE_CTL)			; 4TS
 	OUT	(C),B			; SET ADDRESS LINES			; 12TS
 	SET	6,B			; TURN ON WRITE BIT			; 8TS
 	OUT	(C),B			; ASSERT WRITE LINE			; 12TS
-	 ;NOP
-	 ;NOP
-	LD	C,(IY+PPIDE_DATALO)	;					; 19TS
+;
+	DEC	C								; 4TS
+	DEC	C			; LD C,(IY+PPIDE_DATALO)		; 4TS
 	IN	A,(C)			; GET DATA VALUE FROM DEVICE		; 12TS
-	 ;NOP
-	 ;NOP
+;
 	RES	6,B			; CLEAR WRITE BIT			; 8TS
-	LD	C,(IY+PPIDE_CTL)						; 19TS
+	INC	C								; 4TS
+	INC	C			; LD C,(IY+PPIDE_CTL)			; 4TS
 	OUT	(C),B			; DEASSERT WRITE LINE			; 12TS
 	POP	BC			; RECOVER INCOMING BC			; 10TS
 	INC	HL			; POINT PAST PARM			; 6TS
 	EX	(SP),HL			; RESTORE STACK				; 19TS
 	RET									; 10TS
 ;										; -----
-;										; 243TS      WAS 170TS
+;										; 204TS   
 ;										; -----
-; OUTPUT A TO 										
+; OUTPUT A TO 	3 2 0 2									
 ;
 PPIDE_OUT:				; IY POINT TO CURRENT CFG TABLE
+	EX	(SP),HL			; GET PARM POINTER
 	PUSH	BC			; SAVE INCOMING BC
 	LD	C,(IY+PPIDE_PPI)
 	LD	B,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
 	OUT	(C),B			; DO IT
-	POP	BC			;;
-	EX	(SP),HL			; GET PARM POINTER
 
-	PUSH	BC			; SAVE INCOMING BC
 	LD	B,(HL)			; GET IDE ADDRESS VALUE
-	LD	C,(IY+PPIDE_CTL)	; SETUP PORT TO WRITE
-;
+	DEC	C			; LD C,(IY+PPIDE_CTL)
 	OUT	(C),B			; SET ADDRESS LINES
 	SET	5,B			; TURN ON WRITE BIT
 	OUT	(C),B			; ASSERT WRITE LINE
-	 ;NOP
-	 ;NOP
-	LD	C,(IY+PPIDE_DATALO)	;;
+;
+	DEC	C								
+	DEC	C			; LD C,(IY+PPIDE_DATALO)		
 	OUT	(C),A			; SEND DATA VALUE TO DEVICE
-	 ;NOP
-	 ;NOP
+;
 	RES	5,B			; CLEAR WRITE BIT
-	LD	C,(IY+PPIDE_CTL)
+	INC	C
+	INC	C			; LD C,(IY+PPIDE_CTL)
 	OUT	(C),B			; DEASSERT WRITE LINE
 	POP	BC			; RECOVER INCOMING BC
 	INC	HL			; POINT PAST PARM