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https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
Update nascom.asm
Install frequency table as part of cold boot initialization
This commit is contained in:
b1ackmai1er
@@ -4400,6 +4400,7 @@ MONITR: LD A,BID_BOOT ; BOOT BANK
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INITST: LD A,0 ; Clear break flag
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LD (BRKFLG),A
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CALL SET_DUR_TBL ; SET UP SOUND TABLE
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JP INIT
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ARETN: RETN ; Return from NMI
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@@ -4416,7 +4417,7 @@ OUTNCR: CALL OUTC ; Output character in A
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; ---------------------------------------------------------------------------------------
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; PLAY O,N,D ; PLAY OCTAVE 0-7, NOTE N (0-11), DURATION (1-8)
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; PLAY O,N,D ; PLAY OCTAVE 0-8, NOTE N (0-11), DURATION (1-8)
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PLAY: CALL GETINT ; GET OCTAVE
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PUSH AF ; AND SAVE
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@@ -4441,7 +4442,7 @@ PLAY: CALL GETINT ; GET OCTAVE
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CALL GETINT ; GET DURATION
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POP DE ; GET NOTE PTR IN DE
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EX (SP),HL ; GET OCTAVE IN HL. SYTAX POINTER ON STACK
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EX (SP),HL ; GET OCTAVE IN HL. SYNTAX POINTER ON STACK
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EX DE,HL ; PUT NOTE PTR IN HL, OCTAVE IN DE
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PUSH BC
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@@ -4453,9 +4454,7 @@ PLAY: CALL GETINT ; GET OCTAVE
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RET
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SPK_BEEP:
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; PUSH AF ; SAVE DURATION
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CALL SET_DUR_TBL
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PUSH AF ; SAVE DURATION
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LD A,(HL) ; LOAD 1ST ARG
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INC HL ; IN DE
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@@ -4464,112 +4463,121 @@ SPK_BEEP:
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INC HL ; THE EIGTH
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LD D,A ; OCTAVE
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LD A,7 ; DIVIDE THE
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SUB B ; FREQENCY BASE
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LD C,A ; ON THE OCTAVE
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SPK_OCTDIV: ; REQUESTED
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SRL D
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RRC E
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DJNZ SPK_OCTDIV
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SPK_OCTOK:
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PUSH DE
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LD A,(HL) ; LOAD 2ND ARG
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INC HL ; IN BC
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LD C,A ; WHICH IS THE
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INC HL ; IN DE
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LD E,A ; WHICH IS THE
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LD A,(HL) ; DURATION
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INC HL
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LD B,A
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PUSH BC ; SETUP ARG IN HL
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POP HL
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LD D,A
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CALL SPK_BEEPER ; PLAY
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;
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RET
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PUSH DE ; SETUP ARGS IN HL
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POP HL ; AND DE
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POP DE
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LD A,8 ; DIVIDE THE
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SUB B ; FREQENCY BASED
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JR Z,SPK_OCTOK ; ON THE OCTAVE
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LD C,A ; REQUESTED
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SPK_OCTDIV:
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SRL D ; 0>D>C ; MULTIPLY THE
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RR E ; C>E>C ; DURATION EVERY
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SLA L ; C<L<0 ; TIME WE DIVIDE
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RL H ; C<H<C ; THE FREQUENCY
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DJNZ SPK_OCTDIV
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SPK_OCTOK:
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POP BC ; RECALL DURATION
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LD C,B
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LD B,16 ; DIVIDE BY DURATION
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XOR A
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ADD HL,HL
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RLA
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CP C
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JR C,$+4
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INC L
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SUB C
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DJNZ $-7
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ADD A,A
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CP C
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JR C,$+3
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INC HL
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;
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; The following SPK_BEEPER routine is a modification of code from
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; "The Complete SPECTRUM ROM DISSASSEMBLY" by Dr Ian Logan & Dr Frank O’Hara
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;
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; https://www.esocop.org/docs/CompleteSpectrumROMDisassemblyThe.pdf
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;
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; DE Number of passes to make through the sound generation loop
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; HL Loop delay parameter
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;RTCIO .EQU $70
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RTCVAL .EQU 0
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;
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SPK_BEEPER:
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PUSH IX
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DI ; Disable the interrupt for the duration of a 'beep'.
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LD A,L ; Save L temporarily.
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SRL L ; Each '1' in the L register is to count 4 T states, but take INT (L/4) and count 16 T states instead.
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DI ; Disable the interrupt for the duration of a 'beep'.
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LD A,L ; Save L temporarily.
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SRL L ; Each '1' in the L register is to count 4 T states, but take INT (L/4) and count 16 T states instead.
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SRL L
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CPL ; Go back to the original value in L and find how many were lost by taking 3-(A mod 4).
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CPL ; Go back to the original value in L and find how many were lost by taking 3-(A mod 4).
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AND $03
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LD C,A
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LD B,$00
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LD IX,SPK_DLYADJ ; The base address of the timing loop.
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ADD IX,BC ; Alter the length of the timing loop. Use an earlier starting point for each '1' lost by taking INT (L/4).
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LD A,(RTCVAL) ; Fetch the present border colour from BORDCR and move it to bits 2, 1 and 0 of the A register.
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LD IX,SPK_DLYADJ ; The base address of the timing loop.
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ADD IX,BC ; Alter the length of the timing loop. Use an earlier starting point for each '1' lost by taking INT (L/4).
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LD A,(RTCVAL) ; Fetch the present border colour from BORDCR and move it to bits 2, 1 and 0 of the A register.
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;
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; The HL register holds the 'length of the timing loop' with 16 T states being used for each '1' in the L register and 1024 T states for each '1' in the H register.
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;
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SPK_DLYADJ:
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NOP ; Add 4 T states for each earlier entry point that is used.
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NOP ; Add 4 T states for each earlier entry point that is used.
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NOP
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NOP
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INC B ; The values in the B and C registers will come from the H and L registers - see below.
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INC B ; The values in the B and C registers will come from the H and L registers - see below.
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INC C
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BE_H_L_LP:
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DEC C ; The 'timing loop', i.e. BC*4 T states. (But note that at the half-cycle point, C will be equal to L+1.)
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DEC C ; The 'timing loop', i.e. BC*4 T states. (But note that at the half-cycle point, C will be equal to L+1.)
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JR NZ,BE_H_L_LP
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LD C,$3F
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DEC B
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JP NZ,BE_H_L_LP
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;
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; The loudspeaker is now alternately activated and deactivated.
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;
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XOR %00000100 ; Flip bit 2.
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OUT (RTCIO),A ; Perform the 'OUT' operation, leaving other bits unchanged.
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LD B,H ; Reset the B register.
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LD C,A ; Save the A register.
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BIT 4,A ; Jump if at the half-cycle point.
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XOR %00000100 ; Flip bit 2. The loudspeaker is now alternately activated and deactivated.
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OUT (RTCIO),A ; Perform the 'OUT' operation, leaving other bits unchanged.
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LD B,H ; Reset the B register.
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LD C,A ; Save the A register.
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BIT 4,A ; Jump if at the half-cycle point.
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JR NZ,BE_AGAIN
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;
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; After a full cycle the DE register pair is tested.
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;
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LD A,D ; Jump forward if the last complete pass has been made already.
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LD A,D ; After a full cycle the DE register pair is tested.
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OR E
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JR Z,BE_END
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LD A,C ; Fetch the saved value.
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LD C,L ; Reset the C register.
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DEC DE ; Decrease the pass counter.
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JP (IX) ; Jump back to the required starting location of the loop.
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;
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; The parameters for the second half-cycle are set up.
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JR Z,BE_END ; Jump forward if the last complete pass has been made already.
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LD A,C ; Fetch the saved value.
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LD C,L ; Reset the C register.
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DEC DE ; Decrease the pass counter.
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JP (IX) ; Jump back to the required starting location of the loop.
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;
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BE_AGAIN:
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LD C,L ; Reset the C register.
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INC C ; Add 16 T states as this path is shorter.
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JP (IX) ; Jump back.
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BE_END:
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EI
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BE_AGAIN: ; The parameters for the second half-cycle are set up.
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LD C,L ; Reset the C register.
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INC C ; Add 16 T states as this path is shorter.
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JP (IX) ; Jump back.
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BE_END: EI
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POP IX
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RET
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;
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RTCVAL .DB 0
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;
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; SETUP THE ONE SECOND TONE DURATION TABLE BASED ON PROCESSOR SPEED AND TONE FREQUENCY
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;
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; DURATION = (CPUKHZ / 8) / FREQUENCY
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; DURATION = (CPUMHZ / 8) / FREQUENCY
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; DURATION = (CPUKHZ * 1000 / 8 ) / FREQUENCY
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; DURATION = (CPUKHZ * 125 ) / FREQUENCY
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; DURATION = (CPUKHZ * 256 / 2 - CPUKHZ - (2 * CPUKHZ) ) / FREQUENCY
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SET_DUR_TBL:
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PUSH IX
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PUSH IY
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PUSH HL
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PUSH DE
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PUSH BC
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; PUSH IX
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; PUSH IY
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; PUSH HL
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; PUSH DE
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; PUSH BC
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LD B,BF_SYSGET ; GET CPU SPEED
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LD C,BF_SYSGET_CPUINFO ; FROM HBIOS
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@@ -4583,22 +4591,19 @@ SET_DUR_TBL:
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LD D,0
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LD L,D
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SRL E ; DEHL = DEHL / 2
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RR H
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RR L
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SRL E ; 0>E>C ; DEHL = DEHL / 2
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RR H ; C>H>C ;
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RR L ; C>L>C ;
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SBC HL,BC ; DEHL = DEHL - CPUKHZ
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JR NC,FRQ_ADJ1
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JR NC,FRQ_AJ1
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DEC DE
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FRQ_ADJ1:
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SLA C ; DEHL = DEHL - (2 * CPUKHZ)
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RL B
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FRQ_AJ1:SLA C ; C<C<0 ; DEHL = DEHL - (2 * CPUKHZ)
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RL B ; C<B<C
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SBC HL,BC
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JR NC,FRQ_ADJ2
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JR NC,FRQ_AJ2
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DEC DE
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FRQ_ADJ2:
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PUSH HL ; DEHL = CPUKHZ / 8) / FREQUENCY
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FRQ_AJ2:PUSH HL ; DEHL = CPUKHZ / 8) / FREQUENCY
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POP IX ; HLIX = DENOMINATOR
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EX DE,HL
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@@ -4611,9 +4616,8 @@ TBL_LP: PUSH BC
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PUSH IX ; STORE DENOMINATOR FOR NEXT LOOP
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PUSH HL
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DIV_3216: ; HLIX = HLIX / BC, DE = REMAINDER
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LD DE,0
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LD DE,0 ; HLIX = HLIX / BC, DE = REMAINDER
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LD A,32
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DIV_LP: ADD IX,IX
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ADC HL,HL
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@@ -4644,11 +4648,11 @@ DIV_CANSUB:
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POP BC ; RETREIVE THE
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DJNZ TBL_LP ; LOOP COUNTER
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POP BC
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POP DE
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POP HL
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POP IY
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POP IX
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; POP BC
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; POP DE
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; POP HL
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; POP IY
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; POP IX
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RET
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