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Application Boot Tweaks

- Reduces failure scenarios with application boot
- Catches and diagnoses common bank mismatch which application boot cannot handle
pull/409/head v3.5.0-dev.63
Wayne Warthen 2 years ago
parent
commit
8e0af1720a
  1. 218
      Source/HBIOS/hbios.asm
  2. 2
      Source/ver.inc
  3. 2
      Source/ver.lib

218
Source/HBIOS/hbios.asm

@ -164,7 +164,10 @@ SUPCTS .EQU FALSE ; SUPPRESS CTS DURING HBIOS BOOT
#IF (FPLED_ENABLE)
#DEFINE FPLEDS(N) PUSH AF
#DEFCONT \ LD A,N
#DEFCONT \ CALL FP_SETLEDS
#IF (FPLED_INV)
#DEFCONT \ XOR $FF ; INVERT BITS IF NEEDED
#ENDIF
#DEFCONT \ OUT (FPLED_IO),A
#DEFCONT \ POP AF
#ELSE
#DEFINE FPLEDS(N) \;
@ -1972,11 +1975,94 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
LD A,H ; GET FIRST BYTE PUSHED
LD (HB_BATCOND),A ; ... AND SAVE AS BAT COND
;
; IF APPBOOT, WE NEED TO FIX UP A FEW THINGS IN PAGE ZERO
; ;;; SHOULD THIS BE DONE FOR AN HBIOS RESTART IN PLACE???
#IF FALSE
;
; POPULATE THE CRITICAL RAM BANK NUMBERS.
;
; ASSUME THAT CB_RAMBANKS IS THE NUMBER OF 32K RAM BANKS THAT HAS BEEN SET EITHER
; AT ASSEMBLY TIME OR BY PROBING THE ACTUAL AVAILABLE MEMORY (NOT IMPLEMENTED YET).
;
LD A,(CB_RAMBANKS) ; CALCULATE TOP RAMBANK
ADD A,BID_RAM0 ; AS FIRST RAMBANK +
DEC A ; #RAMBANKS - 1
;
LD HL,CB_BIDCOM
LD B,4
CB_IDS: LD (HL),A ; POPULATE CB_BIDCOM
INC HL ; POPULATE CB_BIDUSR
DEC A ; POPULATE CB_BIDBIOS
DJNZ CB_IDS ; POPULATE CB_BIDAUX
;
LD A,(CB_BIDUSR)
LD (HB_SRCBNK),A ; POPULATE HB_SRCBNK
LD (HB_DSTBNK),A ; POPULATE HB_DSTBNK
;
LD A,BID_RAM0 ; POPULATE CB_BIDRAMD0 ; START RAMBANK
LD (HL),A
INC HL
;
LD A,(CB_RAMBANKS) ; POPULATE CB_BIDRAMDN ; END RAMBANK
DEC A
SUB TOT_RAM_RB
LD (HL),A
;
#ENDIF
;
;--------------------------------------------------------------------------------------------------
; INTERRUPT MANAGEMENT SETUP
;--------------------------------------------------------------------------------------------------
;
; SETUP INTERRUPT VECTOR TABLE ADDRESS(ES) AND TRANSITION TO
; OPERATING INTERRUPT MODE. NOTE THAT INTERRUPTS REMAIN
; DISABLED AT THIS POINT.
;
#IF ((INTMODE == 2) | ((INTMODE == 1) & (CPUFAM == CPU_Z180)))
; SETUP Z80 IVT AND INT MODE 2
LD A,HBX_IVT >> 8 ; SETUP HI BYTE OF IVT ADDRESS
LD I,A ; ... AND PLACE IT IN I REGISTER
#IF (CPUFAM == CPU_Z180)
; SETUP Z180 IVT
XOR A ; SETUP LO BYTE OF IVT ADDRESS
OUT0 (Z180_IL),A ; ... AND PLACE IN Z180 IL REGISTER
#ENDIF
#IF (INTMODE == 2)
IM 2 ; SWITCH TO INT MODE 2
#ENDIF
#ENDIF
;
#IF (MEMMGR == MM_Z280)
; NOW POINT TO RAM COPY OF Z280 INT/TRAP TABLE
; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT
; IVT *MUST* BE ON A 4K BOUNDARY
LD C,Z280_VPR
LD HL,0 + (((PBANK(BID_BIOS) << 15) + Z280_IVT) >> 8)
LDCTL (C),HL
#ENDIF
;
#IF (INTMODE == 3)
;
; SETUP Z280 INT A FOR VECTORED INTERRUPTS
LD HL,%0010000000000000
LD C,Z280_ISR
LDCTL (C),HL
;
; TRANSITION TO INTERRUPT MODE 3
IM 3
;
#ENDIF
;
;--------------------------------------------------------------------------------------------------
; APPLICATION BOOT INITIALIZATION
;--------------------------------------------------------------------------------------------------
;
; IF APPBOOT, WE NEED TO FIX UP A FEW THINGS IN PAGE ZERO AND
; COPY THE PAYLOAD CONTAINING ROMLDR, MONITOR, AND ZSDOS TO AUX BANK.
;
#IFDEF APPBOOT
;
;;; SHOULD THIS BE DONE FOR AN HBIOS RESTART IN PLACE???
; MAKE SURE RST 08 VECTOR IS RIGHT
LD A,$C3
LD ($0008),A
@ -2008,59 +2094,29 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
JR NZ,HB_START2 ; IF SET, SKIP
DEC A ; SET FLAG
LD (HB_RAMFLAG),A ; SAVE IT
;
;
; FOR AN APPLICATION BOOT, WE ALSO COPY THE CONCATENATED OS
; IMAGES TO THE AUX BANK WHERE WE WILL JUMP TO ROMLDR LATER.
LD B,BF_SYSSETCPY ; HBIOS FUNC: SETUP BANK COPY
LD D,BID_AUX ; D = DEST BANK = AUX BANK
LD A,(HBX_LOC - 2) ; E = SRC BANK = LOAD BANK
LD E,A ; USE AS SOURCE
LD HL,$8000 ; HL = COPY LEN = ENTIRE BANK
RST 08 ; DO IT
LD B,BF_SYSBNKCPY ; HBIOS FUNC: PERFORM BANK COPY
LD A,(HB_CURBNK) ; GET CURRENT BANK ID
LD (HB_SRCBNK),A ; SETUP SOURCE BANK
LD A,BID_AUX ; DEST BANK IS AUX BANK
LD (HB_DSTBNK),A ; SETUP DESTINATION BANK
LD HL,HB_END ; COPY FROM END OF HBIOS
LD DE,0 ; TO START OF TARGET BANK
RST 08 ; DO IT
LD BC,$8000 ; COPY ENTIRE 32KB BANK
CALL HBX_BNKCPY ; ELSE NORMAL BANK COPY
JR HB_START2 ; CONTINUE
;
;;; RELOCATE THIS DATA FIELD
HB_RAMFLAG .DB $00
;
#ENDIF
;
HB_START2:
;
#IF FALSE
;
; POPULATE THE CRITICAL RAM BANK NUMBERS.
;
; ASSUME THAT CB_RAMBANKS IS THE NUMBER OF 32K RAM BANKS THAT HAS BEEN SET EITHER
; AT ASSEMBLY TIME OR BY PROBING THE ACTUAL AVAILABLE MEMORY (NOT IMPLEMENTED YET).
;
LD A,(CB_RAMBANKS) ; CALCULATE TOP RAMBANK
ADD A,BID_RAM0 ; AS FIRST RAMBANK +
DEC A ; #RAMBANKS - 1
;
LD HL,CB_BIDCOM
LD B,4
CB_IDS: LD (HL),A ; POPULATE CB_BIDCOM
INC HL ; POPULATE CB_BIDUSR
DEC A ; POPULATE CB_BIDBIOS
DJNZ CB_IDS ; POPULATE CB_BIDAUX
;
LD A,(CB_BIDUSR)
LD (HB_SRCBNK),A ; POPULATE HB_SRCBNK
LD (HB_DSTBNK),A ; POPULATE HB_DSTBNK
;
LD A,BID_RAM0 ; POPULATE CB_BIDRAMD0 ; START RAMBANK
LD (HL),A
INC HL
;
LD A,(CB_RAMBANKS) ; POPULATE CB_BIDRAMDN ; END RAMBANK
DEC A
SUB TOT_RAM_RB
LD (HL),A
;
#ENDIF
;--------------------------------------------------------------------------------------------------
; GENERAL HBIOS INITIALIZATION
;--------------------------------------------------------------------------------------------------
;
; CLEAR DISPATCH TABLE ENTRIES
;
@ -2421,51 +2477,6 @@ HB_CPU3:
CALL DELAY_INIT ; .. SPEED COMPENSATED DELAY
;
;--------------------------------------------------------------------------------------------------
; INTERRUPT MANAGEMENT SETUP
;--------------------------------------------------------------------------------------------------
;
; SETUP INTERRUPT VECTOR TABLE ADDRESS(ES) AND TRANSITION TO
; OPERATING INTERRUPT MODE. NOTE THAT INTERRUPTS REMAIN
; DISABLED AT THIS POINT.
;
#IF ((INTMODE == 2) | ((INTMODE == 1) & (CPUFAM == CPU_Z180)))
; SETUP Z80 IVT AND INT MODE 2
LD A,HBX_IVT >> 8 ; SETUP HI BYTE OF IVT ADDRESS
LD I,A ; ... AND PLACE IT IN I REGISTER
#IF (CPUFAM == CPU_Z180)
; SETUP Z180 IVT
XOR A ; SETUP LO BYTE OF IVT ADDRESS
OUT0 (Z180_IL),A ; ... AND PLACE IN Z180 IL REGISTER
#ENDIF
#IF (INTMODE == 2)
IM 2 ; SWITCH TO INT MODE 2
#ENDIF
#ENDIF
;
#IF (MEMMGR == MM_Z280)
; NOW POINT TO RAM COPY OF Z280 INT/TRAP TABLE
; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT
; IVT *MUST* BE ON A 4K BOUNDARY
LD C,Z280_VPR
LD HL,0 + (((PBANK(BID_BIOS) << 15) + Z280_IVT) >> 8)
LDCTL (C),HL
#ENDIF
;
#IF (INTMODE == 3)
;
; SETUP Z280 INT A FOR VECTORED INTERRUPTS
LD HL,%0010000000000000
LD C,Z280_ISR
LDCTL (C),HL
;
; TRANSITION TO INTERRUPT MODE 3
IM 3
;
#ENDIF
;
;--------------------------------------------------------------------------------------------------
; SYSTEM TIMER INITIALIZATION
;--------------------------------------------------------------------------------------------------
;
@ -7174,7 +7185,6 @@ FP_SETLEDS1:
POP HL ; RESTORE HL
RET ; DONE
;
;
#ENDIF
;
#IF (FPSW_ENABLE)
@ -8582,16 +8592,40 @@ HB_APPBOOTERR:
STR_APPBOOTERR .DB "\r\n\r\n*** App Boot is only possible on running RomWBW system!\r\n\r\n$"
;
HB_APPBOOT1:
; APPBOOT REQUIRES THAT THE COMMON BANK IS NOT CHANGED BY
; THE NEW CONFIG. TEST FOR THIS AND DIAGNOSE IF SO.
LD A,(HCB_BIDCOM) ; RUNNING COMMON BANK ID
LD B,BF_SYSGET ; HBIOS SYSGET
LD C,BF_SYSGET_BNKINFO ; BANK INFORMATION
RST 08 ; D = BIOS BANK ID
LD B,BF_SYSPEEK ; HBIOS FUNC: PEEK
LD HL,HCB_LOC + HCB_BIDCOM ; COMMON BANK ID
RST 08 ; E = COMMON BANK ID
LD A,E ; PUT IN A
CP BID_COM ; COMPARE TO NEW CONFIG
JR Z,HB_APPBOOT2 ; IF SAME, CONTINUE
;
; DIAGNOSE COMMON BANK ID MISMATCH
LD DE,STR_COMBANKERR ; POINT TO ERROR MESSAGE
LD C,9 ; BDOS FUNC 9: WRITE STR
CALL $0005 ; DO IT
OR $FF ; SIGNAL ERROR
RET ; AND RETURN
;
STR_COMBANKERR .DB "\r\n\r\n*** Common Bank Mismatch!\r\n\r\n$"
;
HB_APPBOOT2:
; ANNOUNCE THE APPLICATION BOOT
LD DE,STR_APPBOOT ; POINT TO MESSAGE
LD C,9 ; BDOS FUNC 9: WRITE STR
CALL $0005 ; DO IT
JR HB_APPBOOT2 ; AND CONTINUE
JR HB_APPBOOT3 ; AND CONTINUE
;
STR_APPBOOT .DB "\r\n\r\n*** Launching RomWBW HBIOS v", BIOSVER, ", ", TIMESTAMP, " for"
.DB "\r\n\r\n ", PLATFORM_NAME, "$"
;
HB_APPBOOT2:
HB_APPBOOT3:
;
#IF (MEMMGR == MM_Z280)
; WE NEED TO SWITCH FROM USER MODE TO SYSTEM MODE, BUT CONTINUE

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 5
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.5.0-dev.62"
#DEFINE BIOSVER "3.5.0-dev.63"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 5
rup equ 0
rtp equ 0
biosver macro
db "3.5.0-dev.62"
db "3.5.0-dev.63"
endm

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