FDC Detection Improvement

- Some FDC modules startup with the FDC reset signal active.  This fix ensures that reset is not asserted when FDC hardware prove is performed.

Source/HBIOS/fd.asm

@@ -743,9 +743,14 @@ FD_INIT0:
 ; DOES NOT ATTEMPT TO DETERMINE THE ACTUAL VARIANT.
 ;
 FD_DETECT:
-	IN	A,(FDC_MSR)	; IGNORE FIRST READ
-	CALL	DLY32		; WAIT A BIT FOR FDC
+	; BLINDLY RESET FDC (WHICH MAY OR MAY NOT EXIST)
+	LD	A,DOR_INIT	; MAKE SURE INITIAL DOR VALUE IS SETUP
+	LD	(FST_DOR),A	; AND PUT IN SHADOW REGISTER
+	CALL	FC_RESETFDC	; RESET FDC
+	
 	IN	A,(FDC_MSR)	; READ MSR
+	;CALL	PC_SPACE	; *DEBUG*
+	;CALL	PRTHEXBYTE	; *DEBUG*
 	CP	$80
 	JR	Z,FD_DETECT1	; $80 IS OK
 	CP	$D0
@@ -755,6 +760,8 @@ FD_DETECT:
 FD_DETECT1:
 	CALL	DLY32		; WAIT A BIT FOR FDC
 	IN	A,(FDC_MSR)	; READ MSR AGAIN
+	;CALL	PC_SPACE	; *DEBUG*
+	;CALL	PRTHEXBYTE	; *DEBUG*
 	CP	$80
 	RET			; $80 OK, ELSE NOT PRESENT
 ;
@@ -1312,7 +1319,7 @@ FC_SETUPSPECIFY:
 ;
 ; SET FST_DOR
 ;
-FC_SETDOR
+FC_SETDOR:
 	LD	(FST_DOR),A
 	OUT	(FDC_DOR),A
 #IF (FDTRACE >= 3)