MirrorRepos/RomWBW
1
0
Fork 1
mirror of https://github.com/wwarthen/RomWBW.git synced 2026-02-06 22:13:13 -06:00
Code Issues Projects Releases Wiki Activity

Additional SK Z80-512K Support

Browse Source 
- Added support for UART clock divider (CLK2).
This commit is contained in:
Wayne Warthen
2021-02-11 14:28:26 -08:00
parent 4791d5f040
commit 8e7e9039f9
17 changed files with 95 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
Source/HBIOS/std.asm
View File

@@ -246,6 +246,42 @@ SER_BAUD1843200 .EQU $1D << 8
SER_BAUD3686400 .EQU $1E << 8
SER_BAUD7372800 .EQU $1F << 8
;
; UART DIVIDER VALUES
; STORED AS 5 BITS: YXXXX
;
DIV_1 .EQU $00
DIV_2 .EQU $01
DIV_4 .EQU $02
DIV_8 .EQU $03
DIV_16 .EQU $04
DIV_32 .EQU $05
DIV_64 .EQU $06
DIV_128 .EQU $07
DIV_256 .EQU $08
DIV_512 .EQU $09
DIV_1024 .EQU $0A
DIV_2048 .EQU $0B
DIV_4096 .EQU $0C
DIV_8192 .EQU $0D
DIV_16384 .EQU $0E
DIV_32768 .EQU $0F
DIV_3 .EQU $10
DIV_6 .EQU $11
DIV_12 .EQU $12
DIV_24 .EQU $13
DIV_48 .EQU $14
DIV_96 .EQU $15
DIV_192 .EQU $16
DIV_384 .EQU $17
DIV_768 .EQU $18
DIV_1536 .EQU $19
DIV_3072 .EQU $1A
DIV_6144 .EQU $1B
DIV_12288 .EQU $1C
DIV_24576 .EQU $1D
DIV_49152 .EQU $1E
DIV_98304 .EQU $1F
;
SER_XON .EQU 1 << 6
SER_DTR .EQU 1 << 7
SER_RTS .EQU 1 << 13