From 8fa14863f8e6701e88e97a7f577b0a9cd826fe78 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Thu, 28 Jan 2021 16:41:33 -0800 Subject: [PATCH] Add System Timer to Z280 IM3 - Z280 counter/timer is now used to implement 50Hz system timer based on CPU oscillator. - Bug fix in EI opcodes. --- Source/HBIOS/hbios.asm | 101 ++++++++++++++++++++++++++++++++++++++--- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 3 files changed, 97 insertions(+), 8 deletions(-) diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 3f1623ec..41c1319b 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -118,9 +118,11 @@ MODCNT .SET MODCNT + 1 #ELSE #IF (CPUFAM == CPU_Z280) #IF (INTMODE == 3) -; Z280 MODE 3 INTERRUPT HANDLING (INTA & UART ENABLED) +; Z280 MODE 3 INTERRUPT HANDLING (INTA, C/T 0, & UART RCVR ENABLED) #DEFINE HB_DI DI -#DEFINE HB_EI .DB $ED,$F7,$09 +;#DEFINE HB_DI .DB $ED,$77,$7F +;#DEFINE HB_EI EI +#DEFINE HB_EI .DB $ED,$7F,$0B #ELSE ; Z280 MODE 1/2 INTERRUPT HANDLING #DEFINE HB_DI DI @@ -802,7 +804,7 @@ HBX_INT: ; COMMON INTERRUPT ROUTING CODE POP HL ; RESTORE HL CALL HBX_RETI ; RETI FOR Z80 PERIPHERALS - .DB $ED,$55 ; BACK TO USER LAND + .DB $ED,$55 ; RETIL ; HBX_RETI: RETI @@ -1033,7 +1035,7 @@ HB_START: ; DISABLE MEMORY REFRESH CYCLES LD A,$08 ; DISABLED OUT (Z280_RRR),A ; SET REFRESH RATE REGISTER - +; ; RESTORE I/O PAGE TO $00 LD L,$00 ; NORMAL I/O REG IS $00 LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER @@ -1593,6 +1595,39 @@ HB_CPU2: ; #ENDIF ; +#IF (CPUFAM == CPU_Z280) +; + #IF (INTMODE == 3) +; +Z280_TC .EQU CPUOSC / 4 / 50 / 2 ; TIME CONSTANT +; + LD HL,Z280_TIMINT + LD (Z280_IVT+$16),HL ; Z280 T/C VECTOR +; + ; SELECT I/O PAGE $FE + LD L,$FE ; COUNTER/TIMER I/O PAGE + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + .DB $ED,$6E ; LDCTL (C),HL +; + LD A,%10100000 ; CONFIG: C, RE, IE + OUT (Z280_CT0_CFG),A ; SET C/T 0 + LD HL,Z280_TC ; TIME CONSTANT & COUNTER + LD C,Z280_CT0_TC ; SET C/T 0 + .DB $ED,$BF ; OUTW (C),HL + LD C,Z280_CT0_CT ; SET C/T 0 + .DB $ED,$BF ; OUTW (C),HL + LD A,%11100000 ; CMD: EN, GT + OUT (Z280_CT0_CMDST),A ; SET C/T 0 +; + ; RESTORE I/O PAGE TO $00 + LD L,$00 ; NORMAL I/O REG IS $00 + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + .DB $ED,$6E ; LDCTL (C),HL +; + #ENDIF +; +#ENDIF +; ; INITIALIZE HEAP STORAGE ; ; INITIALIZE POINTERS @@ -3462,10 +3497,65 @@ HB_IM1PTR .DW HB_IVT ; POINTER FOR NEXT IM1 ENTRY ; #ENDIF ; +; +; +#IF (MEMMGR == MM_Z280) + +Z280_TIMINT: + ; DISCARD REASON CODE + INC SP + INC SP +; + ; SAVE INCOMING REGISTERS + PUSH AF + PUSH BC + PUSH DE + PUSH HL +; + ; CALL PRIMARY TIMER LOGIC + CALL HB_TIMINT +; + ; SELECT I/O PAGE $FE + LD L,$FE ; COUNTER/TIMER I/O PAGE + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + .DB $ED,$6E ; LDCTL (C),HL +; + ; CLEAR END OF COUNT CONDITION TO RESET INTERRUPT + IN A,(Z280_CT0_CMDST) ; GET STATUS + RES 1,A ; CLEAR CC + OUT (Z280_CT0_CMDST),A ; SET C/T 0 +; + ; RESTORE I/O PAGE TO $00 + LD L,$00 ; NORMAL I/O REG IS $00 + LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER + .DB $ED,$6E ; LDCTL (C),HL +; + ; RESTORE REGISTERS + POP HL + POP DE + POP BC + POP AF +; + .DB $ED,$55 ; RETIL +; +#ENDIF +; +; +; +HB_TIMINT: +#IF 0 ; *DEBUG* + LD HL,HB_TIMDBGCNT + INC (HL) + LD A,(HL) + OUT (DIAGPORT),A + JR HB_TIMDBG1 +HB_TIMDBGCNT .DB 0 +HB_TIMDBG1: +#ENDIF ; *DEBUG* +; ; TIMER HANDLER VECTORS ; THESE CAN BE HOOKED AS DESIRED BY DRIVERS ; -HB_TIMINT: VEC_TICK: JP HB_TICK ; TICK PROCESSING VECTOR VEC_SECOND: @@ -3504,7 +3594,6 @@ HB_SECOND: ; INCREMENT SECONDS COUNTER LD HL,HB_SECS ; POINT TO SECONDS COUNTER JP INC32HL ; INCREMENT AND RETURN - ; ; BAD INTERRUPT HANDLER ; diff --git a/Source/ver.inc b/Source/ver.inc index 1f737d7e..905accbf 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1.1-pre.34" +#DEFINE BIOSVER "3.1.1-pre.35" diff --git a/Source/ver.lib b/Source/ver.lib index 85edf7f6..90f1a10f 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 1 rtp equ 0 biosver macro - db "3.1.1-pre.34" + db "3.1.1-pre.35" endm