CPUSPD Doc Update

- Clarifies the speed multiplier capabilities of the Z180 chip variants.

ReadMe.md

@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.5 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-18 Dec 2024
+19 Dec 2024
 
 # Overview
 

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-18 Dec 2024
+19 Dec 2024
 
 
 

Source/Doc/Applications.md

@@ -1251,11 +1251,6 @@ cold reboot of the system.
 
 The functionality is highly dependent on the capabilities of your system.
 
-At present, all Z180 systems can change their CPU speed and their
-wait states.  SBC and MBC systems may be able to change their CPU
-speed if the hardware supports it and it is enabled in the HBIOS
-configuration.
-
 #### Syntax
 
 | `CPUSPD [`*`<speed>`*`[,[`*`<memws>`*`][,[`*`<iows>`*`]]]`
@@ -1290,11 +1285,27 @@ If an attempt is made to change the speed of a system
 that is definitely incapable of doing so, then an error result is
 returned.
 
+Z180-based systems will be able to adjust their CPU speed depending
+on the specific variant of the Z180 chip being used:
+
+| Z180 Variant        | Capability         |
+| --------------------|--------------------|
+| Z80180 (original)   | Half               |
+| Z8S180 Rev. K       | Half, Full         |
+| Z8S180 Rev. N       | Half, Full, Double |
+
+SBC and MBC systems may be able to change their CPU
+speed if the hardware supports it and it is enabled in the HBIOS
+configuration.
+
 The `CPUSPD` command makes no attempt to ensure that the new CPU
 speed will actually work on the current hardware.  Setting a CPU
 speed that exceeds the capabilities of the system will result in
 unstable operation or a system stall.
 
+In the case of Z180 CPUs, it is frequently necessary to add
+memory wait states when increasing the CPU speed.
+
 Some peripherals are dependent on the CPU speed.  For example, the Z180
 ASCI baud rate and system timer are derived from the CPU speed.  The
 CPUSPD application will attempt to adjust these peripherals for