diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf index 82deb94e..fee6cd09 100644 Binary files a/Doc/RomWBW Applications.pdf and b/Doc/RomWBW Applications.pdf differ diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf index d7fbf1c5..77aa1665 100644 Binary files a/Doc/RomWBW Disk Catalog.pdf and b/Doc/RomWBW Disk Catalog.pdf differ diff --git a/Doc/RomWBW Hardware.pdf b/Doc/RomWBW Hardware.pdf index 0869a23f..f340af68 100644 Binary files a/Doc/RomWBW Hardware.pdf and b/Doc/RomWBW Hardware.pdf differ diff --git a/Doc/RomWBW Introduction.pdf b/Doc/RomWBW Introduction.pdf index ffefee80..f864e4eb 100644 Binary files a/Doc/RomWBW Introduction.pdf and b/Doc/RomWBW Introduction.pdf differ diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf index bbe15605..fde93401 100644 Binary files a/Doc/RomWBW System Guide.pdf and b/Doc/RomWBW System Guide.pdf differ diff --git a/Doc/RomWBW User Guide.pdf b/Doc/RomWBW User Guide.pdf index 2501812b..72c95438 100644 Binary files a/Doc/RomWBW User Guide.pdf and b/Doc/RomWBW User Guide.pdf differ diff --git a/ReadMe.md b/ReadMe.md index d29cd249..532d20d0 100644 --- a/ReadMe.md +++ b/ReadMe.md @@ -7,7 +7,7 @@ **RomWBW Introduction** \ Version 3.6 \ Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \ -12 Nov 2025 +14 Nov 2025 # Overview diff --git a/ReadMe.txt b/ReadMe.txt index 838c1c23..afca823d 100644 --- a/ReadMe.txt +++ b/ReadMe.txt @@ -1,6 +1,6 @@ RomWBW Introduction Wayne Warthen (wwarthen@gmail.com) -12 Nov 2025 +14 Nov 2025 diff --git a/Source/Doc/Hardware.md b/Source/Doc/Hardware.md index 111716da..4a5e0c25 100644 --- a/Source/Doc/Hardware.md +++ b/Source/Doc/Hardware.md @@ -2492,6 +2492,7 @@ Note: | PCF | PCF8584-based I2C Real-Time Clock | | RP5C01 | Ricoh RPC01A Real-Time Clock w/ NVRAM | | SIMRTC | SIMH Simulator Real-Time Clock | +| MMRTC | NS MM58167B Real-Time Clock (no NVRAM) | ## DsKy (DiSplay KeYpad) diff --git a/Source/Doc/SystemGuide.md b/Source/Doc/SystemGuide.md index ee156f40..8ba0a02f 100644 --- a/Source/Doc/SystemGuide.md +++ b/Source/Doc/SystemGuide.md @@ -1430,6 +1430,7 @@ unit. The table below enumerates these values. | RTCDEV_RP5 | 0x05 | Ricoh RPC01A Real-Time Clock w/ NVRAM | rp5rtc.asm | | RTCDEV_EZ80 | 0x07 | eZ80 on-chip RTC | ez80rtc.asm | | RTCDEV_PC | 0x08 | MC146818/DS1285/DS12885 RTC w/ NVRAM | pcrtc.asm | +| RTCDEV_MM | 0x09 | NS MM58167B RTC (no NVRAM) | mmrtc.asm | The time functions to get and set the time (RTCGTM and RTCSTM) require a 6 byte date/time buffer in the following format. Each byte is BCD diff --git a/Source/HBIOS/Config/SZ180_std.asm b/Source/HBIOS/Config/SZ180_std.asm index 9756ecdb..5e4a42ed 100644 --- a/Source/HBIOS/Config/SZ180_std.asm +++ b/Source/HBIOS/Config/SZ180_std.asm @@ -58,6 +58,7 @@ Z180_MEMWAIT .SET 1 ; Z180: MEMORY WAIT STATES (0-3) Z180_IOWAIT .SET 3 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) ; INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) +MMRTCENABLE .SET TRUE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) ; ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) PLDSERENABLE .SET TRUE ; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM) diff --git a/Source/HBIOS/Config/SZ80_std.asm b/Source/HBIOS/Config/SZ80_std.asm index 8cc33832..0dc552ce 100644 --- a/Source/HBIOS/Config/SZ80_std.asm +++ b/Source/HBIOS/Config/SZ80_std.asm @@ -55,6 +55,8 @@ MEMMGR .SET MM_SZ80 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ51 FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPLED_IO .SET $05 ; FP: PORT ADDRESS FOR FP LEDS ; +MMRTCENABLE .SET TRUE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; PLDSERENABLE .SET TRUE ; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM) SCCENABLE .SET TRUE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) SCONENABLE .SET TRUE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) diff --git a/Source/HBIOS/cfg_DUO.asm b/Source/HBIOS/cfg_DUO.asm index 34b781d1..080b6659 100644 --- a/Source/HBIOS/cfg_DUO.asm +++ b/Source/HBIOS/cfg_DUO.asm @@ -169,6 +169,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_DYNO.asm b/Source/HBIOS/cfg_DYNO.asm index f1c8a60a..5958754f 100644 --- a/Source/HBIOS/cfg_DYNO.asm +++ b/Source/HBIOS/cfg_DYNO.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_EPITX.asm b/Source/HBIOS/cfg_EPITX.asm index f088e2cd..d52146de 100644 --- a/Source/HBIOS/cfg_EPITX.asm +++ b/Source/HBIOS/cfg_EPITX.asm @@ -164,6 +164,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_EZZ80.asm b/Source/HBIOS/cfg_EZZ80.asm index 6d390851..812c7c27 100644 --- a/Source/HBIOS/cfg_EZZ80.asm +++ b/Source/HBIOS/cfg_EZZ80.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_GMZ180.asm b/Source/HBIOS/cfg_GMZ180.asm index f1522dfc..1b4c61b8 100644 --- a/Source/HBIOS/cfg_GMZ180.asm +++ b/Source/HBIOS/cfg_GMZ180.asm @@ -163,6 +163,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_HEATH.asm b/Source/HBIOS/cfg_HEATH.asm index d1654feb..91800be5 100644 --- a/Source/HBIOS/cfg_HEATH.asm +++ b/Source/HBIOS/cfg_HEATH.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_MASTER.asm b/Source/HBIOS/cfg_MASTER.asm index abcc84f9..1235ad56 100644 --- a/Source/HBIOS/cfg_MASTER.asm +++ b/Source/HBIOS/cfg_MASTER.asm @@ -204,6 +204,8 @@ DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .EQU FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .EQU FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; PCRTCENABLE .EQU FALSE ; PCRTC: DISABLE DS12885 etc. RTC PCRTC_BASE .EQU $C0 ; Default port for PCRTC, like DSRTC. ; diff --git a/Source/HBIOS/cfg_MBC.asm b/Source/HBIOS/cfg_MBC.asm index 88142215..0341cc12 100644 --- a/Source/HBIOS/cfg_MBC.asm +++ b/Source/HBIOS/cfg_MBC.asm @@ -162,6 +162,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_MK4.asm b/Source/HBIOS/cfg_MK4.asm index 37cbb121..e0575cbc 100644 --- a/Source/HBIOS/cfg_MK4.asm +++ b/Source/HBIOS/cfg_MK4.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_MON.asm b/Source/HBIOS/cfg_MON.asm index 810264aa..6a04af30 100644 --- a/Source/HBIOS/cfg_MON.asm +++ b/Source/HBIOS/cfg_MON.asm @@ -165,6 +165,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_MSX.asm b/Source/HBIOS/cfg_MSX.asm index a96a7d1f..d06b8dda 100644 --- a/Source/HBIOS/cfg_MSX.asm +++ b/Source/HBIOS/cfg_MSX.asm @@ -171,6 +171,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_N8.asm b/Source/HBIOS/cfg_N8.asm index 97248512..b30ac4fa 100644 --- a/Source/HBIOS/cfg_N8.asm +++ b/Source/HBIOS/cfg_N8.asm @@ -170,6 +170,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_NABU.asm b/Source/HBIOS/cfg_NABU.asm index 0684a188..28f79467 100644 --- a/Source/HBIOS/cfg_NABU.asm +++ b/Source/HBIOS/cfg_NABU.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_RCEZ80.asm b/Source/HBIOS/cfg_RCEZ80.asm index 9d2f16b6..2d2c57c5 100644 --- a/Source/HBIOS/cfg_RCEZ80.asm +++ b/Source/HBIOS/cfg_RCEZ80.asm @@ -166,6 +166,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_RCZ180.asm b/Source/HBIOS/cfg_RCZ180.asm index 4b05b6a0..ec016b6e 100644 --- a/Source/HBIOS/cfg_RCZ180.asm +++ b/Source/HBIOS/cfg_RCZ180.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_RCZ280.asm b/Source/HBIOS/cfg_RCZ280.asm index 5da29efd..8e5bc2df 100644 --- a/Source/HBIOS/cfg_RCZ280.asm +++ b/Source/HBIOS/cfg_RCZ280.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_RCZ80.asm b/Source/HBIOS/cfg_RCZ80.asm index 4b92aa26..66f04201 100644 --- a/Source/HBIOS/cfg_RCZ80.asm +++ b/Source/HBIOS/cfg_RCZ80.asm @@ -171,6 +171,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_RPH.asm b/Source/HBIOS/cfg_RPH.asm index 521ad9b2..d260bd44 100644 --- a/Source/HBIOS/cfg_RPH.asm +++ b/Source/HBIOS/cfg_RPH.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_SBC.asm b/Source/HBIOS/cfg_SBC.asm index a41e3c88..3b4d9d65 100644 --- a/Source/HBIOS/cfg_SBC.asm +++ b/Source/HBIOS/cfg_SBC.asm @@ -163,6 +163,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_SCZ180.asm b/Source/HBIOS/cfg_SCZ180.asm index b1ef1195..01b0973d 100644 --- a/Source/HBIOS/cfg_SCZ180.asm +++ b/Source/HBIOS/cfg_SCZ180.asm @@ -168,6 +168,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_SZ180.asm b/Source/HBIOS/cfg_SZ180.asm index aba96380..a355116c 100644 --- a/Source/HBIOS/cfg_SZ180.asm +++ b/Source/HBIOS/cfg_SZ180.asm @@ -165,6 +165,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) ; PLDSERENABLE .SET FALSE ; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM) diff --git a/Source/HBIOS/cfg_SZ80.asm b/Source/HBIOS/cfg_SZ80.asm index 4b4a813e..753122da 100644 --- a/Source/HBIOS/cfg_SZ80.asm +++ b/Source/HBIOS/cfg_SZ80.asm @@ -158,6 +158,10 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) ; PLDSERENABLE .SET FALSE ; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM) diff --git a/Source/HBIOS/cfg_Z80RETRO.asm b/Source/HBIOS/cfg_Z80RETRO.asm index 28d3a0fc..0de6f6de 100644 --- a/Source/HBIOS/cfg_Z80RETRO.asm +++ b/Source/HBIOS/cfg_Z80RETRO.asm @@ -166,6 +166,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_ZETA.asm b/Source/HBIOS/cfg_ZETA.asm index 283da8b9..cb253639 100644 --- a/Source/HBIOS/cfg_ZETA.asm +++ b/Source/HBIOS/cfg_ZETA.asm @@ -155,6 +155,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/cfg_ZETA2.asm b/Source/HBIOS/cfg_ZETA2.asm index f2e126b0..11501264 100644 --- a/Source/HBIOS/cfg_ZETA2.asm +++ b/Source/HBIOS/cfg_ZETA2.asm @@ -166,6 +166,8 @@ DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF] ; DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; +MMRTCENABLE .SET FALSE ; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM) +; SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG SSERSTATUS .SET $FF ; SSER: STATUS PORT diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index a5a90614..ea69ed34 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -4257,9 +4257,6 @@ HB_INITTBL: #IF (SIMRTCENABLE) .DW SIMRTC_INIT #ENDIF -#IF (INTRTCENABLE) - .DW INTRTC_INIT -#ENDIF #IF (DS7RTCENABLE) .DW DS7RTC_INIT #ENDIF @@ -4275,6 +4272,12 @@ HB_INITTBL: #IF (PCRTCENABLE) .DW PCRTC_INIT #ENDIF +#IF (MMRTCENABLE) + .DW MMRTC_INIT +#ENDIF +#IF (INTRTCENABLE) + .DW INTRTC_INIT +#ENDIF #IF (CPUFAM == CPU_EZ80) ; INITALISE ONE OF THE SUPPORTED SYSTEM TIMER TICKS DRIVERS .DW EZ80_TMR_INIT @@ -8865,15 +8868,6 @@ SIZ_PCRTC .EQU $ - ORG_PCRTC MEMECHO " bytes.\n" #ENDIF ; -#IF (INTRTCENABLE) -ORG_INTRTC .EQU $ - #INCLUDE "intrtc.asm" -SIZ_INTRTC .EQU $ - ORG_INTRTC - MEMECHO "INTRTC occupies " - MEMECHO SIZ_INTRTC - MEMECHO " bytes.\n" -#ENDIF -; #IF (DS7RTCENABLE) ORG_DS7RTC .EQU $ #INCLUDE "ds7rtc.asm" @@ -8892,6 +8886,24 @@ SIZ_RP5RTC .EQU $ - ORG_RP5RTC MEMECHO " bytes.\n" #ENDIF ; +#IF (MMRTCENABLE) +ORG_MMRTC .EQU $ + #INCLUDE "mmrtc.asm" +SIZ_MMRTC .EQU $ - ORG_MMRTC + MEMECHO "MMRTC occupies " + MEMECHO SIZ_MMRTC + MEMECHO " bytes.\n" +#ENDIF +; +#IF (INTRTCENABLE) +ORG_INTRTC .EQU $ + #INCLUDE "intrtc.asm" +SIZ_INTRTC .EQU $ - ORG_INTRTC + MEMECHO "INTRTC occupies " + MEMECHO SIZ_INTRTC + MEMECHO " bytes.\n" +#ENDIF +; #IF (SSERENABLE) ORG_SSER .EQU $ #INCLUDE "sser.asm" diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc index 9032b151..e20bf0c1 100644 --- a/Source/HBIOS/hbios.inc +++ b/Source/HBIOS/hbios.inc @@ -438,6 +438,7 @@ RTCDEV_RP5 .EQU $05 ; RP5C01 RTCDEV_DS5 .EQU $06 ; DS1305 (SPI) RTCDEV_EZ80 .EQU $07 ; EZ80 ON-CHIP RTC RTCDEV_PC .EQU $08 ; PC style parallel RTC +RTCDEV_MM .EQU $09 ; NS MM58167B RTC (NO NVRAM) ; ; DSKY DEVICE IDS ; diff --git a/Source/HBIOS/romldr.asm b/Source/HBIOS/romldr.asm index dcdaf5a8..3d4f83f0 100644 --- a/Source/HBIOS/romldr.asm +++ b/Source/HBIOS/romldr.asm @@ -1230,26 +1230,26 @@ appload2: ; ;======================================================================= ; Routine - Copy chunk of data from Rom to a RAM location, source -; chunk may span banks. +; chunk may span banks. Source address must be <= 32768. ; param : HL=Source Adr, DE=Dest Adr, BC=Length, A=Source Bank ;======================================================================= ; -;;; loop: -;;; -;;; CPYLEN = (32768 - SRCADR) -;;; if (CPYLEN >= LEN) then CPYLEN = LEN -;;; LEN = (LEN - CPYLEN) ; do it here to avoid saving CPYLEN -;;; -;;; ; BnkCpy returns updated SRCADR, DSTADR -;;; call BnkCpy(SRCBNK:SRCADR, DSTBNK:DSTADR, CPYLEN) -;;; -;;; if (SRCADR == 32768) -;;; increment SRCBNK -;;; SRCADR = 0 -;;; -;;; if (LEN == 0) then done -;;; -;;; goto loop +; loop: +; +; CPYLEN = (32768 - SRCADR) +; if (CPYLEN >= LEN) then CPYLEN = LEN +; LEN = (LEN - CPYLEN) ; do it here to avoid saving CPYLEN +; +; ; BnkCpy returns updated SRCADR, DSTADR +; call BnkCpy(SRCBNK:SRCADR, DSTBNK:DSTADR, CPYLEN) +; +; if (SRCADR == 32768) +; increment SRCBNK +; SRCADR = 0 +; +; if (LEN == 0) then done +; +; goto loop ; #if (BIOS == BIOS_WBW) ;