diff --git a/Doc/RomWBW Hardware.pdf b/Doc/RomWBW Hardware.pdf index bc7a192e..7a825df4 100644 Binary files a/Doc/RomWBW Hardware.pdf and b/Doc/RomWBW Hardware.pdf differ diff --git a/Source/Doc/Hardware.md b/Source/Doc/Hardware.md index 016687ab..2b32f061 100644 --- a/Source/Doc/Hardware.md +++ b/Source/Doc/Hardware.md @@ -26,32 +26,32 @@ by RomWBW along with the standard pre-built ROM image(s). | [Zeta V2 Z80 SBC]^2^, ParPortProp | - | ZETA2_std.rom | 38400 | | [Mark IV Z180 SBC]^3^ | ECB | MK4_std.rom | 38400 | | [RCBus Z80 CPU Module]^4^, 512K RAM/ROM | RCBus | RCZ80_std.rom | 115200 | -| [RCBus Z80 CPU Module]^4^, 512K w/KIO | RCBus | RCZ80_kio_std.rom | 115200 | -| [RCBus Z180 CPU Module]^4^ w/ ext banking | RCBus | RCZ180_ext_std.rom | 115200 | -| [RCBus Z180 CPU Module]^4^ w/ native banking | RCBus | RCZ180_nat_std.rom | 115200 | -| [RCBus Z280 CPU Module]^4^ w/ ext banking | RCBus | RCZ280_ext_std.rom | 115200 | -| [RCBus Z280 CPU Module]^4^ w/ native banking | RCBus | RCZ280_nat_std.rom | 115200 | +| [RCBus Z80 CPU Module (KIO)]^4^, 512K w/KIO | RCBus | RCZ80_kio_std.rom | 115200 | +| [RCBus Z180 CPU Module (External)]^4^ | RCBus | RCZ180_ext_std.rom | 115200 | +| [RCBus Z180 CPU Module (Native)]^4^ | RCBus | RCZ180_nat_std.rom | 115200 | +| [RCBus Z280 CPU Module (External)]^4^ | RCBus | RCZ280_ext_std.rom | 115200 | +| [RCBus Z280 CPU Module (Native)]^4^ | RCBus | RCZ280_nat_std.rom | 115200 | | [RCBus eZ80 CPU Module]^13^, 512K RAM/ROM | RCBus | RCEZ80_std.rom | 115200 | | [Easy Z80 SBC]^2^ | RCBus | RCZ80_easy_std.rom | 115200 | | [Tiny Z80 SBC]^2^ | RCBus | RCZ80_tiny_std.rom | 115200 | | [Z80-512K CPU/RAM/ROM Module]^2^ | RCBus | RCZ80_skz_std.rom | 115200 | -| [Small Computer SC126 Z180 SBC]^5^ | BP80 | SCZ180_sc126_std.rom | 115200 | -| [Small Computer SC130 Z180 SBC]^5^ | RCBus | SCZ180_sc130_std.rom | 115200 | -| [Small Computer SC131 Z180 Pocket Comp]^5^ | - | SCZ180_sc131_std.rom | 115200 | -| [Small Computer SC140 Z180 CPU Module]^5^ | Z50 | SCZ180_sc140_std.rom | 115200 | -| [Small Computer SC503 Z180 CPU Module]^5^ | Z50 | SCZ180_sc503_std.rom | 115200 | -| [Small Computer SC700 Z180 CPU Module]^5^ | RCBus | SCZ180_sc700_std.rom | 115200 | +| [SC126 Z180 SBC]^5^ | BP80 | SCZ180_sc126_std.rom | 115200 | +| [SC130 Z180 SBC]^5^ | RCBus | SCZ180_sc130_std.rom | 115200 | +| [SC131 Z180 Pocket Comp]^5^ | - | SCZ180_sc131_std.rom | 115200 | +| [SC140 Z180 CPU Module]^5^ | Z50 | SCZ180_sc140_std.rom | 115200 | +| [SC503 Z180 CPU Module]^5^ | Z50 | SCZ180_sc503_std.rom | 115200 | +| [SC700 Z180 CPU Module]^5^ | RCBus | SCZ180_sc700_std.rom | 115200 | | [Dyno Z180 SBC]^6^ | Dyno | DYNO_std.rom | 38400 | | [Nhyodyne Z80 MBC]^1^ | MBC | MBC_std.rom | 38400 | | [Rhyophyre Z180 SBC]^1^ | - | RPH_std.rom | 38400 | | [Z80 ZRC CPU Module]^7^ | RCBus | RCZ80_zrc_std.rom | 115200 | -| [Z80 ZRC CPU Module]^7^ ROMless | RCBus | RCZ80_zrc_ram_std.rom | 115200 | +| [Z80 ZRC CPU Module (RAM)]^7^ | RCBus | RCZ80_zrc_ram_std.rom | 115200 | | [Z80 ZRC512 CPU Module]^7^ | RCBus | RCZ80_zrc512_std.rom | 115200 | | [Z80 EaZy80-512 CPU Module]^7^ | RCBus | RCZ80_ez512_std.rom | 115200 | | [Z80 K80W CPU Module]^7^ | RCBus | RCZ80_k80w_std.rom | 115200 | | [Z180 Z1RCC CPU Module]^7^ | RCBus | RCZ180_z1rcc_std.rom | 115200 | | [Z280 ZZRCC CPU Module]^7^ | RCBus | RCZ280_zzrcc_std.rom | 115200 | -| [Z280 ZZRCC CPU Module]^7^ ROMless | RCBus | RCZ280_zzrcc_ram_std.rom | 115200 | +| [Z280 ZZRCC CPU Module (RAM)]^7^ | RCBus | RCZ280_zzrcc_ram_std.rom | 115200 | | [Z280 ZZ80MB SBC]^7^ | RCBus | RCZ280_zz80mb_std.rom | 115200 | | [Z80-Retro SBC]^8^ | - | Z80RETRO_std.rom | 38400 | | [S100 Computers Z180]^9^ | S100 | S100_std.rom | 57600 | @@ -59,7 +59,7 @@ by RomWBW along with the standard pre-built ROM image(s). | [Heath H8 Z80 System]^10^ | H8 | HEATH_std.rom | 115200 | | [EP Mini-ITX Z180]^11^ | RCBus? | EPITX_std.rom | 115200 | | [NABU w/ RomWBW Option Board]^10^ | NABU | NABU_std.rom | 115200 | -| [S100 FPGA Z80]^9^ | S100 | FZ80_std.rom | 9600 | +| [FPGA Z80 S100]^9^ | S100 | FZ80_std.rom | 9600 | | [Genesis STD Z180]^12^ | STD | GMZ180_std.rom | 115200 | | ^1^Designed by Andrew Lynch @@ -110,43 +110,47 @@ program the image into the first 512KB of the ROM for now. # Platform Configurations -## RetroBrew Z80 SBC +## Duodyne -#### ROM Image File: SBC_std.rom +### Duodyne Z80 System + +#### ROM Image File: DUO_std.rom | | | |-------------------|---------------| | Default CPU Speed | 8.000 MHz | -| Interrupts | None | -| System Timer | None | +| Interrupts | Mode 2 | +| System Timer | CTC | | Serial Default | 38400 Baud | -| Memory Manager | SBC | +| Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- DSRTC: MODE=STD, IO=112 -- UART: MODE=SBC, IO=104 -- UART: MODE=CAS, IO=128 -- UART: MODE=MFP, IO=104 -- UART: MODE=4UART, IO=192 -- UART: MODE=4UART, IO=200 -- UART: MODE=4UART, IO=208 -- UART: MODE=4UART, IO=216 -- VGA: IO=224, KBD MODE=PS/2, KBD IO=224 -- CVDU: MODE=ECB, IO=224, KBD MODE=PS/2, KBD IO=226 -- CVDU occupies 905 bytes. -- KBD: ENABLED -- PRP: IO=168 -- PRPCON: ENABLED -- PRPSD: ENABLED +- FP: LEDIO=66, SWIO=66 +- DSRTC: MODE=STD, IO=148 +- PCF: IO=86 +- UART: IO=88 +- UART: IO=168 +- UART: IO=112 +- UART: IO=120 +- SIO MODE=ZP, IO=96, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=ZP, IO=96, CHANNEL B, INTERRUPTS ENABLED +- LPT: MODE=SPP, IO=72 +- DMA: MODE=DUO, IO=64 +- CH: IO=78 +- CHUSB: IO=78 +- CHSD: IO=78 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=DIO, IO=54, DRIVE 0, TYPE=3.5" HD -- FD: MODE=DIO, IO=54, DRIVE 1, TYPE=3.5" HD -- PPIDE: IO=96, MASTER -- PPIDE: IO=96, SLAVE +- FD: MODE=DUO, IO=128, DRIVE 0, TYPE=3.5" HD +- FD: MODE=DUO, IO=128, DRIVE 1, TYPE=3.5" HD +- PPIDE: IO=136, MASTER +- PPIDE: IO=136, SLAVE +- SD: MODE=MT, IO=140, UNITS=1 +- SPK: IO=148 +- CTC: IO=96, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED #### Notes: @@ -154,180 +158,236 @@ program the image into the first 512KB of the ROM for now. `\clearpage`{=latex} -## RetroBrew Z80 SimH +## Dyno -#### ROM Image File: SBC_simh.rom +### Dyno Z180 SBC + +#### ROM Image File: DYNO_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 8.000 MHz | -| Interrupts | Mode 1 | -| System Timer | SimH | +| Default CPU Speed | 18.432 MHz | +| Interrupts | Mode 2 | +| System Timer | Z180 | | Serial Default | 38400 Baud | -| Memory Manager | SBC | +| Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- SIMRTC: IO=254 -- SSER: IO=109 +- BQRTC: IO=80 +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED - MD: TYPE=RAM - MD: TYPE=ROM -- HDSK: IO=253, DEVICE COUNT=2 - +- FD: MODE=DYNO, IO=132, DRIVE 0, TYPE=3.5" HD +- FD: MODE=DYNO, IO=132, DRIVE 1, TYPE=3.5" HD +- PPIDE: IO=76, MASTER +- PPIDE: IO=76, SLAVE #### Notes: -- Image for SimH emulator -- CPU speed and Serial configuration not relevant in emulator - `\clearpage`{=latex} -## RetroBrew N8 Z180 SBC +## EP Mini-ITX -#### ROM Image File: N8_std.rom +### EP Mini-ITX Z180 + +#### ROM Image File: EPITX_std.rom | | | |-------------------|---------------| | Default CPU Speed | 18.432 MHz | | Interrupts | Mode 2 | | System Timer | Z180 | -| Serial Default | 38400 Baud | -| Memory Manager | N8 | +| Serial Default | 115200 Baud | +| Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- DSRTC: MODE=STD, IO=136 -- ASCI: IO=64, INTERRUPTS ENABLED -- ASCI: IO=65, INTERRUPTS ENABLED -- TMS: MODE=N8, IO=152, SCREEN=40X24, KEYBOARD=PPK -- PPK: ENABLED +- INTRTC: ENABLED +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED +- UART: IO=160 +- UART: IO=168 +- TMS: MODE=MSX, IO=152, SCREEN=40X24, KEYBOARD=NONE - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=N8, IO=140, DRIVE 0, TYPE=3.5" HD -- FD: MODE=N8, IO=140, DRIVE 1, TYPE=3.5" HD -- SD: MODE=CSIO, IO=136, UNITS=1 -- AY38910: MODE=N8, IO=156, CLOCK=1789772 HZ +- FD: MODE=EPFDC, IO=72, DRIVE 0, TYPE=3.5" HD +- FD: MODE=EPFDC, IO=72, DRIVE 1, TYPE=3.5" HD +- SD: MODE=EPITX, IO=66, UNITS=1 #### Notes: -- CPU speed will be dynamically measured at startup if DSRTC is present -- SD Card interface is configured for CSIO (N8 date code >= 2312) - `\clearpage`{=latex} -## Zeta Z80 SBC +## Easy Z80 -#### ROM Image File: ZETA_std.rom +### Easy Z80 SBC + +#### ROM Image File: RCZ80_easy_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 8.000 MHz | -| Interrupts | None | -| System Timer | None | -| Serial Default | 38400 Baud | -| Memory Manager | SBC | +| Default CPU Speed | 10.000 MHz | +| Interrupts | Mode 2 | +| System Timer | CTC | +| Serial Default | 115200 Baud | +| Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- DSRTC: MODE=STD, IO=112 -- UART: IO=104 -- PPP: IO=96 -- PPPCON: ENABLED -- PPPSD: ENABLED +- FP: LEDIO=0, SWIO=0 +- LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=STD, IO=192 +- INTRTC: ENABLED +- UART: IO=128 +- UART: IO=136 +- UART: IO=160 +- UART: IO=168 +- SIO MODE=STD, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=STD, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=DIO, IO=54, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE +- PPIDE: IO=32, MASTER +- PPIDE: IO=32, SLAVE +- SD: MODE=PIO, IO=105, UNITS=1 +- CTC: IO=136, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED #### Notes: - CPU speed will be dynamically measured at startup if DSRTC is present -- If ParPortProp is installed, initial console output is - determined by JP1: - - Shorted: console to on-board serial port - - Open: console to ParPortProp video and keyboard `\clearpage`{=latex} -## Zeta V2 Z80 SBC +### Tiny Z80 SBC -#### ROM Image File: ZETA2_std.rom +#### ROM Image File: RCZ80_tiny_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 8.000 MHz | +| Default CPU Speed | 16.000 MHz | | Interrupts | Mode 2 | | System Timer | CTC | -| Serial Default | 38400 Baud | +| Serial Default | 115200 Baud | | Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- DSRTC: MODE=STD, IO=112 -- UART: IO=104 -- PPP: IO=96 -- PPPCON: ENABLED -- PPPSD: ENABLED +- FP: LEDIO=0, SWIO=0 +- LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=STD, IO=192 +- INTRTC: ENABLED +- UART: IO=128 +- UART: IO=136 +- UART: IO=160 +- UART: IO=168 +- SIO MODE=STD, IO=24, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=STD, IO=24, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=ZETA2, IO=48, DRIVE 0, TYPE=3.5" HD -- CTC: IO=32, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED +- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=144, MASTER +- IDE: MODE=RC, IO=144, SLAVE +- PPIDE: IO=32, MASTER +- PPIDE: IO=32, SLAVE +- SD: MODE=PIO, IO=105, UNITS=1 +- CTC: IO=16, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED #### Notes: - CPU speed will be dynamically measured at startup if DSRTC is present -- If ParPortProp is installed, initial console output is - determined by JP1: - - Shorted: console to on-board serial port - - Open: console to ParPortProp video and keyboard `\clearpage`{=latex} -## Mark IV Z180 SBC +## FPGA Z80 -#### ROM Image File: MK4_std.rom +### FPGA Z80 S100 + +#### ROM Image File: FZ80_std.rom + +| | | +|-------------------|---------------| +| Default CPU Speed | 8.000 MHz | +| Interrupts | None | +| System Timer | None | +| Serial Default | 9600 Baud | +| Memory Manager | Z2 | +| ROM Size | 0 KB | +| RAM Size | 512 KB | + +#### Supported Hardware + +- FP: LEDIO=255 +- DS5RTC: RTCIO=104, IO=104 +- SSER: IO=52 +- LPT: MODE=S100, IO=199 +- FV: IO=192, KBD MODE=FV, KBD IO=3 +- KBD: ENABLED +- SCON: IO=0 +- MD: TYPE=RAM +- PPIDE: IO=48, MASTER +- PPIDE: IO=48, SLAVE +- SD: MODE=FZ80, IO=108, UNITS=2 + +#### Notes: + +- Requires matching FPGA code + +`\clearpage`{=latex} + +## Genesis + +### Genesis STD Z180 + +#### ROM Image File: GMZ180_std.rom | | | |-------------------|---------------| | Default CPU Speed | 18.432 MHz | | Interrupts | Mode 2 | | System Timer | Z180 | -| Serial Default | 38400 Baud | +| Serial Default | 115200 Baud | | Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- DSRTC: MODE=STD, IO=138 -- ASCI: IO=64, INTERRUPTS ENABLED -- ASCI: IO=65, INTERRUPTS ENABLED -- UART: IO=24 -- UART: IO=128 -- UART: IO=192 -- UART: IO=200 -- UART: IO=208 -- UART: IO=216 -- VGA: IO=224, KBD MODE=PS/2, KBD IO=224 -- CVDU: MODE=ECB, IO=224, KBD MODE=PS/2, KBD IO=226 -- KBD: ENABLED -- PRP: IO=168 -- PRPCON: ENABLED -- PRPSD: ENABLED +- GM7303: IO=48 +- DSRTC: MODE=STD, IO=132 +- INTRTC: ENABLED +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=DIDE, IO=42, DRIVE 0, TYPE=3.5" HD -- FD: MODE=DIDE, IO=42, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=MK4, IO=128, MASTER -- IDE: MODE=MK4, IO=128, SLAVE -- SD: MODE=MK4, IO=137, UNITS=1 +- IDE: MODE=GIDE, IO=32, MASTER +- IDE: MODE=GIDE, IO=32, SLAVE +- SD: MODE=GM, IO=132, UNITS=1 #### Notes: @@ -335,13 +395,15 @@ program the image into the first 512KB of the ROM for now. `\clearpage`{=latex} -## RCBus Z80 CPU Module +## Heathkit H8 -#### ROM Image File: RCZ80_std.rom +### Heath H8 Z80 System + +#### ROM Image File: HEATH_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 7.372 MHz | +| Default CPU Speed | 16.384 MHz | | Interrupts | Mode 1 | | System Timer | None | | Serial Default | 115200 Baud | @@ -351,94 +413,83 @@ program the image into the first 512KB of the ROM for now. #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=STD, IO=192 -- UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- ACIA: IO=128, INTERRUPTS ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- H8P: IO=240 +- INTRTC: ENABLED +- UART: IO=232 +- UART: IO=224 +- UART: IO=216 +- UART: IO=208 +- TMS: MODE=MSX, IO=152, SCREEN=80X24, KEYBOARD=NONE - MD: TYPE=RAM - MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 +- AY38910: MODE=MSX, IO=160, CLOCK=1789772 HZ #### Notes: -- CPU speed will be dynamically measured at startup if DSRTC is present - `\clearpage`{=latex} -#### ROM Image File: RCZ80_kio_std.rom +## Mark IV Z180 SBC + +### Mark IV Z180 SBC + +#### ROM Image File: MK4_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 7.372 MHz | +| Default CPU Speed | 18.432 MHz | | Interrupts | Mode 2 | -| System Timer | CTC | -| Serial Default | 115200 Baud | -| Memory Manager | Z2 | +| System Timer | Z180 | +| Serial Default | 38400 Baud | +| Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=STD, IO=192 -- INTRTC: ENABLED +- DSRTC: MODE=STD, IO=138 +- ASCI: IO=64, INTERRUPTS ENABLED +- ASCI: IO=65, INTERRUPTS ENABLED +- UART: IO=24 - UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=STD, IO=136, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=STD, IO=136, CHANNEL B, INTERRUPTS ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- UART: IO=192 +- UART: IO=200 +- UART: IO=208 +- UART: IO=216 +- VGA: IO=224, KBD MODE=PS/2, KBD IO=224 +- CVDU: MODE=ECB, IO=224, KBD MODE=PS/2, KBD IO=226 +- KBD: ENABLED +- PRP: IO=168 +- PRPCON: ENABLED +- PRPSD: ENABLED - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD -- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE -- PPIDE: IO=32, MASTER -- PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 -- KIO: IO=128 -- CTC: IO=132, TIMER MODE=TIMER/16, DIVISOR=9216, HI=256, LO=36, INTERRUPTS ENABLED +- FD: MODE=DIDE, IO=42, DRIVE 0, TYPE=3.5" HD +- FD: MODE=DIDE, IO=42, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=MK4, IO=128, MASTER +- IDE: MODE=MK4, IO=128, SLAVE +- SD: MODE=MK4, IO=137, UNITS=1 #### Notes: - CPU speed will be dynamically measured at startup if DSRTC is present -- SIO Serial baud rate managed by CTC `\clearpage`{=latex} -## RCBus Z180 CPU Module +## NABU -#### ROM Image File: RCZ180_ext_std.rom +### NABU w/ RomWBW Option Board + +#### ROM Image File: NABU_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | +| Default CPU Speed | 3.580 MHz | | Interrupts | Mode 2 | -| System Timer | Z180 | +| System Timer | TMS | | Serial Default | 115200 Baud | | Memory Manager | Z2 | | ROM Size | 512 KB | @@ -446,194 +497,198 @@ program the image into the first 512KB of the ROM for now. #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- DSRTC: MODE=STD, IO=12 +- NABU: IO=64 - INTRTC: ENABLED -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED +- UART: IO=72 +- TMS: MODE=NABU, IO=160, SCREEN=80X24, KEYBOARD=NABU, INTERRUPTS ENABLED +- NABUKB: IO=144 +- MD: TYPE=RAM +- MD: TYPE=ROM +- PPIDE: IO=96, MASTER +- PPIDE: IO=96, SLAVE +- AY38910: MODE=NABU, IO=65, CLOCK=1789772 HZ + +#### Notes: + +- TMS video assumes F18A replacement for TMS9918 + +`\clearpage`{=latex} + +## Nhyodyne + +### Nhyodyne Z80 MBC + +#### ROM Image File: MBC_std.rom + +| | | +|-------------------|---------------| +| Default CPU Speed | 8.000 MHz | +| Interrupts | None | +| System Timer | None | +| Serial Default | 38400 Baud | +| Memory Manager | MBC | +| ROM Size | 512 KB | +| RAM Size | 512 KB | + +#### Supported Hardware + +- PKD: IO=96, SIZE=8X1 +- DSRTC: MODE=STD, IO=112 +- UART: IO=104 - UART: IO=128 - UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- SIO MODE=ZP, IO=176, CHANNEL A +- SIO MODE=ZP, IO=176, CHANNEL B +- PIO: IO=184, CHANNEL A +- PIO: IO=184, CHANNEL B +- PIO: IO=188, CHANNEL A +- PIO: IO=188, CHANNEL B +- LPT: MODE=SPP, IO=232 +- CVDU: MODE=MBC, IO=224, KBD MODE=PS/2, KBD IO=226 +- TMS: MODE=MBC, IO=152, SCREEN=80X24, KEYBOARD=KBD +- KBD: ENABLED +- ESP: IO=156 +- ESPCON: ENABLED +- ESPSER: DEVICE=0 +- ESPSER: DEVICE=1 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD -- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE -- PPIDE: IO=32, MASTER -- PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 +- FD: MODE=MBC, IO=48, DRIVE 0, TYPE=3.5" HD +- FD: MODE=MBC, IO=48, DRIVE 1, TYPE=3.5" HD +- PPIDE: IO=96, MASTER +- PPIDE: IO=96, SLAVE +- SPK: IO=112 #### Notes: -- For use with Z2 bank switched memory board (Z2 external memory management) - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -#### ROM Image File: RCZ180_nat_std.rom +## RetroBrew Z80 + +### RetroBrew Z80 SBC + +#### ROM Image File: SBC_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | -| Interrupts | Mode 2 | -| System Timer | Z180 | -| Serial Default | 115200 Baud | -| Memory Manager | Z180 | +| Default CPU Speed | 8.000 MHz | +| Interrupts | None | +| System Timer | None | +| Serial Default | 38400 Baud | +| Memory Manager | SBC | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- DSRTC: MODE=STD, IO=12 -- INTRTC: ENABLED -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED -- UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- DSRTC: MODE=STD, IO=112 +- UART: MODE=SBC, IO=104 +- UART: MODE=CAS, IO=128 +- UART: MODE=MFP, IO=104 +- UART: MODE=4UART, IO=192 +- UART: MODE=4UART, IO=200 +- UART: MODE=4UART, IO=208 +- UART: MODE=4UART, IO=216 +- VGA: IO=224, KBD MODE=PS/2, KBD IO=224 +- CVDU: MODE=ECB, IO=224, KBD MODE=PS/2, KBD IO=226 +- CVDU occupies 905 bytes. +- KBD: ENABLED +- PRP: IO=168 +- PRPCON: ENABLED +- PRPSD: ENABLED - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD -- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE -- PPIDE: IO=32, MASTER -- PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 +- FD: MODE=DIO, IO=54, DRIVE 0, TYPE=3.5" HD +- FD: MODE=DIO, IO=54, DRIVE 1, TYPE=3.5" HD +- PPIDE: IO=96, MASTER +- PPIDE: IO=96, SLAVE #### Notes: -- For use with linear memory board (Z180 native memory management) - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -## RCBus Z280 CPU Module +### RetroBrew Z80 SimH -#### ROM Image File: RCZ280_ext_std.rom +#### ROM Image File: SBC_simh.rom | | | |-------------------|---------------| -| Default CPU Speed | 12.000 MHz | +| Default CPU Speed | 8.000 MHz | | Interrupts | Mode 1 | -| System Timer | None | -| Serial Default | 115200 Baud | -| Memory Manager | Z2 | +| System Timer | SimH | +| Serial Default | 38400 Baud | +| Memory Manager | SBC | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=STD, IO=192 -- INTRTC: ENABLED -- Z2U: IO=16 -- UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- ACIA: IO=128, INTERRUPTS ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- SIMRTC: IO=254 +- SSER: IO=109 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD -- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE -- PPIDE: IO=32, MASTER -- PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 +- HDSK: IO=253, DEVICE COUNT=2 + #### Notes: -- For use with Z2 bank switched memory board (Z2 external memory management) +- Image for SimH emulator +- CPU speed and Serial configuration not relevant in emulator `\clearpage`{=latex} -#### ROM Image File: RCZ280_nat_std.rom +## RetroBrew N8 + +### RetroBrew N8 Z180 SBC + +#### ROM Image File: N8_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 12.000 MHz | -| Interrupts | Mode 3 | -| System Timer | Z280 | -| Serial Default | 115200 Baud | -| Memory Manager | Z280 | +| Default CPU Speed | 18.432 MHz | +| Interrupts | Mode 2 | +| System Timer | Z180 | +| Serial Default | 38400 Baud | +| Memory Manager | N8 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=STD, IO=192 -- INTRTC: ENABLED -- Z2U: IO=16, INTERRUPTS ENABLED -- UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- DSRTC: MODE=STD, IO=136 +- ASCI: IO=64, INTERRUPTS ENABLED +- ASCI: IO=65, INTERRUPTS ENABLED +- TMS: MODE=N8, IO=152, SCREEN=40X24, KEYBOARD=PPK +- PPK: ENABLED - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD -- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE -- PPIDE: IO=32, MASTER -- PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 +- FD: MODE=N8, IO=140, DRIVE 0, TYPE=3.5" HD +- FD: MODE=N8, IO=140, DRIVE 1, TYPE=3.5" HD +- SD: MODE=CSIO, IO=136, UNITS=1 +- AY38910: MODE=N8, IO=156, CLOCK=1789772 HZ #### Notes: -- For use with linear memory board (Z280 native memory management) +- CPU speed will be dynamically measured at startup if DSRTC is present +- SD Card interface is configured for CSIO (N8 date code >= 2312) `\clearpage`{=latex} -## RCBus eZ80 CPU Module +## RCBus Z80 -#### ROM Image File: RCEZ80_std.rom +### RCBus Z80 CPU Module + +#### ROM Image File: RCZ80_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 20.000 MHz | +| Default CPU Speed | 7.372 MHz | | Interrupts | Mode 1 | -| System Timer | EZ80 | +| System Timer | None | | Serial Default | 115200 Baud | | Memory Manager | Z2 | | ROM Size | 512 KB | @@ -643,6 +698,16 @@ program the image into the first 512KB of the ROM for now. - FP: LEDIO=0, SWIO=0 - LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=STD, IO=192 +- UART: IO=128 +- UART: IO=136 +- UART: IO=160 +- UART: IO=168 +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- ACIA: IO=128, INTERRUPTS ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 @@ -655,22 +720,21 @@ program the image into the first 512KB of the ROM for now. - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- EZ80: CPU DRIVER -- EZ80: SYS TIMER DRIVER -- EZ80: RTC DRIVER -- EZ80: UART DRIVER +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: +- CPU speed will be dynamically measured at startup if DSRTC is present + `\clearpage`{=latex} -## Easy Z80 SBC +### RCBus Z80 CPU Module (KIO) -#### ROM Image File: RCZ80_easy_std.rom +#### ROM Image File: RCZ80_kio_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 10.000 MHz | +| Default CPU Speed | 7.372 MHz | | Interrupts | Mode 2 | | System Timer | CTC | | Serial Default | 115200 Baud | @@ -688,10 +752,8 @@ program the image into the first 512KB of the ROM for now. - UART: IO=136 - UART: IO=160 - UART: IO=168 -- SIO MODE=STD, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=STD, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=STD, IO=136, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=STD, IO=136, CHANNEL B, INTERRUPTS ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 @@ -705,23 +767,25 @@ program the image into the first 512KB of the ROM for now. - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE - SD: MODE=PIO, IO=105, UNITS=1 -- CTC: IO=136, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED +- KIO: IO=128 +- CTC: IO=132, TIMER MODE=TIMER/16, DIVISOR=9216, HI=256, LO=36, INTERRUPTS ENABLED #### Notes: - CPU speed will be dynamically measured at startup if DSRTC is present +- SIO Serial baud rate managed by CTC `\clearpage`{=latex} -## Tiny Z80 SBC +### Z80-512K CPU/RAM/ROM Module -#### ROM Image File: RCZ80_tiny_std.rom +#### ROM Image File: RCZ80_skz_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 16.000 MHz | -| Interrupts | Mode 2 | -| System Timer | CTC | +| Default CPU Speed | 7.372 MHz | +| Interrupts | Mode 1 | +| System Timer | None | | Serial Default | 115200 Baud | | Memory Manager | Z2 | | ROM Size | 512 KB | @@ -732,15 +796,15 @@ program the image into the first 512KB of the ROM for now. - FP: LEDIO=0, SWIO=0 - LCD: IO=218, SIZE=20X4 - DSRTC: MODE=STD, IO=192 -- INTRTC: ENABLED - UART: IO=128 - UART: IO=136 - UART: IO=160 - UART: IO=168 -- SIO MODE=STD, IO=24, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=STD, IO=24, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- ACIA: IO=128, INTERRUPTS ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 @@ -749,12 +813,11 @@ program the image into the first 512KB of the ROM for now. - MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=144, MASTER -- IDE: MODE=RC, IO=144, SLAVE +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE - SD: MODE=PIO, IO=105, UNITS=1 -- CTC: IO=16, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED #### Notes: @@ -762,19 +825,19 @@ program the image into the first 512KB of the ROM for now. `\clearpage`{=latex} -## Z80-512K CPU/RAM/ROM Module +### Z80 ZRC CPU Module -#### ROM Image File: RCZ80_skz_std.rom +#### ROM Image File: RCZ80_zrc_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 7.372 MHz | +| Default CPU Speed | 14.745 MHz | | Interrupts | Mode 1 | | System Timer | None | | Serial Default | 115200 Baud | -| Memory Manager | Z2 | +| Memory Manager | ZRC | | ROM Size | 512 KB | -| RAM Size | 512 KB | +| RAM Size | 1536 KB | #### Supported Hardware @@ -790,6 +853,8 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED - ACIA: IO=128, INTERRUPTS ENABLED +- VRC: IO=0, KBD MODE=VRC, KBD IO=244 +- KBD: ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 @@ -806,30 +871,31 @@ program the image into the first 512KB of the ROM for now. #### Notes: +- ZRC is actually contains no ROM and 2MB of RAM. The first 512KB + of RAM is loaded from disk and then handled like ROM. - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -## Small Computer SC126 Z180 SBC +### Z80 ZRC CPU Module (RAM) -#### ROM Image File: SCZ180_sc126_std.rom +#### ROM Image File: RCZ80_zrc_ram_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | -| Interrupts | Mode 2 | -| System Timer | Z180 | +| Default CPU Speed | 14.745 MHz | +| Interrupts | Mode 1 | +| System Timer | None | | Serial Default | 115200 Baud | -| Memory Manager | Z180 | -| ROM Size | 512 KB | +| Memory Manager | ZRC | +| ROM Size | 0 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=13, SWIO=0 -- DSRTC: MODE=STD, IO=12 -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED +- FP: LEDIO=0, SWIO=0 +- LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=STD, IO=192 - UART: IO=128 - UART: IO=136 - UART: IO=160 @@ -838,50 +904,48 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- ACIA: IO=128, INTERRUPTS ENABLED +- VRC: IO=0, KBD MODE=VRC, KBD IO=244 +- KBD: ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 - CHUSB: IO=60 - MD: TYPE=RAM -- MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD - IDE: MODE=RC, IO=16, MASTER - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=SC, IO=12, UNITS=1 +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: +- ROMless boot -- HBIOS is loaded from disk at boot - CPU speed will be dynamically measured at startup if DSRTC is present -- When disabled, watchdog requires /IM to be pulsed. If an RCBus module - holds the CPU in WAIT for more than this, the watchdog will fire when - disabled with random consequences. The Pico SD does this at power-on. `\clearpage`{=latex} -## Small Computer SC130 Z180 SBC +### Z80 ZRC512 CPU Module -#### ROM Image File: SCZ180_sc130_std.rom +#### ROM Image File: RCZ80_zrc512_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | -| Interrupts | Mode 2 | -| System Timer | Z180 | +| Default CPU Speed | 22.000 MHz | +| Interrupts | Mode 1 | +| System Timer | None | | Serial Default | 115200 Baud | -| Memory Manager | Z180 | -| ROM Size | 512 KB | +| Memory Manager | ZRC | +| ROM Size | 0 KB | | RAM Size | 512 KB | #### Supported Hardware - FP: LEDIO=0, SWIO=0 -- DSRTC: MODE=STD, IO=12 -- INTRTC: ENABLED -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED +- LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=STD, IO=192 - UART: IO=128 - UART: IO=136 - UART: IO=160 @@ -890,82 +954,88 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- ACIA: IO=128, INTERRUPTS ENABLED +- VRC: IO=0, KBD MODE=VRC, KBD IO=244 +- KBD: ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 - CHUSB: IO=60 - MD: TYPE=RAM -- MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD - IDE: MODE=RC, IO=16, MASTER - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=SC, IO=12, UNITS=1 +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: +- ROMless boot -- HBIOS is loaded from disk at boot - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -## Small Computer SC131 Z180 Pocket Comp +### Z80 EaZy80-512 CPU Module -#### ROM Image File: SCZ180_sc131_std.rom +#### ROM Image File: RCZ80_ez512_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | +| Default CPU Speed | 22.000 MHz | | Interrupts | Mode 2 | -| System Timer | Z180 | +| System Timer | None | | Serial Default | 115200 Baud | -| Memory Manager | Z180 | -| ROM Size | 512 KB | +| Memory Manager | EZ512 | +| ROM Size | 0 KB | | RAM Size | 512 KB | #### Supported Hardware -- INTRTC: ENABLED -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED +- DSRTC: MODE=STD, IO=192 +- SIO MODE=STD, IO=8, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=STD, IO=8, CHANNEL B, INTERRUPTS ENABLED - MD: TYPE=RAM -- MD: TYPE=ROM -- SD: MODE=SC, IO=12, UNITS=1 +- MD occupies 409 bytes. +- SD: MODE=EZ512, IO=2, UNITS=1 +- KIO: IO=0 +- CTC: IO=4 #### Notes: +- HBIOS is loaded from disk at boot by ROM monitor +- CPU speed will be dynamically measured at startup if DSRTC is present + `\clearpage`{=latex} -## Small Computer SC140 Z180 CPU Module +### Z80 K80W CPU Module -#### ROM Image File: SCZ180_sc140_std.rom +#### ROM Image File: RCZ80_k80w_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | +| Default CPU Speed | 22.000 MHz | | Interrupts | Mode 2 | -| System Timer | Z180 | +| System Timer | None | | Serial Default | 115200 Baud | -| Memory Manager | Z180 | +| Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=160, SWIO=160 -- DSRTC: MODE=STD, IO=12 -- INTRTC: ENABLED -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED +- FP: LEDIO=0, SWIO=0 +- LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=K80W, IO=192 - UART: IO=128 - UART: IO=136 - UART: IO=160 - UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=STD, IO=136, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=STD, IO=136, CHANNEL B, INTERRUPTS ENABLED +- VRC: IO=0, KBD MODE=VRC, KBD IO=244 +- KBD: ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 @@ -974,11 +1044,13 @@ program the image into the first 512KB of the ROM for now. - MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=144, MASTER -- IDE: MODE=RC, IO=144, SLAVE +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=SC, IO=12, UNITS=1 +- SD: MODE=EZ512, IO=130, UNITS=1 +- KIO: IO=128 +- CTC: IO=132 #### Notes: @@ -986,9 +1058,11 @@ program the image into the first 512KB of the ROM for now. `\clearpage`{=latex} -## Small Computer SC503 Z180 CPU Module +## RCBus Z180 -#### ROM Image File: SCZ180_sc503_std.rom +### RCBus Z180 CPU Module (External) + +#### ROM Image File: RCZ180_ext_std.rom | | | |-------------------|---------------| @@ -996,13 +1070,13 @@ program the image into the first 512KB of the ROM for now. | Interrupts | Mode 2 | | System Timer | Z180 | | Serial Default | 115200 Baud | -| Memory Manager | Z180 | +| Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=160, SWIO=160 +- FP: LEDIO=0, SWIO=0 - DSRTC: MODE=STD, IO=12 - INTRTC: ENABLED - ASCI: IO=192, INTERRUPTS ENABLED @@ -1023,21 +1097,22 @@ program the image into the first 512KB of the ROM for now. - MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=144, MASTER -- IDE: MODE=RC, IO=144, SLAVE +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=SC, IO=12, UNITS=1 +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: +- For use with Z2 bank switched memory board (Z2 external memory management) - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -## Small Computer SC700 Z180 CPU Module +### RCBus Z180 CPU Module (Native) -#### ROM Image File: SCZ180_sc700_std.rom +#### ROM Image File: RCZ180_nat_std.rom | | | |-------------------|---------------| @@ -1051,8 +1126,7 @@ program the image into the first 512KB of the ROM for now. #### Supported Hardware -- FP: LEDIO=0 -- LCD: IO=170, SIZE=20X4 +- FP: LEDIO=0, SWIO=0 - DSRTC: MODE=STD, IO=12 - INTRTC: ENABLED - ASCI: IO=192, INTERRUPTS ENABLED @@ -1077,144 +1151,186 @@ program the image into the first 512KB of the ROM for now. - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=SC, IO=12, UNITS=1 +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: +- For use with linear memory board (Z180 native memory management) - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -## Dyno Z180 SBC +### Z180 Z1RCC CPU Module -#### ROM Image File: DYNO_std.rom +#### ROM Image File: RCZ180_z1rcc_std.rom | | | |-------------------|---------------| | Default CPU Speed | 18.432 MHz | | Interrupts | Mode 2 | | System Timer | Z180 | -| Serial Default | 38400 Baud | +| Serial Default | 115200 Baud | | Memory Manager | Z180 | -| ROM Size | 512 KB | +| ROM Size | 0 KB | | RAM Size | 512 KB | #### Supported Hardware -- BQRTC: IO=80 +- FP: LEDIO=0, SWIO=0 +- DSRTC: MODE=STD, IO=12 +- INTRTC: ENABLED - ASCI: IO=192, INTERRUPTS ENABLED - ASCI: IO=193, INTERRUPTS ENABLED +- UART: IO=128 +- UART: IO=136 +- UART: IO=160 +- UART: IO=168 +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM -- MD: TYPE=ROM -- FD: MODE=DYNO, IO=132, DRIVE 0, TYPE=3.5" HD -- FD: MODE=DYNO, IO=132, DRIVE 1, TYPE=3.5" HD -- PPIDE: IO=76, MASTER -- PPIDE: IO=76, SLAVE +- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE +- PPIDE: IO=32, MASTER +- PPIDE: IO=32, SLAVE +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: +- ROMless boot -- HBIOS is loaded from disk at boot +- CPU speed will be dynamically measured at startup if DSRTC is present + `\clearpage`{=latex} -## Nhyodyne Z80 MBC +## RCBus Z280 -#### ROM Image File: MBC_std.rom +### RCBus Z280 CPU Module (External) + +#### ROM Image File: RCZ280_ext_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 8.000 MHz | -| Interrupts | None | +| Default CPU Speed | 12.000 MHz | +| Interrupts | Mode 1 | | System Timer | None | -| Serial Default | 38400 Baud | -| Memory Manager | MBC | +| Serial Default | 115200 Baud | +| Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- PKD: IO=96, SIZE=8X1 -- DSRTC: MODE=STD, IO=112 -- UART: IO=104 +- FP: LEDIO=0, SWIO=0 +- LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=STD, IO=192 +- INTRTC: ENABLED +- Z2U: IO=16 - UART: IO=128 - UART: IO=136 -- SIO MODE=ZP, IO=176, CHANNEL A -- SIO MODE=ZP, IO=176, CHANNEL B -- PIO: IO=184, CHANNEL A -- PIO: IO=184, CHANNEL B -- PIO: IO=188, CHANNEL A -- PIO: IO=188, CHANNEL B -- LPT: MODE=SPP, IO=232 -- CVDU: MODE=MBC, IO=224, KBD MODE=PS/2, KBD IO=226 -- TMS: MODE=MBC, IO=152, SCREEN=80X24, KEYBOARD=KBD -- KBD: ENABLED -- ESP: IO=156 -- ESPCON: ENABLED -- ESPSER: DEVICE=0 -- ESPSER: DEVICE=1 +- UART: IO=160 +- UART: IO=168 +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- ACIA: IO=128, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=MBC, IO=48, DRIVE 0, TYPE=3.5" HD -- FD: MODE=MBC, IO=48, DRIVE 1, TYPE=3.5" HD -- PPIDE: IO=96, MASTER -- PPIDE: IO=96, SLAVE -- SPK: IO=112 +- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE +- PPIDE: IO=32, MASTER +- PPIDE: IO=32, SLAVE +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: -- CPU speed will be dynamically measured at startup if DSRTC is present +- For use with Z2 bank switched memory board (Z2 external memory management) `\clearpage`{=latex} -## Rhyophyre Z180 SBC +### RCBus Z280 CPU Module (Native) -#### ROM Image File: RPH_std.rom +#### ROM Image File: RCZ280_nat_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | -| Interrupts | None | -| System Timer | None | -| Serial Default | 38400 Baud | -| Memory Manager | RPH | +| Default CPU Speed | 12.000 MHz | +| Interrupts | Mode 3 | +| System Timer | Z280 | +| Serial Default | 115200 Baud | +| Memory Manager | Z280 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- DSRTC: MODE=STD, IO=132 -- ASCI: IO=64 -- ASCI: IO=65 -- GDC: MODE=RPH, DISPLAY=EGA, IO=144 -- KBD: ENABLED +- FP: LEDIO=0, SWIO=0 +- LCD: IO=218, SIZE=20X4 +- DSRTC: MODE=STD, IO=192 +- INTRTC: ENABLED +- Z2U: IO=16, INTERRUPTS ENABLED +- UART: IO=128 +- UART: IO=136 +- UART: IO=160 +- UART: IO=168 +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM - MD: TYPE=ROM -- PPIDE: IO=136, MASTER -- PPIDE: IO=136, SLAVE +- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE +- PPIDE: IO=32, MASTER +- PPIDE: IO=32, SLAVE +- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: -- CPU speed will be dynamically measured at startup if DSRTC is present +- For use with linear memory board (Z280 native memory management) `\clearpage`{=latex} -## Z80 ZRC CPU Module +### Z280 ZZRCC CPU Module -#### ROM Image File: RCZ80_zrc_std.rom +#### ROM Image File: RCZ280_zzrcc_std.rom | | | |-------------------|---------------| | Default CPU Speed | 14.745 MHz | -| Interrupts | Mode 1 | -| System Timer | None | +| Interrupts | Mode 3 | +| System Timer | Z280 | | Serial Default | 115200 Baud | -| Memory Manager | ZRC | -| ROM Size | 512 KB | -| RAM Size | 1536 KB | +| Memory Manager | Z280 | +| ROM Size | 256 KB | +| RAM Size | 256 KB | #### Supported Hardware - FP: LEDIO=0, SWIO=0 - LCD: IO=218, SIZE=20X4 - DSRTC: MODE=STD, IO=192 +- INTRTC: ENABLED +- Z2U: IO=16, INTERRUPTS ENABLED - UART: IO=128 - UART: IO=136 - UART: IO=160 @@ -1223,7 +1339,6 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- ACIA: IO=128, INTERRUPTS ENABLED - VRC: IO=0, KBD MODE=VRC, KBD IO=244 - KBD: ENABLED - CH: IO=62 @@ -1238,25 +1353,26 @@ program the image into the first 512KB of the ROM for now. - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: -- ZRC is actually contains no ROM and 2MB of RAM. The first 512KB +- ZZRCC actually contains no ROM and 512KB of RAM. The first 256KB of RAM is loaded from disk and then handled like ROM. - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -#### ROM Image File: RCZ80_zrc_ram_std.rom +### Z280 ZZRCC CPU Module (RAM) + +#### ROM Image File: RCZ280_zzrcc_ram_std.rom | | | |-------------------|---------------| | Default CPU Speed | 14.745 MHz | -| Interrupts | Mode 1 | -| System Timer | None | +| Interrupts | Mode 3 | +| System Timer | Z280 | | Serial Default | 115200 Baud | -| Memory Manager | ZRC | +| Memory Manager | Z280 | | ROM Size | 0 KB | | RAM Size | 512 KB | @@ -1265,6 +1381,8 @@ program the image into the first 512KB of the ROM for now. - FP: LEDIO=0, SWIO=0 - LCD: IO=218, SIZE=20X4 - DSRTC: MODE=STD, IO=192 +- INTRTC: ENABLED +- Z2U: IO=16, INTERRUPTS ENABLED - UART: IO=128 - UART: IO=136 - UART: IO=160 @@ -1273,7 +1391,6 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- ACIA: IO=128, INTERRUPTS ENABLED - VRC: IO=0, KBD MODE=VRC, KBD IO=244 - KBD: ENABLED - CH: IO=62 @@ -1287,7 +1404,6 @@ program the image into the first 512KB of the ROM for now. - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: @@ -1296,18 +1412,18 @@ program the image into the first 512KB of the ROM for now. `\clearpage`{=latex} -## Z80 ZRC512 CPU Module +### Z280 ZZ80MB SBC -#### ROM Image File: RCZ80_zrc512_std.rom +#### ROM Image File: RCZ280_zz80mb_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 22.000 MHz | -| Interrupts | Mode 1 | -| System Timer | None | +| Default CPU Speed | 12.000 MHz | +| Interrupts | Mode 3 | +| System Timer | Z280 | | Serial Default | 115200 Baud | -| Memory Manager | ZRC | -| ROM Size | 0 KB | +| Memory Manager | Z280 | +| ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware @@ -1315,6 +1431,8 @@ program the image into the first 512KB of the ROM for now. - FP: LEDIO=0, SWIO=0 - LCD: IO=218, SIZE=20X4 - DSRTC: MODE=STD, IO=192 +- INTRTC: ENABLED +- Z2U: IO=16, INTERRUPTS ENABLED - UART: IO=128 - UART: IO=136 - UART: IO=160 @@ -1323,7 +1441,6 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- ACIA: IO=128, INTERRUPTS ENABLED - VRC: IO=0, KBD MODE=VRC, KBD IO=244 - KBD: ENABLED - CH: IO=62 @@ -1331,62 +1448,31 @@ program the image into the first 512KB of the ROM for now. - CHUSB: IO=62 - CHUSB: IO=60 - MD: TYPE=RAM +- MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD - IDE: MODE=RC, IO=16, MASTER - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 #### Notes: -- ROMless boot -- HBIOS is loaded from disk at boot - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -## Z80 EaZy80-512 CPU Module - -#### ROM Image File: RCZ80_ez512_std.rom - -| | | -|-------------------|---------------| -| Default CPU Speed | 22.000 MHz | -| Interrupts | Mode 2 | -| System Timer | None | -| Serial Default | 115200 Baud | -| Memory Manager | EZ512 | -| ROM Size | 0 KB | -| RAM Size | 512 KB | - -#### Supported Hardware - -- DSRTC: MODE=STD, IO=192 -- SIO MODE=STD, IO=8, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=STD, IO=8, CHANNEL B, INTERRUPTS ENABLED -- MD: TYPE=RAM -- MD occupies 409 bytes. -- SD: MODE=EZ512, IO=2, UNITS=1 -- KIO: IO=0 -- CTC: IO=4 - -#### Notes: - -- HBIOS is loaded from disk at boot by ROM monitor -- CPU speed will be dynamically measured at startup if DSRTC is present - -`\clearpage`{=latex} +## RCBus eZ80 -## Z80 K80W CPU Module +### RCBus eZ80 CPU Module -#### ROM Image File: RCZ80_k80w_std.rom +#### ROM Image File: RCEZ80_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 22.000 MHz | -| Interrupts | Mode 2 | -| System Timer | None | +| Default CPU Speed | 20.000 MHz | +| Interrupts | Mode 1 | +| System Timer | EZ80 | | Serial Default | 115200 Baud | | Memory Manager | Z2 | | ROM Size | 512 KB | @@ -1396,15 +1482,6 @@ program the image into the first 512KB of the ROM for now. - FP: LEDIO=0, SWIO=0 - LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=K80W, IO=192 -- UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=STD, IO=136, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=STD, IO=136, CHANNEL B, INTERRUPTS ENABLED -- VRC: IO=0, KBD MODE=VRC, KBD IO=244 -- KBD: ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 @@ -1417,136 +1494,111 @@ program the image into the first 512KB of the ROM for now. - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- SD: MODE=EZ512, IO=130, UNITS=1 -- KIO: IO=128 -- CTC: IO=132 +- EZ80: CPU DRIVER +- EZ80: SYS TIMER DRIVER +- EZ80: RTC DRIVER +- EZ80: UART DRIVER #### Notes: -- CPU speed will be dynamically measured at startup if DSRTC is present - `\clearpage`{=latex} -## Z180 Z1RCC CPU Module +## Rhyophyre -#### ROM Image File: RCZ180_z1rcc_std.rom +### Rhyophyre Z180 SBC + +#### ROM Image File: RPH_std.rom | | | |-------------------|---------------| | Default CPU Speed | 18.432 MHz | -| Interrupts | Mode 2 | -| System Timer | Z180 | -| Serial Default | 115200 Baud | -| Memory Manager | Z180 | -| ROM Size | 0 KB | +| Interrupts | None | +| System Timer | None | +| Serial Default | 38400 Baud | +| Memory Manager | RPH | +| ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- DSRTC: MODE=STD, IO=12 -- INTRTC: ENABLED -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED -- UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- DSRTC: MODE=STD, IO=132 +- ASCI: IO=64 +- ASCI: IO=65 +- GDC: MODE=RPH, DISPLAY=EGA, IO=144 +- KBD: ENABLED - MD: TYPE=RAM -- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD -- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE -- PPIDE: IO=32, MASTER -- PPIDE: IO=32, SLAVE -- SD: MODE=PIO, IO=105, UNITS=1 +- MD: TYPE=ROM +- PPIDE: IO=136, MASTER +- PPIDE: IO=136, SLAVE #### Notes: -- ROMless boot -- HBIOS is loaded from disk at boot - CPU speed will be dynamically measured at startup if DSRTC is present `\clearpage`{=latex} -## Z280 ZZRCC CPU Module +## S100 -#### ROM Image File: RCZ280_zzrcc_std.rom +### S100 Computers Z180 + +#### ROM Image File: S100_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 14.745 MHz | -| Interrupts | Mode 3 | -| System Timer | Z280 | -| Serial Default | 115200 Baud | -| Memory Manager | Z280 | -| ROM Size | 256 KB | -| RAM Size | 256 KB | +| Default CPU Speed | 18.432 MHz | +| Interrupts | Mode 2 | +| System Timer | Z180 | +| Serial Default | 57600 Baud | +| Memory Manager | Z180 | +| ROM Size | 512 KB | +| RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=STD, IO=192 - INTRTC: ENABLED -- Z2U: IO=16, INTERRUPTS ENABLED -- UART: IO=128 -- UART: IO=136 -- UART: IO=160 -- UART: IO=168 -- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- VRC: IO=0, KBD MODE=VRC, KBD IO=244 -- KBD: ENABLED -- CH: IO=62 -- CH: IO=60 -- CHUSB: IO=62 -- CHUSB: IO=60 +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED +- SCON: IO=0 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD -- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD -- IDE: MODE=RC, IO=16, MASTER -- IDE: MODE=RC, IO=16, SLAVE -- PPIDE: IO=32, MASTER -- PPIDE: IO=32, SLAVE +- SD: MODE=SC, IO=12, UNITS=1 #### Notes: -- ZZRCC actually contains no ROM and 512KB of RAM. The first 256KB - of RAM is loaded from disk and then handled like ROM. -- CPU speed will be dynamically measured at startup if DSRTC is present +- Z180 SBC SW2 (IOBYTE) Dip Switches: + +| Bit | Setting | Function | +|-----|---------|-------------------------------------| +| 0 | Off | Use Z180 ASCI Channel A for console | +| | On | Use Propeller Console | +| | | | +| 1 | Off | Boot to RomWBW Boot Loader | +| | On | Boot to S100 Monitor | `\clearpage`{=latex} -#### ROM Image File: RCZ280_zzrcc_ram_std.rom +## Small Computer Central Z180 + +### SC126 Z180 SBC + +#### ROM Image File: SCZ180_sc126_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 14.745 MHz | -| Interrupts | Mode 3 | -| System Timer | Z280 | +| Default CPU Speed | 18.432 MHz | +| Interrupts | Mode 2 | +| System Timer | Z180 | | Serial Default | 115200 Baud | -| Memory Manager | Z280 | -| ROM Size | 0 KB | +| Memory Manager | Z180 | +| ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=0, SWIO=0 -- LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=STD, IO=192 -- INTRTC: ENABLED -- Z2U: IO=16, INTERRUPTS ENABLED +- FP: LEDIO=13, SWIO=0 +- DSRTC: MODE=STD, IO=12 +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED - UART: IO=128 - UART: IO=136 - UART: IO=160 @@ -1555,48 +1607,50 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- VRC: IO=0, KBD MODE=VRC, KBD IO=244 -- KBD: ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 - CHUSB: IO=60 - MD: TYPE=RAM +- MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD - IDE: MODE=RC, IO=16, MASTER - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE +- SD: MODE=SC, IO=12, UNITS=1 #### Notes: -- ROMless boot -- HBIOS is loaded from disk at boot - CPU speed will be dynamically measured at startup if DSRTC is present +- When disabled, watchdog requires /IM to be pulsed. If an RCBus module + holds the CPU in WAIT for more than this, the watchdog will fire when + disabled with random consequences. The Pico SD does this at power-on. `\clearpage`{=latex} -## Z280 ZZ80MB SBC +### SC130 Z180 SBC -#### ROM Image File: RCZ280_zz80mb_std.rom +#### ROM Image File: SCZ180_sc130_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 12.000 MHz | -| Interrupts | Mode 3 | -| System Timer | Z280 | +| Default CPU Speed | 18.432 MHz | +| Interrupts | Mode 2 | +| System Timer | Z180 | | Serial Default | 115200 Baud | -| Memory Manager | Z280 | +| Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware - FP: LEDIO=0, SWIO=0 -- LCD: IO=218, SIZE=20X4 -- DSRTC: MODE=STD, IO=192 +- DSRTC: MODE=STD, IO=12 - INTRTC: ENABLED -- Z2U: IO=16, INTERRUPTS ENABLED +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED - UART: IO=128 - UART: IO=136 - UART: IO=160 @@ -1605,8 +1659,6 @@ program the image into the first 512KB of the ROM for now. - SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED - SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED -- VRC: IO=0, KBD MODE=VRC, KBD IO=244 -- KBD: ENABLED - CH: IO=62 - CH: IO=60 - CHUSB: IO=62 @@ -1619,6 +1671,7 @@ program the image into the first 512KB of the ROM for now. - IDE: MODE=RC, IO=16, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE +- SD: MODE=SC, IO=12, UNITS=1 #### Notes: @@ -1626,42 +1679,16 @@ program the image into the first 512KB of the ROM for now. `\clearpage`{=latex} -## Z80-Retro SBC - -#### ROM Image File: Z80RETRO_std.rom - -| | | -|-------------------|---------------| -| Default CPU Speed | 14.745 MHz | -| Interrupts | Mode 2 | -| System Timer | None | -| Serial Default | 38400 Baud | -| Memory Manager | Z2 | -| ROM Size | 512 KB | -| RAM Size | 512 KB | - -#### Supported Hardware - -- SIO MODE=Z80R, IO=128, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=Z80R, IO=128, CHANNEL B, INTERRUPTS ENABLED -- MD: TYPE=RAM -- MD: TYPE=ROM -- SD: MODE=Z80R, IO=104, UNITS=1 - -#### Notes: - -`\clearpage`{=latex} - -## S100 Computers Z180 +### SC131 Z180 Pocket Comp -#### ROM Image File: S100_std.rom +#### ROM Image File: SCZ180_sc131_std.rom | | | |-------------------|---------------| | Default CPU Speed | 18.432 MHz | | Interrupts | Mode 2 | | System Timer | Z180 | -| Serial Default | 57600 Baud | +| Serial Default | 115200 Baud | | Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | @@ -1671,64 +1698,56 @@ program the image into the first 512KB of the ROM for now. - INTRTC: ENABLED - ASCI: IO=192, INTERRUPTS ENABLED - ASCI: IO=193, INTERRUPTS ENABLED -- SCON: IO=0 - MD: TYPE=RAM - MD: TYPE=ROM - SD: MODE=SC, IO=12, UNITS=1 #### Notes: -- Z180 SBC SW2 (IOBYTE) Dip Switches: - -| Bit | Setting | Function | -|-----|---------|-------------------------------------| -| 0 | Off | Use Z180 ASCI Channel A for console | -| | On | Use Propeller Console | -| | | | -| 1 | Off | Boot to RomWBW Boot Loader | -| | On | Boot to S100 Monitor | - `\clearpage`{=latex} -## Duodyne Z80 System +### SC140 Z180 CPU Module -#### ROM Image File: DUO_std.rom +#### ROM Image File: SCZ180_sc140_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 8.000 MHz | +| Default CPU Speed | 18.432 MHz | | Interrupts | Mode 2 | -| System Timer | CTC | -| Serial Default | 38400 Baud | -| Memory Manager | Z2 | +| System Timer | Z180 | +| Serial Default | 115200 Baud | +| Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=66, SWIO=66 -- DSRTC: MODE=STD, IO=148 -- PCF: IO=86 -- UART: IO=88 +- FP: LEDIO=160, SWIO=160 +- DSRTC: MODE=STD, IO=12 +- INTRTC: ENABLED +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED +- UART: IO=128 +- UART: IO=136 +- UART: IO=160 - UART: IO=168 -- UART: IO=112 -- UART: IO=120 -- SIO MODE=ZP, IO=96, CHANNEL A, INTERRUPTS ENABLED -- SIO MODE=ZP, IO=96, CHANNEL B, INTERRUPTS ENABLED -- LPT: MODE=SPP, IO=72 -- DMA: MODE=DUO, IO=64 -- CH: IO=78 -- CHUSB: IO=78 -- CHSD: IO=78 +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=DUO, IO=128, DRIVE 0, TYPE=3.5" HD -- FD: MODE=DUO, IO=128, DRIVE 1, TYPE=3.5" HD -- PPIDE: IO=136, MASTER -- PPIDE: IO=136, SLAVE -- SD: MODE=MT, IO=140, UNITS=1 -- SPK: IO=148 -- CTC: IO=96, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED +- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=144, MASTER +- IDE: MODE=RC, IO=144, SLAVE +- PPIDE: IO=32, MASTER +- PPIDE: IO=32, SLAVE +- SD: MODE=SC, IO=12, UNITS=1 #### Notes: @@ -1736,44 +1755,58 @@ program the image into the first 512KB of the ROM for now. `\clearpage`{=latex} -## Heath H8 Z80 System +### SC503 Z180 CPU Module -#### ROM Image File: HEATH_std.rom +#### ROM Image File: SCZ180_sc503_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 16.384 MHz | -| Interrupts | Mode 1 | -| System Timer | None | +| Default CPU Speed | 18.432 MHz | +| Interrupts | Mode 2 | +| System Timer | Z180 | | Serial Default | 115200 Baud | -| Memory Manager | Z2 | +| Memory Manager | Z180 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- H8P: IO=240 +- FP: LEDIO=160, SWIO=160 +- DSRTC: MODE=STD, IO=12 - INTRTC: ENABLED -- UART: IO=232 -- UART: IO=224 -- UART: IO=216 -- UART: IO=208 -- TMS: MODE=MSX, IO=152, SCREEN=80X24, KEYBOARD=NONE +- ASCI: IO=192, INTERRUPTS ENABLED +- ASCI: IO=193, INTERRUPTS ENABLED +- UART: IO=128 +- UART: IO=136 +- UART: IO=160 +- UART: IO=168 +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM - MD: TYPE=ROM - FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD - FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=144, MASTER +- IDE: MODE=RC, IO=144, SLAVE - PPIDE: IO=32, MASTER - PPIDE: IO=32, SLAVE -- AY38910: MODE=MSX, IO=160, CLOCK=1789772 HZ +- SD: MODE=SC, IO=12, UNITS=1 #### Notes: +- CPU speed will be dynamically measured at startup if DSRTC is present + `\clearpage`{=latex} -## EP Mini-ITX Z180 +### SC700 Z180 CPU Module -#### ROM Image File: EPITX_std.rom +#### ROM Image File: SCZ180_sc700_std.rom | | | |-------------------|---------------| @@ -1787,118 +1820,140 @@ program the image into the first 512KB of the ROM for now. #### Supported Hardware +- FP: LEDIO=0 +- LCD: IO=170, SIZE=20X4 +- DSRTC: MODE=STD, IO=12 - INTRTC: ENABLED - ASCI: IO=192, INTERRUPTS ENABLED - ASCI: IO=193, INTERRUPTS ENABLED +- UART: IO=128 +- UART: IO=136 - UART: IO=160 - UART: IO=168 -- TMS: MODE=MSX, IO=152, SCREEN=40X24, KEYBOARD=NONE +- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED +- CH: IO=62 +- CH: IO=60 +- CHUSB: IO=62 +- CHUSB: IO=60 - MD: TYPE=RAM - MD: TYPE=ROM -- FD: MODE=EPFDC, IO=72, DRIVE 0, TYPE=3.5" HD -- FD: MODE=EPFDC, IO=72, DRIVE 1, TYPE=3.5" HD -- SD: MODE=EPITX, IO=66, UNITS=1 +- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD +- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD +- IDE: MODE=RC, IO=16, MASTER +- IDE: MODE=RC, IO=16, SLAVE +- PPIDE: IO=32, MASTER +- PPIDE: IO=32, SLAVE +- SD: MODE=SC, IO=12, UNITS=1 #### Notes: -`\clearpage`{=latex} +- CPU speed will be dynamically measured at startup if DSRTC is present -## NABU w/ RomWBW Option Board +\clearpage`{=latex} -#### ROM Image File: NABU_std.rom +## Z80-Retro + +### Z80-Retro SBC + +#### ROM Image File: Z80RETRO_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 3.580 MHz | +| Default CPU Speed | 14.745 MHz | | Interrupts | Mode 2 | -| System Timer | TMS | -| Serial Default | 115200 Baud | +| System Timer | None | +| Serial Default | 38400 Baud | | Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- NABU: IO=64 -- INTRTC: ENABLED -- UART: IO=72 -- TMS: MODE=NABU, IO=160, SCREEN=80X24, KEYBOARD=NABU, INTERRUPTS ENABLED -- NABUKB: IO=144 +- SIO MODE=Z80R, IO=128, CHANNEL A, INTERRUPTS ENABLED +- SIO MODE=Z80R, IO=128, CHANNEL B, INTERRUPTS ENABLED - MD: TYPE=RAM - MD: TYPE=ROM -- PPIDE: IO=96, MASTER -- PPIDE: IO=96, SLAVE -- AY38910: MODE=NABU, IO=65, CLOCK=1789772 HZ +- SD: MODE=Z80R, IO=104, UNITS=1 #### Notes: -- TMS video assumes F18A replacement for TMS9918 - `\clearpage`{=latex} -## S100 FPGA Z80 +## Zeta -#### ROM Image File: FZ80_std.rom +### Zeta Z80 SBC + +#### ROM Image File: ZETA_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 8.000 MHz | +| Default CPU Speed | 8.000 MHz | | Interrupts | None | | System Timer | None | -| Serial Default | 9600 Baud | -| Memory Manager | Z2 | -| ROM Size | 0 KB | +| Serial Default | 38400 Baud | +| Memory Manager | SBC | +| ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- FP: LEDIO=255 -- DS5RTC: RTCIO=104, IO=104 -- SSER: IO=52 -- LPT: MODE=S100, IO=199 -- FV: IO=192, KBD MODE=FV, KBD IO=3 -- KBD: ENABLED -- SCON: IO=0 +- DSRTC: MODE=STD, IO=112 +- UART: IO=104 +- PPP: IO=96 +- PPPCON: ENABLED +- PPPSD: ENABLED - MD: TYPE=RAM -- PPIDE: IO=48, MASTER -- PPIDE: IO=48, SLAVE -- SD: MODE=FZ80, IO=108, UNITS=2 +- MD: TYPE=ROM +- FD: MODE=DIO, IO=54, DRIVE 0, TYPE=3.5" HD #### Notes: -- Requires matching FPGA code +- CPU speed will be dynamically measured at startup if DSRTC is present +- If ParPortProp is installed, initial console output is + determined by JP1: + - Shorted: console to on-board serial port + - Open: console to ParPortProp video and keyboard + +`\clearpage`{=latex} -## Genesis STD Z180 +## Zeta V2 -#### ROM Image File: GMZ180_std.rom +### Zeta V2 Z80 SBC + +#### ROM Image File: ZETA2_std.rom | | | |-------------------|---------------| -| Default CPU Speed | 18.432 MHz | +| Default CPU Speed | 8.000 MHz | | Interrupts | Mode 2 | -| System Timer | Z180 | -| Serial Default | 115200 Baud | -| Memory Manager | Z180 | +| System Timer | CTC | +| Serial Default | 38400 Baud | +| Memory Manager | Z2 | | ROM Size | 512 KB | | RAM Size | 512 KB | #### Supported Hardware -- GM7303: IO=48 -- DSRTC: MODE=STD, IO=132 -- INTRTC: ENABLED -- ASCI: IO=192, INTERRUPTS ENABLED -- ASCI: IO=193, INTERRUPTS ENABLED +- DSRTC: MODE=STD, IO=112 +- UART: IO=104 +- PPP: IO=96 +- PPPCON: ENABLED +- PPPSD: ENABLED - MD: TYPE=RAM - MD: TYPE=ROM -- IDE: MODE=GIDE, IO=32, MASTER -- IDE: MODE=GIDE, IO=32, SLAVE -- SD: MODE=GM, IO=132, UNITS=1 +- FD: MODE=ZETA2, IO=48, DRIVE 0, TYPE=3.5" HD +- CTC: IO=32, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72, INTERRUPTS ENABLED #### Notes: - CPU speed will be dynamically measured at startup if DSRTC is present - +- If ParPortProp is installed, initial console output is + determined by JP1: + - Shorted: console to on-board serial port + - Open: console to ParPortProp video and keyboard # Device Drivers