MirrorRepos
/
RomWBW
mirror of https://github.com/wwarthen/RomWBW.git
1
0
Fork 1
Code Issues Projects Releases Wiki Activity
Browse Source

Update ACIA detection 

ACIA should no longer be detected if there is also a UART module in the system.
pull/112/head
Wayne Warthen 6 years ago
parent
7d022f709b
commit
98463d6774
4 changed files with 59 additions and 59 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 2
      Source/HBIOS/Config/SCZ180_130.asm
  2. 2
      Source/HBIOS/acia.asm
  3. 7
      Source/HBIOS/cfg_rcz180.asm
  4. 107
      Source/HBIOS/sio.asm

2
Source/HBIOS/Config/SCZ180_130.asm
View File

@ -43,7 +43,7 @@ DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)

2
Source/HBIOS/acia.asm
View File

@ -584,7 +584,7 @@ ACIA_DEVICE:
;
ACIA_DETECT:
LD A,(IY+3) ; BASE PORT ADDRESS
ADD A,$20 ; OFFSET (SEE ABOVE)
ADD A,$18 ; OFFSET (SEE ABOVE)
LD C,A ; PUT IN C FOR I/O
CALL ACIA_DETECT2 ; CHECK IT
JR Z,ACIA_DETECT1 ; FOUND IT, RECORD IT

7
Source/HBIOS/cfg_rcz180.asm
View File

@ -97,7 +97,7 @@ SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 0A: SERIAL LINE CONFIG
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
@ -105,7 +105,7 @@ SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 1A: SERIAL LINE CONFIG
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG
@ -169,7 +169,8 @@ PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER
PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE2BASE .EQU $00 ; PPIDE 2: PPI REGISTERS BASE ADR
PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER;
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY

107
Source/HBIOS/sio.asm
View File

@ -69,33 +69,33 @@ SIO0B_DAT .EQU SIO0BASE + $05
;
#IF (SIOCNT >= 2)
;
#IF (SIO1MODE == SIOMODE_STD)
#IF (SIO1MODE == SIOMODE_STD)
SIO1A_CMD .EQU SIO1BASE + $01
SIO1A_DAT .EQU SIO1BASE + $00
SIO1B_CMD .EQU SIO1BASE + $03
SIO1B_DAT .EQU SIO1BASE + $02
#ENDIF
#ENDIF
;
#IF (SIO1MODE == SIOMODE_RC)
#IF (SIO1MODE == SIOMODE_RC)
SIO1A_CMD .EQU SIO1BASE + $00
SIO1A_DAT .EQU SIO1BASE + $01
SIO1B_CMD .EQU SIO1BASE + $02
SIO1B_DAT .EQU SIO1BASE + $03
#ENDIF
#ENDIF
;
#IF (SIO1MODE == SIOMODE_SMB)
#IF (SIO1MODE == SIOMODE_SMB)
SIO1A_CMD .EQU SIO1BASE + $02
SIO1A_DAT .EQU SIO1BASE + $00
SIO1B_CMD .EQU SIO1BASE + $03
SIO1B_DAT .EQU SIO1BASE + $01
#ENDIF
#ENDIF
;
#IF (SIO1MODE == SIOMODE_ZP)
#IF (SIO1MODE == SIOMODE_ZP)
SIO1A_CMD .EQU SIO1BASE + $06
SIO1A_DAT .EQU SIO1BASE + $04
SIO1B_CMD .EQU SIO1BASE + $07
SIO1B_DAT .EQU SIO1BASE + $05
#ENDIF
#ENDIF
;
#ENDIF
;
@ -138,23 +138,23 @@ SIO_PREINIT2:
OR A ; SET FLAGS
JR Z,SIO_PREINIT3 ; IF ZERO, NO SIO DEVICES, ABORT
;
#IF (INTMODE == 1)
#IF (INTMODE == 1)
; ADD IM1 INT CALL LIST ENTRY
LD HL,SIO_INT ; GET INT VECTOR
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
#ENDIF
;
#IF (INTMODE == 2)
#IF (INTMODE == 2)
; SETUP IM2 VECTORS
LD HL,SIO_INT0
LD (SIO0_IVT),HL ; IVT INDEX
;
#IF (SIOCNT >= 2)
#IF (SIOCNT >= 2)
LD HL,SIO_INT1
LD (SIO1_IVT),HL ; IVT INDEX
#ENDIF
#ENDIF
;
#ENDIF
#ENDIF
;
#ENDIF
;
@ -220,12 +220,12 @@ SIO_INT:
CALL NZ,SIO_INT0 ; CALL IF CARD EXISTS
RET NZ ; DONE IF INT HANDLED
;
#IF (SIOCNT >= 2)
#IF (SIOCNT >= 2)
; CHECK/HANDLE SECOND CARD (SIO1) IF IT EXISTS
LD A,(SIO1A_CFG + 1) ; GET SIO TYPE FOR FIRST CHANNEL OF SECOND SIO
OR A ; SET FLAGS
CALL NZ,SIO_INT1 ; CALL IF CARD EXISTS
#ENDIF
#ENDIF
;
RET ; DONE
;
@ -239,7 +239,7 @@ SIO_INT0:
LD IY,SIO0B_CFG ; POINT TO SIO0B CFG
JR SIO_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN
;
#IF (SIOCNT >= 2)
#IF (SIOCNT >= 2)
;
SIO_INT1:
; INTERRUPT HANDLER FOR SECOND SIO (SIO1)
@ -249,7 +249,7 @@ SIO_INT1:
LD IY,SIO1B_CFG ; POINT TO SIO1B CFG
JR SIO_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN
;
#ENDIF
#ENDIF
;
; HANDLE INT FOR A SPECIFIC CHANNEL
; BASED ON UNIT CFG POINTED TO BY IY
@ -518,30 +518,30 @@ SIO_INITDEV1:
LD C,75 ; DIVIDE BY 75 LIKE BAUD RATE
CALL DIV32X8 ; HL NOW HAS (CLK / 75)
;
#IF (SIODEBUG)
#IF (SIODEBUG)
PRTS(" CLK75=$")
CALL PRTHEX32
#ENDIF
#ENDIF
;
; SCALE DOWN THE 32 BIT VALUE TO FIT IN 16 BITS KEEPING
; TRACK OF THE NUMBER OF BITS SHIFTED OUT IN B
LD B,0
LD B,0 ; SHIFT COUNTER
SIO_INITDEV1A:
LD A,D
OR E
JR Z,SIO_INITDEV1B
SRL D
RR E
RR H
RR L
INC B
JR SIO_INITDEV1A
LD A,D ; TEST MSB
OR E ; ... FOR ZERO
JR Z,SIO_INITDEV1B ; IF SO, DONE
SRL D ; 32 BIT RIGHT SHIFT
RR E ; ...
RR H ; ...
RR L ; ...
INC B ; INCREMENT SHIFT COUNTER
JR SIO_INITDEV1A ; AND LOOP
SIO_INITDEV1B:
;
#IF (SIODEBUG)
#IF (SIODEBUG)
PRTS(" CLK=$")
CALL PRTHEX32
#ENDIF
#ENDIF
;
POP DE ; RECOVER INCOMING TARGET CFG
PUSH DE ; RESAVE IT
@ -557,38 +557,38 @@ SIO_INITDEV1B:
LD DE,1 ; USE 1 FOR ENCODING CONSTANT
CALL DECODE ; DE:HL := BAUD RATE, ERRORS IGNORED
;
#IF (SIODEBUG)
#IF (SIODEBUG)
PRTS(" BAUD75=$")
CALL PRTHEX32
#ENDIF
#ENDIF
;
; SCALE DOWN CLK BY SAME AMOUNT AS BAUD RATE
POP BC ; RESTORE BITS TO SHIFT
LD A,B
OR A
JR Z,SIO_INITDEV1D
LD A,B ; PUT IN ACCUM
OR A ; TEST FOR ZERO
JR Z,SIO_INITDEV1D ; IF ZERO, NO SHIFT, SKIP
SIO_INITDEV1C:
SRL D
RR E
RR H
RR L
DJNZ SIO_INITDEV1C
SRL D ; 32 BIT RIGHT SHIFT
RR E ; ...
RR H ; ...
RR L ; ...
DJNZ SIO_INITDEV1C ; LOOP UNTIL DONE SHIFTING
SIO_INITDEV1D:
;
#IF (SIODEBUG)
#IF (SIODEBUG)
PRTS(" BAUD=$")
CALL PRTHEX32
#ENDIF
#ENDIF
;
POP DE ; RECOVER CLOCK
EX DE,HL ; SWAP CLOCK & BAUD FOR DIV
; *** HANDLE DIVIDE BY ZERO??? ***
CALL DIV16 ; BC := HL/DE == TARGET DIVISOR
;
#IF (SIODEBUG)
#IF (SIODEBUG)
PRTS(" DIV=$")
CALL PRTHEXWORD
#ENDIF
#ENDIF
;
; NOW THAT WE HAVE THE TARGET BAUD RATE DIVISOR, WE WILL
; ATTEMPT TO IMPLEMENT IT. THE SIO ITSELF CAN APPLY
@ -636,14 +636,14 @@ SIO_INITDEV4:
;
POP DE ; RESTORE DE = SERIAL CONFIG
;
#IF (SIODEBUG)
#IF (SIODEBUG)
PUSH BC
PUSH HL
POP BC
PRTS(" CTCDIV=$")
CALL PRTHEXWORD
POP BC
#ENDIF
#ENDIF
;
#IF (CTCENABLE)
LD A,(IY+13) ; GET CTC CHANNEL
@ -871,8 +871,7 @@ SIO_INITLEN .EQU $ - SIO_INITVALS
;
SIO_INITDEFS:
.DB $00, $18 ; WR0: CHANNEL RESET CMD
;.DB $04, $C4 ; WR4: CLK BAUD PARITY STOP BIT
.DB $04, $44 ; WR4: CLK BAUD PARITY STOP BIT
.DB $04, $C4 ; WR4: CLK BAUD PARITY STOP BIT
.DB $01, SIO_WR1VAL ; WR1: INTERRUPT STYLE
.DB $02, $00 ; WR2: IM2 VEC OFFSET
.DB $03, $E1 ; WR3: 8 BIT RCV, CTS/DCD AUTO, RX ENABLE
@ -1039,10 +1038,10 @@ SIO_MAP .DB 0 ; CHIP PRESENCE BITMAP
SIO0A_RCVBUF .EQU 0
SIO0B_RCVBUF .EQU 0
;
#IF (SIOCNT >= 2)
#IF (SIOCNT >= 2)
SIO1A_RCVBUF .EQU 0
SIO1B_RCVBUF .EQU 0
#ENDIF
#ENDIF
;
#ELSE
;
@ -1060,7 +1059,7 @@ SIO0B_HD .DW SIO0B_BUF ; BUFFER HEAD POINTER
SIO0B_TL .DW SIO0B_BUF ; BUFFER TAIL POINTER
SIO0B_BUF .FILL SIO_BUFSZ,0 ; RECEIVE RING BUFFER
;
#IF (SIOCNT >= 2)
#IF (SIOCNT >= 2)
;
; SIO1 CHANNEL A RECEIVE BUFFER
SIO1A_RCVBUF:
@ -1076,7 +1075,7 @@ SIO1B_HD .DW SIO1B_BUF ; BUFFER HEAD POINTER
SIO1B_TL .DW SIO1B_BUF ; BUFFER TAIL POINTER
SIO1B_BUF .FILL SIO_BUFSZ,0 ; RECEIVE RING BUFFER
;
#ENDIF
#ENDIF
;
#ENDIF
;

Write Preview
Loading…
Cancel
Save