|
|
@ -125,6 +125,7 @@ SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT |
|
|
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK |
|
|
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK |
|
|
SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DO .EQU %10000000 ; RTC:7 IS DATA OUT (CARD -> CPU) |
|
|
SD_DO .EQU %10000000 ; RTC:7 IS DATA OUT (CARD -> CPU) |
|
|
|
|
|
SD_IOBASE .EQU SD_OPRREG ; IOBASE |
|
|
; |
|
|
; |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
@ -139,6 +140,7 @@ SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT |
|
|
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK |
|
|
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK |
|
|
SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU) |
|
|
SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU) |
|
|
|
|
|
SD_IOBASE .EQU SD_OPRREG ; IOBASE |
|
|
; |
|
|
; |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
@ -151,6 +153,7 @@ SD_OPRMSK .EQU %00000100 ; MASK FOR BITS WE OWN IN RTC LATCH PORT |
|
|
SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT |
|
|
SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT |
|
|
SD_CNTR .EQU Z180_CNTR |
|
|
SD_CNTR .EQU Z180_CNTR |
|
|
SD_TRDR .EQU Z180_TRDR |
|
|
SD_TRDR .EQU Z180_TRDR |
|
|
|
|
|
SD_IOBASE .EQU SD_OPRREG ; IOBASE |
|
|
; |
|
|
; |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
@ -168,6 +171,7 @@ SD_CS0 .EQU %00010000 ; PPIC:4 IS SELECT |
|
|
SD_CLK .EQU %00000010 ; PPIC:1 IS CLOCK |
|
|
SD_CLK .EQU %00000010 ; PPIC:1 IS CLOCK |
|
|
SD_DI .EQU %00000001 ; PPIC:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DI .EQU %00000001 ; PPIC:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DO .EQU %10000000 ; PPIB:7 IS DATA OUT (CARD -> CPU) |
|
|
SD_DO .EQU %10000000 ; PPIB:7 IS DATA OUT (CARD -> CPU) |
|
|
|
|
|
SD_IOBASE .EQU SD_PPIBASE ; IOBASE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
; |
|
|
; |
|
|
#IF (SDMODE == SDMODE_UART) |
|
|
#IF (SDMODE == SDMODE_UART) |
|
|
@ -180,6 +184,7 @@ SD_CS0 .EQU %00001000 ; UART MCR:3 IS SELECT |
|
|
SD_CLK .EQU %00000100 ; UART MCR:2 IS CLOCK |
|
|
SD_CLK .EQU %00000100 ; UART MCR:2 IS CLOCK |
|
|
SD_DI .EQU %00000001 ; UART MCR:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DI .EQU %00000001 ; UART MCR:0 IS DATA IN (CARD <- CPU) |
|
|
SD_DO .EQU %00100000 ; UART MSR:5 IS DATA OUT (CARD -> CPU) |
|
|
SD_DO .EQU %00100000 ; UART MSR:5 IS DATA OUT (CARD -> CPU) |
|
|
|
|
|
SD_IOBASE .EQU UARTIOB ; IOBASE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
; |
|
|
; |
|
|
#IF (SDMODE == SDMODE_DSD) ; DUAL SD |
|
|
#IF (SDMODE == SDMODE_DSD) ; DUAL SD |
|
|
@ -193,6 +198,7 @@ SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT |
|
|
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK |
|
|
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK |
|
|
SD_DI .EQU %00000001 ; RTC:6 IS DATA IN (CARD <- CPU) |
|
|
SD_DI .EQU %00000001 ; RTC:6 IS DATA IN (CARD <- CPU) |
|
|
SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU) |
|
|
SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU) |
|
|
|
|
|
SD_IOBASE .EQU SD_OPRREG ; IOBASE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
; |
|
|
; |
|
|
#IF (SDMODE == SDMODE_MK4) ; MARK IV (CSIO STYLE INTERFACE) |
|
|
#IF (SDMODE == SDMODE_MK4) ; MARK IV (CSIO STYLE INTERFACE) |
|
|
@ -202,6 +208,7 @@ SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE |
|
|
SD_CS0 .EQU %00000100 ; SELECT ACTIVE |
|
|
SD_CS0 .EQU %00000100 ; SELECT ACTIVE |
|
|
SD_CNTR .EQU Z180_CNTR |
|
|
SD_CNTR .EQU Z180_CNTR |
|
|
SD_TRDR .EQU Z180_TRDR |
|
|
SD_TRDR .EQU Z180_TRDR |
|
|
|
|
|
SD_IOBASE .EQU SD_OPRREG ; IOBASE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
; |
|
|
; |
|
|
#IF (SDMODE == SDMODE_SC) ; SC |
|
|
#IF (SDMODE == SDMODE_SC) ; SC |
|
|
@ -213,6 +220,7 @@ SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT FOR PRIMARY SPI CARD |
|
|
SD_CS1 .EQU %00001000 ; RTC:3 IS SELECT FOR SECONDARY SPI CARD |
|
|
SD_CS1 .EQU %00001000 ; RTC:3 IS SELECT FOR SECONDARY SPI CARD |
|
|
SD_CNTR .EQU Z180_CNTR |
|
|
SD_CNTR .EQU Z180_CNTR |
|
|
SD_TRDR .EQU Z180_TRDR |
|
|
SD_TRDR .EQU Z180_TRDR |
|
|
|
|
|
SD_IOBASE .EQU SD_OPRREG ; IOBASE |
|
|
; |
|
|
; |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
@ -236,7 +244,7 @@ SD_CD1 .EQU %00000100 ; IN:SD_OPREG:2 = CD2, IN=0 Card detect switch |
|
|
SD_CSX .EQU %00001000 ; IN/OUT:SD_OPREG:3 = CS0, PMOD SPI CS |
|
|
SD_CSX .EQU %00001000 ; IN/OUT:SD_OPREG:3 = CS0, PMOD SPI CS |
|
|
SD_CS0 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present |
|
|
SD_CS0 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present |
|
|
SD_CS1 .EQU %00100000 ; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present |
|
|
SD_CS1 .EQU %00100000 ; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present |
|
|
|
|
|
|
|
|
|
|
|
SD_IOBASE .EQU SD_BASE ; IOBASE |
|
|
#ENDIF |
|
|
#ENDIF |
|
|
; |
|
|
; |
|
|
; SD CARD COMMANDS |
|
|
; SD CARD COMMANDS |
|
|
@ -771,6 +779,8 @@ SD_DEVICE: |
|
|
LD D,DIODEV_SD ; D := DEVICE TYPE |
|
|
LD D,DIODEV_SD ; D := DEVICE TYPE |
|
|
LD E,(IY+SD_DEV) ; E := PHYSICAL DEVICE NUMBER |
|
|
LD E,(IY+SD_DEV) ; E := PHYSICAL DEVICE NUMBER |
|
|
LD C,%01010000 ; C := ATTRIBUTES, REMOVABLE, SD CARD |
|
|
LD C,%01010000 ; C := ATTRIBUTES, REMOVABLE, SD CARD |
|
|
|
|
|
LD H,SDMODE ; H := MODE |
|
|
|
|
|
LD L,(SD_IOBASE) ; L := BASE I/O ADDRESS |
|
|
XOR A ; SIGNAL SUCCESS |
|
|
XOR A ; SIGNAL SUCCESS |
|
|
RET |
|
|
RET |
|
|
; |
|
|
; |
|
|
|