From 99b8409738e962ebc492c4b1b40b455bae437d27 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Thu, 24 May 2018 09:28:21 -0700
Subject: [PATCH] Added Diagnostic Port Support

---
 Source/HBIOS/Config/RC180_std.asm |  4 ++--
 Source/HBIOS/hbios.asm            | 31 ++++++++++++++++++++++++++++++-
 2 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/Source/HBIOS/Config/RC180_std.asm b/Source/HBIOS/Config/RC180_std.asm
index affb8d3e..ab57ea1e 100644
--- a/Source/HBIOS/Config/RC180_std.asm
+++ b/Source/HBIOS/Config/RC180_std.asm
@@ -6,8 +6,8 @@
 #include "cfg_rc180.asm"
 ;
 Z180_CLKDIV	.SET	1		; 0=OSC/2, 1=OSC, 2=OSC*2
-Z180_MEMWAIT	.SET	0		; MEMORY WAIT STATES TO INSERT (0-3)
-Z180_IOWAIT	.SET	1		; IO WAIT STATES TO INSERT (0-3)
+Z180_MEMWAIT	.SET	3		; MEMORY WAIT STATES TO INSERT (0-3)
+Z180_IOWAIT	.SET	3		; IO WAIT STATES TO INSERT (0-3)
 ;
 CPUOSC		.SET	18432000	; CPU OSC FREQ
 DEFSERCFG	.SET	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index e136b59b..34f3704a 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -67,12 +67,25 @@ MODCNT	.SET	MODCNT + 1
 ;
 ;
 ;
+; #DEFINE	DIAGP	$00
+;
+#IFDEF DIAGP
+#DEFINE	DIAG(N)	PUSH AF
+  #DEFCONT \	LD A,N
+  #DEFCONT \	OUT (DIAGP),A
+  #DEFCONT \	POP AF
+#ELSE
+#DEFINE	DIAG(N)	\;
+#ENDIF
+;
+;
+;
 #IF (INTMODE == 0)
 ; NO INTERRUPT HANDLING
 #DEFINE	HB_DI	DI
 #DEFINE	HB_EI	;
 #ELSE
-; MODE 1  OR 2 INTERRUPT HANDLING
+; MODE 1 OR 2 INTERRUPT HANDLING
 #DEFINE	HB_DI	DI
 #DEFINE	HB_EI	EI
 #ENDIF
@@ -635,6 +648,8 @@ HB_START:
 	DI				; NO INTERRUPTS
 	IM	1			; INTERRUPT MODE 1
 	LD	SP,HBX_LOC		; SETUP INITIAL STACK JUST BELOW HBIOS PROXY
+	
+	DIAG(%00000001)
 ;
 #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4) | (PLATFORM == PLT_RC180))
 	; SET BASE FOR CPU IO REGISTERS
@@ -700,6 +715,8 @@ HB_START:
 	LD	A,1
 	OUT	(MPGENA),A
 #ENDIF
+;
+	DIAG(%00000011)
 ;
 ; INSTALL PROXY IN UPPER MEMORY
 ;
@@ -756,6 +773,8 @@ HB_RAMFLAG	.DB	FALSE		; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
 ; EXECUTION RESUMES HERE AFTER SWITCH TO RAM BANK
 ;
 HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
+;
+	DIAG(%00000111)
 ;
 	LD	SP,HBX_LOC		; RESET STACK SINCE WE DO NOT RETURN
 	LD	A,TRUE			; ACCUM := TRUE
@@ -785,6 +804,8 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	LD	(HL),$4D
   #ENDIF
 #ENDIF
+;
+	DIAG(%00001111)
 ;
 ; PERFORM DYNAMIC CPU SPEED DERIVATION
 ;
@@ -799,6 +820,8 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 #ENDIF
 ;
 	CALL	DELAY_INIT		; INITIALIZE SPEED COMPENSATED DELAY FUNCTIONS
+;
+	DIAG(%00011111)
 ;
 ; INITIALIZE HEAP STORAGE
 ;
@@ -810,6 +833,8 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	LD	BC,BNKTOP - HB_END	; MAX SIZE OF HEAP
 	LD	A,$FF			; FILL WITH $FF
 	CALL	FILL			; DO IT
+;
+	DIAG(%00111111)
 ;
 ; PRE-CONSOLE INITIALIZATION
 ;
@@ -825,6 +850,8 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 #IF (ACIAENABLE)
 	CALL	ACIA_PREINIT
 #ENDIF
+;
+	DIAG(%01111111)
 ;
 ; PRIOR TO THIS POINT, CONSOLE I/O WAS DIRECTED TO HARDWARE (XIO.ASM).
 ; NOW THAT HBIOS IS READY, SET THE CONSOLE UNIT TO ACTIVATE CONSOLE I/O
@@ -838,6 +865,8 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	CALL	NEWLINE2
 	PRTX(STR_BANNER)
 ;
+	DIAG(%11111111)
+;	
 ; IO PORT SCAN
 ;
 #IF 0