diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf
index 63d65cad..2598683a 100644
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diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf
index c5d56913..f7ed2dc1 100644
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diff --git a/Doc/RomWBW Hardware.pdf b/Doc/RomWBW Hardware.pdf
index efae7b08..181accbe 100644
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diff --git a/Doc/RomWBW Introduction.pdf b/Doc/RomWBW Introduction.pdf
index 0da0ff20..43dd2805 100644
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diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf
index 3a496e07..bbe44f46 100644
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diff --git a/Doc/RomWBW User Guide.pdf b/Doc/RomWBW User Guide.pdf
index 5f22c1e4..185c3503 100644
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diff --git a/ReadMe.md b/ReadMe.md
index 8760c181..aa1fd04f 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -7,7 +7,7 @@
 **RomWBW Introduction** \
 Version 3.5 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-27 Jan 2025
+30 Jan 2025
 
 # Overview
 
diff --git a/ReadMe.txt b/ReadMe.txt
index b7f70c01..c5c0f052 100644
--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW Introduction
 Wayne Warthen (wwarthen@gmail.com)
-27 Jan 2025
+30 Jan 2025
 
 
 
diff --git a/Source/Doc/Hardware.md b/Source/Doc/Hardware.md
index 946e638c..3830ca67 100644
--- a/Source/Doc/Hardware.md
+++ b/Source/Doc/Hardware.md
@@ -831,6 +831,9 @@ program the image into the first 512KB of the ROM for now.
 #### Notes:
 
 - CPU speed will be dynamically measured at startup if DSRTC is present
+- When disabled, watchdog requires /IM to be pulsed.  If an RCBus module
+  holds the CPU in WAIT for more than this, the watchdog will fire when
+  disabled with random consequences.  The Pico SD does this at power-on.
 
 `\clearpage`{=latex}
 
diff --git a/Source/HBIOS/Config/RCZ80_easy_std.asm b/Source/HBIOS/Config/RCZ80_easy_std.asm
index 22437335..333e441e 100644
--- a/Source/HBIOS/Config/RCZ80_easy_std.asm
+++ b/Source/HBIOS/Config/RCZ80_easy_std.asm
@@ -56,13 +56,12 @@ AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
 ;
 CPUOSC		.SET	10000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
 CTCMODE		.SET	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
 CTCOSC		.SET	921600		; CTC CLOCK FREQUENCY
-WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
-WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
diff --git a/Source/HBIOS/cfg_RCZ80.asm b/Source/HBIOS/cfg_RCZ80.asm
index 1e57cd87..2ca19700 100644
--- a/Source/HBIOS/cfg_RCZ80.asm
+++ b/Source/HBIOS/cfg_RCZ80.asm
@@ -100,7 +100,7 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 ;
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
-WDOGIO		.SET	$6E		; WATCHDOG REGISTER ADR
+WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 60f1091e..63260049 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -2609,7 +2609,7 @@ HB_CPU3:
 ; SK Z80-512K CLOCK INITIALIZATION
 ;--------------------------------------------------------------------------------------------------
 ;
-#IF (SKZENABLE)
+#IF ((SKZENABLE) | (WDOGMODE != WDOG_NONE))
 ;
 ;;; LOCATION OF THIS CODE???
 ;