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Merge pull request #39 from wwarthen/master 

Update sd.asm
pull/60/head
b1ackmai1er 6 years ago
committed by GitHub
parent
b0226fe1e8 019ae62c2a
commit
9d25a7663d
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 119 additions and 157 deletions
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  1. 276
      Source/HBIOS/sd.asm

276
Source/HBIOS/sd.asm
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@ -9,14 +9,14 @@
; - TEST XC CARD TYPE DETECTION
; - TRY TO GET INIT TO FAIL, REMOVE DELAYS AT START OF GOIDLE?
;
;--------------------------------------------------------------------------------------
; SD Signal Active JUHA N8 CSIO PPI UART DSD MK4 SC
; ------------ ------- ------- ------- ------- ------- ------- ------- ------- -------
; CS (DAT3) LO -> RTC:2 RTC:2 RTC:2 ~PC:4 ~MCR:3 OPR:2 SD:2 ~RTC:2
; CLK HI -> RTC:1 RTC:1 CSIO PC:1 ~MCR:2 OPR:1 CSIO CSIO
; DI (CMD) HI -> RTC:0 RTC:0 CSIO PC:0 ~MCR:0 OPR:0 CSIO CSIO
; DO (DAT0) HI -> RTC:7 RTC:6 CSIO PB:7 ~MSR:5 OPR:0 CSIO CSIO
;--------------------------------------------------------------------------------------
;----------------------------------------------------------------------------------------------
; SD Signal Active JUHA N8 CSIO PPI UART DSD MK4 SC MT
; ------------ ------- ------- ------- ------- ------- ------- ------- ------- ------- -------
; CS (DAT3) LO -> RTC:2 RTC:2 RTC:2 ~PC:4 ~MCR:3 OPR:2 SD:2 ~RTC:2/3OPR:4/5
; CLK HI -> RTC:1 RTC:1 CSIO PC:1 ~MCR:2 OPR:1 CSIO CSIO SPI
; DI (CMD) HI -> RTC:0 RTC:0 CSIO PC:0 ~MCR:0 OPR:0 CSIO CSIO SPI
; DO (DAT0) HI -> RTC:7 RTC:6 CSIO PB:7 ~MSR:5 OPR:0 CSIO CSIO SPI
;----------------------------------------------------------------------------------------------
;
; CS = CHIP SELECT (AKA DAT3 FOR NON-SPI MODE)
; CLK = CLOCK
@ -120,7 +120,7 @@ SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
SD_INPREG .EQU RTCIO ; INPUT REGISTER IS RTC
SD_CS .EQU %00000100 ; RTC:2 IS SELECT
SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK
SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %10000000 ; RTC:7 IS DATA OUT (CARD -> CPU)
@ -131,7 +131,7 @@ SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
SD_INPREG .EQU RTCIO ; INPUT REGISTER IS RTC
SD_CS .EQU %00000100 ; RTC:2 IS SELECT
SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK
SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU)
@ -141,7 +141,7 @@ SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU)
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
SD_CS .EQU %00000100 ; RTC:2 IS SELECT
SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
SD_CNTR .EQU Z180_CNTR
SD_TRDR .EQU Z180_TRDR
#ENDIF
@ -155,7 +155,7 @@ SD_PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
SD_OPRREG .EQU SD_PPIC ; PPI PORT C IS OPR REG
SD_OPRDEF .EQU %00110001 ; CS HI, DI HI
SD_INPREG .EQU SD_PPIB ; INPUT REGISTER IS PPI PORT B
SD_CS .EQU %00010000 ; PPIC:4 IS SELECT
SD_CS0 .EQU %00010000 ; PPIC:4 IS SELECT
SD_CLK .EQU %00000010 ; PPIC:1 IS CLOCK
SD_DI .EQU %00000001 ; PPIC:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %10000000 ; PPIB:7 IS DATA OUT (CARD -> CPU)
@ -166,7 +166,7 @@ SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU SIO_MCR ; UART MCR PORT (OUTPUT: CS, CLK, DIN)
SD_OPRDEF .EQU %00001100 ; QUIESCENT STATE
SD_INPREG .EQU SIO_MSR ; INPUT REGISTER IS MSR
SD_CS .EQU %00001000 ; UART MCR:3 IS SELECT
SD_CS0 .EQU %00001000 ; UART MCR:3 IS SELECT
SD_CLK .EQU %00000100 ; UART MCR:2 IS CLOCK
SD_DI .EQU %00000001 ; UART MCR:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %00100000 ; UART MSR:5 IS DATA OUT (CARD -> CPU)
@ -179,7 +179,7 @@ SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
SD_INPREG .EQU SD_OPRREG ; INPUT REGISTER IS OPRREG
SD_SELREG .EQU SD_OPRREG + 1 ; DEDICATED SELECTION REGISTER
SD_SELDEF .EQU %00000000 ; SELECTION REGISTER DEFAULT
SD_CS .EQU %00000100 ; RTC:2 IS SELECT
SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK
SD_DI .EQU %00000001 ; RTC:6 IS DATA IN (CARD <- CPU)
SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU)
@ -189,7 +189,7 @@ SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU)
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU $89 ; DEDICATED MK4 SDCARD REGISTER
SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
SD_CS .EQU %00000100 ; SELECT ACTIVE
SD_CS0 .EQU %00000100 ; SELECT ACTIVE
SD_CNTR .EQU Z180_CNTR
SD_TRDR .EQU Z180_TRDR
#ENDIF
@ -205,19 +205,25 @@ SD_TRDR .EQU Z180_TRDR
#ENDIF
;
#IF (SDMODE == SDMODE_MT) ; MT shift register for RC2014 (ref SDMODE_CSIO)
SD_BASE .EQU %01011100 ; Dedicated base address $5C
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU SD_BASE+2 ; SD CHIP SELECTOR
SD_OPRDEF .EQU %00100000 ; QUIESCENT STATE
SD_CD0 .EQU %00000001 ; IN/OUT:SD_OPREG:0 = CD0, PMOD pull CD0 low
SD_CD1 .EQU %00000010 ; IN:SD_OPREG:1 = CD1, IN=0 Card detect switch
SD_CD2 .EQU %00000100 ; IN:SD_OPREG:2 = CD2, IN=0 Card detect switch
ENETCS0 .EQU %00001000 ; IN/OUT:SD_OPREG:3 = CS0, PMOD SPI CS
SDCS1 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
PARK .EQU %00100000 ; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present
SD_WRTR .EQU %01011100 ; Write data and transfer
SD_RDTR .EQU %01011101 ; Read data and transfer
SD_RDNTR .EQU %01011100 ; Read data and NO transfer
;
; 3 SPI CHANNELS. CHANNEL 0 (CDX & CSX) IS A DEDICATED CONNECTION TO ONBOARD
; WIZNET W5500 AND IS NOT USED HERE. CHANNEL 1 (CD0 & CS0) & 2 (CD1 & CS1)
; ARE ASSUMED TO BE CONNECTED TO SD CARDS.
;
SD_BASE .EQU $5C ; Module base address
SD_DEVCNT .EQU 2 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_WRTR .EQU SD_BASE + 0 ; Write data and transfer
SD_RDTR .EQU SD_BASE + 1 ; Read data and transfer
SD_RDNTR .EQU SD_BASE + 0 ; Read data and NO transfer
SD_OPRREG .EQU SD_BASE + 2 ; SD CHIP SELECTOR
SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
SD_CDX .EQU %00000001 ; IN/OUT:SD_OPREG:0 = CD0, PMOD pull CD0 low
SD_CD0 .EQU %00000010 ; IN:SD_OPREG:1 = CD1, IN=0 Card detect switch
SD_CD1 .EQU %00000100 ; IN:SD_OPREG:2 = CD2, IN=0 Card detect switch
SD_CSX .EQU %00001000 ; IN/OUT:SD_OPREG:3 = CS0, PMOD SPI CS
SD_CS0 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
SD_CS1 .EQU %00100000 ; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present
#ENDIF
;
; SD CARD COMMANDS
@ -413,7 +419,7 @@ SD_INIT:
#IF (SDMODE == SDMODE_MT)
PRTS(" MODE=MT$")
PRTS(" IO=0x$")
LD A,SD_OPRREG
LD A,SD_BASE
CALL PRTHEXBYTE
#ENDIF
;
@ -577,50 +583,51 @@ SD_PROBE:
RET ; RETURN W/ ZF SET AS NEEDED
#ENDIF
;
#IF (SDMODE == SDMODE_MT)
LD A,SD_OPRDEF
OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
; TEST WITH PMOD NOT CONNECTED
; IN A,(SD_OPRREG)
; AND SD_CD0+SD_CS0 ; ISOLATE CD0 AND CS0
; CP SD_CD0+SD_CS0 ; BOTH SHOULD BE HIGH
; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT
; TEST CD0
; LD A,SD_CD0 ; D1=DNP CANNOT TEST
; OUT (SD_OPRREG),A
; IN A,(SD_OPRREG)
; AND SD_CD0
; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
; TEST CS0
; LD A,SD_CS0 ; D2=DNP CANNOT TEST
; OUT (SD_OPRREG),A
; IN A,(SD_OPRREG)
; AND SD_CS0
; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
; TEST CS1
; LD A,SD_CS1
; OUT (SD_OPRREG),A
; IN A,(SD_OPRREG)
; AND SD_CS1
; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
; ; TEST CS2
; LD A,SD_CS2
; OUT (SD_OPRREG),A
; IN A,(SD_OPRREG)
; AND SD_CS2
; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
LD A,SD_OPRDEF
OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
#ENDIF
;#IF (SDMODE == SDMODE_MT)
; LD A,SD_OPRDEF
; OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
;;
; ; TEST WITH PMOD NOT CONNECTED
;; IN A,(SD_OPRREG)
;; AND SD_CD0+SD_CS0 ; ISOLATE CD0 AND CS0
;; CP SD_CD0+SD_CS0 ; BOTH SHOULD BE HIGH
;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT
; ; TEST CD0
;; LD A,SD_CD0 ; D1=DNP CANNOT TEST
;; OUT (SD_OPRREG),A
;; IN A,(SD_OPRREG)
;; AND SD_CD0
;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
; ; TEST CS0
;; LD A,SD_CS0 ; D2=DNP CANNOT TEST
;; OUT (SD_OPRREG),A
;; IN A,(SD_OPRREG)
;; AND SD_CS0
;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
; ; TEST CS1
;; LD A,SD_CS1
;; OUT (SD_OPRREG),A
;; IN A,(SD_OPRREG)
;; AND SD_CS1
;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
;; ; TEST CS2
;; LD A,SD_CS2
;; OUT (SD_OPRREG),A
;; IN A,(SD_OPRREG)
;; AND SD_CS2
;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
;
; LD A,SD_OPRDEF
; OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
;#ENDIF
;
XOR A ; SIGNAL SUCCESS
;
#IF (SDMODE == SDMODE_MT)
SD_PROBE_FAIL:
LD A,SD_OPRDEF
OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
#ENDIF
;#IF (SDMODE == SDMODE_MT)
;SD_PROBE_FAIL:
; LD A,SD_OPRDEF
; OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
;#ENDIF
RET ; AND RETURN
;
;=============================================================================
@ -830,13 +837,6 @@ SD_INITCARD:
JP Z,SD_NOMEDIA ; Z=NO MEDIA, HANDLE IF SO
;
; WAKE UP THE CARD, KEEP DIN HI (ASSERTED) AND /CS HI (DEASSERTED)
#IF (SDMODE == SDMODE_MT)
LD A,$FF
LD B,$10 ; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8)
SD_INITCARD1:
OUT (SD_WRTR),A ; SEND 8 CLOCKS
DJNZ SD_INITCARD1
#ELSE
LD B,$10 ; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8)
SD_INITCARD1:
LD A,$FF ; KEEP DIN HI
@ -844,7 +844,6 @@ SD_INITCARD1:
CALL SD_PUT ; SEND 8 CLOCKS
POP BC ; RESTORE LOOP CONTROL
DJNZ SD_INITCARD1 ; LOOP AS NEEDED
#ENDIF
;
; PUT CARD IN IDLE STATE
CALL SD_GOIDLE ; GO TO IDLE
@ -875,9 +874,9 @@ SD_INITCARD3:
CALL VDELAY ; CPU SPEED NORMALIZED DELAY
; SEND APP CMD INTRODUCER
CALL SD_EXECACMD ; SEND APP COMMAND INTRODUCER
#IF (SDMODE == SDMODE_MT)
CALL NZ,SD_EXECACMD ; retry any fail
#ENDIF
;#IF (SDMODE == SDMODE_MT)
; CALL NZ,SD_EXECACMD ; retry any fail
;#ENDIF
CP SD_STCMDERR ; COMMAND ERROR?
JR Z,SD_INITCARD3A ; IF SO, TRY MMC CARD INIT
OR A ; SET FLAGS
@ -936,11 +935,7 @@ SD_INITCARD4:
CALL SD_EXECCMD ; EXECUTE COMMAND
RET NZ ; ABORT ON ERROR
; CMD58 WORKED, GET OCR DATA AND SET CARD TYPE
#IF (SDMODE == SDMODE_MT)
IN A,(SD_RDTR) ; BITS 31-24
#ELSE
CALL SD_GET ; BITS 31-24
#ENDIF
CALL SD_DONE ; FINISH THE TRANSACTION
AND $40 ; ISOLATE BIT 30 (CCS)
LD C,SD_TYPESDSC ; ASSUME V1 CARD
@ -1303,16 +1298,6 @@ SD_EXECCMD:
SD_EXECCMD0:
; SEND THE COMMAND
LD HL,SD_CMDBUF ; POINT TO COMMAND BUFFER
#IF (SDMODE == SDMODE_MT)
; OUT (SD_WRTR),A ; SEND IT
LD C,SD_WRTR
OUTI
OUTI
OUTI
OUTI
OUTI
OUTI
#ELSE
LD E,6 ; COMMANDS ARE 6 BYTES
SD_EXECCMD1:
LD A,(HL) ; PREPARE TO SEND NEXT BYTE
@ -1320,31 +1305,15 @@ SD_EXECCMD1:
INC HL ; POINT TO NEXT BYTE
DEC E ; DEC LOOP COUNTER
JR NZ,SD_EXECCMD1 ; LOOP TILL DONE W/ ALL 6 BYTES
#ENDIF
;
#IF (SD_NOPULLUP)
; THE FIRST FILL BYTE IS DISCARDED! THIS HACK IS REQUIRED BY
; STUPID SD CARD ADAPTERS THAT NOW OMIT THE MISO PULL-UP. SEE
; COMMENTS AT TOP OF THIS FILE.
#IF (SDMODE == SDMODE_MT)
IN A,(SD_RDTR) ; GET A BYTE AND DISCARD IT
#ELSE
CALL SD_GET ; GET A BYTE AND DISCARD IT
#ENDIF
#ENDIF
;
; GET RESULT
#IF (SDMODE == SDMODE_MT)
; 256 loops might not be long enough timeout
; when only IN is required to read data
LD E,0 ; INIT TIMEOUT LOOP COUNTER
SD_EXECCMD2:
IN A,(SD_RDTR) ; GET A BYTE FROM THE CARD
OR A ; SET FLAGS
JP P,SD_EXECCMD3 ; IF HIGH BIT IS 0, WE HAVE RESULT
DEC E ; OTHERWISE DECREMENT LOOP COUNTER
JR NZ,SD_EXECCMD2 ; AND LOOP UNTIL TIMEOUT
#ELSE
LD E,0 ; INIT TIMEOUT LOOP COUNTER
SD_EXECCMD2:
CALL SD_GET ; GET A BYTE FROM THE CARD
@ -1352,7 +1321,6 @@ SD_EXECCMD2:
JP P,SD_EXECCMD3 ; IF HIGH BIT IS 0, WE HAVE RESULT
DEC E ; OTHERWISE DECREMENT LOOP COUNTER
JR NZ,SD_EXECCMD2 ; AND LOOP UNTIL TIMEOUT
#ENDIF
JP SD_ERRCMDTO
;
SD_EXECCMD3:
@ -1524,11 +1492,7 @@ SD_PUTDATA3:
SD_WAITRDY:
LD DE,$FFFF ; LOOP MAX (TIMEOUT)
SD_WAITRDY1:
#IF (SDMODE == SDMODE_MT)
IN A,(SD_RDTR)
#ELSE
CALL SD_GET
#ENDIF
INC A ; $FF -> $00
RET Z ; IF READY, RETURN
DEC DE
@ -1552,11 +1516,7 @@ SD_WAITRDY1:
SD_DONE:
PUSH AF
LD A,$FF
#IF (SDMODE == SDMODE_MT)
OUT (SD_WRTR),A
#ELSE
CALL SD_PUT
#ENDIF
CALL SD_DESELECT
POP AF
RET
@ -1589,14 +1549,14 @@ SD_SETUP:
OUT (SD_OPRREG),A
#ENDIF
;
#IF ((SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_PPI))
#IF ((SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_PPI)| (SDMODE == SDMODE_MT))
LD A,SD_OPRDEF
LD (SD_OPRVAL),A
OUT (SD_OPRREG),A
#ENDIF
;
#IF (SDMODE == SDMODE_UART)
SD_OPRMSK .EQU (SD_CS | SD_CLK | SD_DI)
SD_OPRMSK .EQU (SD_CS0 | SD_CLK | SD_DI)
IN A,(SD_OPRREG) ; OPRREG == SIO_MCR
AND ~SD_OPRMSK ; MASK OFF SD CONTROL BITS
OR SD_OPRDEF ; SET DEFAULT BITS
@ -1645,34 +1605,29 @@ SD_CHKWP:
; SELECT CARD
;
SD_SELECT:
LD A,(SD_OPRVAL)
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
#IF (SDMODE == SDMODE_SC)
LD A,(IY+SD_DEV) ; GET CURRENT DEVICE
OR A ; SET FLAGS
LD A,(SD_OPRVAL) ; GET CURRENT OPRVAL BACK
JR NZ,SD_SELECT1 ; IF NOT ZERO, DO SECONDARY
; ASSERT PRIMARY CS, DEASSERT SECONDARY
AND ~SD_CS0
OR SD_CS1
JR SD_SELECT2
SD_SELECT1:
; DEASSERT PRIMARY CS, ASSERT SECONDARY
; ASSERT PRIMARY CS, DEASSERT SECONDARY (IF ANY)
OR SD_CS0
#IF (SD_DEVCNT > 1)
AND ~SD_CS1
#ENDIF
JR SD_SELECT2
SD_SELECT1:
; DEASSERT PRIMARY CS, ASSERT SECONDARY (IF ANY)
AND ~SD_CS0
#IF (SD_DEVCNT > 1)
OR SD_CS1
#ENDIF
SD_SELECT2:
; ADJUST BIT(S) FOR INTERFACES USING INVERTED CS BITS
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
#IF (SD_DEVCNT > 1)
XOR SD_CS0 | SD_CS1
#ELSE
AND ~SD_CS ; SET SD_CS (CHIP SELECT)
#ENDIF
#ELSE
#IF (SDMODE == SDMODE_MT)
LD A,SDCS1
SD_SELECT3:
LD D,A
LD A,(SD_OPRVAL)
OR D
#ELSE
OR SD_CS ; SET SD_CS (CHIP SELECT)
XOR SD_CS0
#ENDIF
#ENDIF
LD (SD_OPRVAL),A
@ -1683,18 +1638,17 @@ SD_SELECT3:
;
SD_DESELECT:
LD A,(SD_OPRVAL)
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
#IF (SDMODE == SDMODE_SC)
OR SD_CS0 ; RESET PRIMARY CHIP SELECT
OR SD_CS1 ; RESET SECONDARY CHIP SELECT
#ELSE
OR SD_CS ; RESET SD_CS (CHIP SELECT)
#ENDIF
#IF (SD_DEVCNT > 1)
AND ~(SD_CS0 | SD_CS1)
#ELSE
#IF (SDMODE == SDMODE_MT)
LD A,PARK ; WHY IS PARK (CS2) BEING ASSERTED HERE???
AND ~SD_CS0
#ENDIF
; ADJUST BIT(S) FOR INTERFACES USING INVERTED CS BITS
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
#IF (SD_DEVCNT > 1)
XOR SD_CS0 | SD_CS1
#ELSE
AND ~SD_CS ; RESET SD_CS (CHIP SELECT)
XOR SD_CS0
#ENDIF
#ENDIF
LD (SD_OPRVAL),A
@ -1723,9 +1677,12 @@ SD_WAITRX:
;
; SEND ONE BYTE
;
#IF (SDMODE != SDMODE_MT) ; SDMODE_MT uses "OUT (SD_WRTR),A"
;
SD_PUT:
;
#IF (SDMODE == SDMODE_MT)
OUT (SD_WRTR),A
#ELSE
;
#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
CALL MIRROR ; MSB<-->LSB MIRROR BITS, RESULT IN C
CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING
@ -1753,14 +1710,17 @@ SD_PUT1:
LD A,(SD_OPRVAL) ; LOAD CURRENT OPR VALUE
OUT (SD_OPRREG),A ; LEAVE WITH CLOCK LOW
#ENDIF
RET ; DONE
#ENDIF
RET ; DONE
;
; RECEIVE ONE BYTE
;
#IF (SDMODE != SDMODE_MT) ; SDMODE_MT uses "IN A,(SD_RDTR)"
;
SD_GET:
;
#IF (SDMODE == SDMODE_MT)
IN A,(SD_RDTR)
#ELSE
#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING
IN0 A,(Z180_CNTR) ; GET CSIO STATUS
@ -1801,8 +1761,8 @@ SD_GET1:
XOR $FF ; DO IS INVERTED ON UART
#ENDIF
#ENDIF
RET
#ENDIF
RET
;
;=============================================================================
; ERROR HANDLING AND DIAGNOSTICS
@ -1857,7 +1817,9 @@ SD_ERR2:
CALL SD_PRTSTAT
CALL SD_REGDUMP
#ENDIF
PUSH AF
CALL SD_DESELECT ; De-select if there was an error
POP AF
OR A ; SET FLAGS
RET
;

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