From 9e5f7331b15e11da54c582c2698bfb0ad0d7324f Mon Sep 17 00:00:00 2001 From: b1ackmai1er <39449559+b1ackmai1er@users.noreply.github.com> Date: Sat, 18 May 2019 15:45:24 +0800 Subject: [PATCH] Add N8 Beep --- Source/HBIOS/ay.asm | 6 ++++++ Source/HBIOS/cfg_n8.asm | 7 ++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/Source/HBIOS/ay.asm b/Source/HBIOS/ay.asm index 0e0b657b..7c95df6e 100644 --- a/Source/HBIOS/ay.asm +++ b/Source/HBIOS/ay.asm @@ -4,9 +4,15 @@ ; WILL ALSO WORK WITH YM2149 ;====================================================================== ; +#IF (PLATFORM == PLT_N8) +AY_RSEL .EQU N8_PSG+0 +AY_RDAT .EQU N8_PSG+1 +AY_ACR .EQU N8_DEFACR +#ELSE AY_RSEL .EQU $9A AY_RDAT .EQU $9B AY_ACR .EQU $9C +#ENDIF AY_R0CHAP .EQU $00 AY_R1CHAP .EQU $01 AY_R2CHBP .EQU $02 diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index 9542eb4a..983b7d1b 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -6,6 +6,7 @@ ; BUILD CONFIGURATION OPTIONS ; CPUOSC .EQU 18432000 ; CPU OSC FREQ +MEMMGR .EQU MM_N8 ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180 RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 @@ -35,7 +36,7 @@ TMSENABLE .EQU TRUE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT VGAENABLE .EQU FALSE ; TRUE FOR VGA VIDEO/KBD SUPPORT ; SPKENABLE .EQU FALSE ; TRUE FOR RTC LATCH IOBIT SOUND -AYENABLE .EQU FALSE ; TRUE FOR AY PSG SOUND +AYENABLE .EQU TRUE ; TRUE FOR AY PSG SOUND ; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) @@ -91,3 +92,7 @@ BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3) +; +PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT +PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD +PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)