Merge trunk -> dgg

branches/dgg/DiskImg/Build.cmd

@@ -1,4 +1,6 @@
 @echo off
+PowerShell .\Build.ps1 %*
+goto :eof
 
 setlocal
 set path=..\tools\cpmtools;%path%

branches/dgg/DiskImg/Build.ps1

@@ -9,16 +9,30 @@ $ImgFile = "Disk.img"
 $Blank = ([byte[]](0xE5) * (128KB * 65))
 
 "Creating work file..."
-Set-Content -Value $Blank -Encoding byte -Path Blank.img
-
-"Creating output file..."
-Set-Content -Path $ImgFile -Value $null
+if (!(Test-Path('Blank.img'))) {Set-Content -Value $Blank -Encoding byte -Path 'Blank.img'}
 
 "Adding files to partition 0..."
 copy Blank.img hd0.tmp
 if (Test-Path ('hd0\*')) {cpmcp -f hd0 hd0.tmp hd0/*.* 0:}
 
-copy /b hd*.tmp Disk.img
+"Adding files to partition 1..."
+copy Blank.img hd1.tmp
+if (Test-Path ('hd1\*')) {cpmcp -f hd0 hd1.tmp hd1/*.* 0:}
+
+"Adding files to partition 2..."
+copy Blank.img hd2.tmp
+if (Test-Path ('hd2\*')) {cpmcp -f hd0 hd2.tmp hd2/*.* 0:}
+
+"Adding files to partition 3..."
+copy Blank.img hd3.tmp
+if (Test-Path ('hd3\*')) {cpmcp -f hd0 hd3.tmp hd3/*.* 0:}
+
+"Adding slices to image..."
+#gc hd0.tmp -Enc Byte -Read 512 | Add-Content -Enc Byte $ImgFile 
+#gc hd0.tmp -Enc Byte -Read 10240 | sc x.x -Enc Byte
+&$env:COMSPEC /c copy /b hd*.tmp $ImgFile
+
+Remove-Item *.tmp
 
 return
 

branches/dgg/Source/Build.ps1

@@ -113,7 +113,7 @@ Asm 'bootrom'
 Asm 'bootapp'
 Asm 'loader'
 Asm 'pgzero'
-Asm 'bnk1'
+Asm 'hbios'
 Asm 'hbfill'
 Asm 'romfill'
 
@@ -124,8 +124,8 @@ Asm 'romfill'
 Concat 'cp.bin','dos.bin','cbios.bin' 'os.bin'
 Concat 'prefix.bin','os.bin' $SysImgFile
 Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','romfill.bin','dbgmon.bin','os.bin','hbfill.bin' 'rom0.bin'
-Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','bnk1.bin' 'rom1.bin'
-Concat 'bootapp.bin','syscfg.bin','loader.bin','bnk1.bin','dbgmon.bin','os.bin' $LoaderFile
+Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','hbios.bin' 'rom1.bin'
+Concat 'bootapp.bin','syscfg.bin','loader.bin','hbios.bin','dbgmon.bin','os.bin' $LoaderFile
 
 # Create the RomDisk image
 

branches/dgg/Source/ansi.asm

@@ -2,6 +2,13 @@
 
 ; Status: Still very experimental, either doesn't work or is buggy
  
+; WBW: BOGUS EQUATE TO GET MODULE TO BUILD FOR NON-N8 HARDWARE
+; NEEDS TO BE FIXED BEFORE IT WILL WORK FOR ANYTHING OTHER THAN N8
+#IF (!N8VENABLE)
+#DEFINE	N8V_OFFSET	PANIC
+#ENDIF
+
+;
 ;==================================================================================================
 ;   ANSI EMULATION MODULE
 ;==================================================================================================
@@ -150,6 +157,7 @@ ANSI_STATE2_NOT_SEMI:
 	JP	ANSI_CMD_DISP
 	
 ANSI_INIT:
+	PRTS("ANSI:$")
 	JR	ANSI_INI	; REUSE THE INI FUNCTION BELOW
 ;
 

branches/dgg/Source/bootapp.asm

@@ -9,11 +9,23 @@
 ;
 #INCLUDE "std.asm"
 ;
-	.ORG	0100H
+	.ORG	$100
 ;
 	DI			; NO INTERRUPTS
 	IM	1		; INTERRUPT MODE 1
-
+	LD	SP,$FF00	; START WITH SP BELOW HBIOS PROXY LOCATION
+;
+;	LD	BC,0
+;XXX:
+;	DJNZ	XXX
+;	DEC	C
+;	JR	NZ,XXX
+;
+; EMIT FIRST SIGN OF LIFE TO SERIAL PORT
+;
+	CALL	XIO_INIT	; INIT SERIAL PORT
+	LD	HL,STR_BOOT	; POINT TO MESSAGE
+	CALL	XIO_OUTS	; SAY HELLO
 ;
 ; PERFORM MINIMAL Z180 SPECIFIC INITIALIZATION
 ;
@@ -38,17 +50,22 @@
 	LD	A,(RAMSIZE - 64) >> 2
 	OUT0	(CPU_CBR),A		; COMMON BASE = LAST (TOP) BANK
 #ENDIF
-
+;
+	CALL	XIO_DOT
 ;
 ; RELOCATE MONITOR/OS CODE FROM 8000H TO C000H
 ;   - HBIOS PROXY AT $FF00 IS OVERLAID, BUT WE DON'T CARE
 ;     ABOUT IT ANYMORE, IT WILL BE REFRESHED DURING HBIOS
 ;     INIT LATER.
 ; 
-	LD	HL,8000H	; COPY MEMORY FROM 8000
-	LD	DE,0C000H	; TO C000
-	LD	BC,4000H	; COPY 16K
+; NOTE: STACK IS WIPED OUT, STACK IS ASSUMED TO BE EMPTY HERE!!!!
+;
+	LD	HL,$8000	; COPY MEMORY FROM 8000
+	LD	DE,$C000	; TO C000
+	LD	BC,$4000	; COPY 16K
 	LDIR
+;
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; COPY FIRST $1000 BYTES TO $8000 (UPPER, NON-BANKED MEMORY)
 ; THIS INCLUDES OURSELVES AND THE LOADER CODE
@@ -56,13 +73,21 @@
 ;
 ; RELOCATE BOOT PHASE 2 AND LOADER CODE FROM 0000H TO 8000H
 ;
-	LD	HL,0000H	; COPY MEMORY FROM 0000
-	LD	DE,8000H	; TO 8000H
-	LD	BC,1000H	; COPY 1000H BYTES
+	LD	HL,$0000	; COPY MEMORY FROM 0000
+	LD	DE,$8000	; TO 8000H
+	LD	BC,$1000	; COPY 1000H BYTES
 	LDIR
+;
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 	JP	PHASE2		; JUMP TO PHASE 2 BOOT IN UPPER MEMORY
 ;
+STR_BOOT	.DB	"Boot$"
+;
+; IMBED DIRECT SERIAL I/O ROUTINES
+;
+#INCLUDE "xio.asm"
+;
 ;______________________________________________________________________________________________________________________
 ;
 ; THIS IS THE PHASE 2 CODE THAT MUST EXECUTE IN UPPER MEMORY
@@ -70,14 +95,14 @@
 	.ORG	$ + $8000	; WE ARE NOW EXECUTING IN UPPER MEMORY
 ;
 PHASE2:
-	LD	SP,9000H	; INIT BOOT STACK
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; COPY RAMPG0 TO RAMPG1
 ;
-	LD	HL,0000H	; HL = LOCATION IN LOMEM TO COPY FROM/TO
+	LD	HL,0		; HL = LOCATION IN LOMEM TO COPY FROM/TO
 LOOP:
-	LD	DE,09000H	; DE = BUFFER ADDRESS
-	LD	BC,1000H	; BYTES TO COPY (4K CHUNKS)
+	LD	DE,$9000	; DE = BUFFER ADDRESS
+	LD	BC,$1000	; BYTES TO COPY (4K CHUNKS)
 	PUSH	BC		; SAVE COPY SIZE
 	PUSH	DE		; SAVE COPY DEST
 	PUSH	HL		; SAVE COPY SOURCE
@@ -92,21 +117,21 @@ LOOP:
 	LDIR			; COPY BUFFER -> RAM
 	EX	DE,HL		; GET LOMEM POINTER BACK TO HL
 	LD	A,H		; HIGH BYTE OF POINTER TO A
-	CP	80H		; HIGH BYTE WILL BE 80H WHEN WE ARE DONE
+	CP	$80		; HIGH BYTE WILL BE 80H WHEN WE ARE DONE
 	JP	NZ,LOOP		; IF NOT DONE, LOOP TO DO NEXT 4K CHUNK
+;
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; INITIALIZE HBIOS AND JUMP TO LOADER
 ;
 	; CALL HBIOS HARDWARE INITIALIZATION
-	LD	A,1		; SETUP TO SELECT PAGE 1
-	CALL	RAMPG		; SELECT RAM PAGE 1 (WHICH IS NOW LOADED WITH BNK1 CODE)
-	CALL	1000H		; CALL HBIOS INITIALIZATION
+	CALL	$1000		; CALL HBIOS INITIALIZATION
 ;
 	; CALL HBIOS PROXY INITIALIZATION
 	CALL	RAMPGZ		; MAKE SURE RAM PAGE ZERO IS MAPPED TO LOWER 32K
-	CALL	0FF20H		; CALL HBIOS PROXY INITIALIZATION
+	CALL	$FF20		; CALL HBIOS PROXY INITIALIZATION
 ;
-	JP	8400H		; JUMP TO LOADER
+	JP	$8400		; JUMP TO LOADER
 ;______________________________________________________________________________________________________________________
 ;
 ; NOTE THAT MEMORY MANAGER CODE IS IN UPPER MEMORY!

branches/dgg/Source/bootrom.asm

@@ -9,11 +9,17 @@
 ;
 #INCLUDE "std.asm"
 ;
-	.ORG	0100H
+	.ORG	$100
 ;
 	DI			; NO INTERRUPTS
 	IM	1		; INTERRUPT MODE 1
-
+	LD	SP,$FF00	; START WITH SP BELOW HBIOS PROXY LOCATION
+;
+; EMIT FIRST SIGN OF LIFE TO SERIAL PORT
+;
+	CALL	XIO_INIT	; INIT SERIAL PORT
+	LD	HL,STR_BOOT	; POINT TO MESSAGE
+	CALL	XIO_OUTS	; SAY HELLO
 ;
 ; PERFORM MINIMAL Z180 SPECIFIC INITIALIZATION
 ;
@@ -31,14 +37,15 @@
 	OUT0	(CPU_DCNTL),A
 
 	; MMU SETUP
-	LD	A,80H
+	LD	A,$80
 	OUT0	(CPU_CBAR),A		; SETUP FOR 32K/32K BANK CONFIG
 	XOR	A
 	OUT0	(CPU_BBR),A		; BANK BASE = 0
 	LD	A,(RAMSIZE - 64) >> 2
 	OUT0	(CPU_CBR),A		; COMMON BASE = LAST (TOP) BANK
 #ENDIF
-
+;
+	CALL	XIO_DOT
 ;
 ; COPY ENTIRE CONTENTS OF ROM BANK 0 TO HI RAM
 ; THIS INCLUDES OURSELVES AND THE LOADER CODE
@@ -46,13 +53,23 @@
 ;     BECAUSE IT WILL BE REFRESHED DURING HBIOS
 ;     INIT LATER.
 ;
-	LD	HL,0000H	; COPY MEMORY FROM LOMEM (0000H)
-	LD	DE,8000H	; TO HIMEM (8000H)
-	LD	BC,8000H	; COPY ENTIRE BANK, 8000H BYTES
+; NOTE: STACK IS WIPED OUT, STACK IS ASSUMED TO BE EMPTY HERE!!!!
+;
+	LD	HL,$0000	; COPY MEMORY FROM LOMEM (0000H)
+	LD	DE,$8000	; TO HIMEM (8000H)
+	LD	BC,$8000	; COPY ENTIRE BANK, 8000H BYTES
 	LDIR
+;
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 	JP	PHASE2		; JUMP TO PHASE 2 BOOT IN UPPER MEMORY
 ;
+STR_BOOT	.DB	"Boot$"
+;
+; IMBED DIRECT SERIAL I/O ROUTINES
+;
+#INCLUDE "xio.asm"
+;
 ;______________________________________________________________________________________________________________________
 ;
 ; THIS IS THE PHASE 2 CODE THAT MUST EXECUTE IN UPPER MEMORY
@@ -60,14 +77,14 @@
 	.ORG	$ + $8000	; WE ARE NOW EXECUTING IN UPPER MEMORY
 ;
 PHASE2:
-	LD	SP,9000H	; INIT BOOT STACK
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; COPY ROMPG1 TO RAMPG1
 ;
-	LD	HL,0000H	; HL = LOCATION IN LOMEM TO COPY FROM/TO
+	LD	HL,0		; HL = LOCATION IN LOMEM TO COPY FROM/TO
 LOOP:
-	LD	DE,09000H	; DE = BUFFER ADDRESS
-	LD	BC,1000H	; BYTES TO COPY (4K CHUNKS)
+	LD	DE,$9000	; DE = BUFFER ADDRESS
+	LD	BC,$1000	; BYTES TO COPY (4K CHUNKS)
 	PUSH	BC		; SAVE COPY SIZE
 	PUSH	DE		; SAVE COPY DEST
 	PUSH	HL		; SAVE COPY SOURCE
@@ -82,21 +99,21 @@ LOOP:
 	LDIR			; COPY BUFFER -> RAM
 	EX	DE,HL		; GET LOMEM POINTER BACK TO HL
 	LD	A,H		; HIGH BYTE OF POINTER TO A
-	CP	80H		; HIGH BYTE WILL BE 80H WHEN WE ARE DONE
+	CP	$80		; HIGH BYTE WILL BE $80 WHEN WE ARE DONE
 	JP	NZ,LOOP		; IF NOT DONE, LOOP TO DO NEXT 4K CHUNK
+;
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; INITIALIZE HBIOS AND JUMP TO LOADER
 ;
 	; CALL HBIOS HARDWARE INITIALIZATION
-	LD	A,1		; SETUP TO SELECT PAGE 1
-	CALL	RAMPG		; SELECT RAM PAGE 1 (WHICH IS NOW LOADED WITH BNK1 CODE)
-	CALL	1000H		; CALL HBIOS INITIALIZATION
+	CALL	$1000		; CALL HBIOS INITIALIZATION
 ;
 	; CALL HBIOS PROXY INITIALIZATION
 	CALL	RAMPGZ		; MAKE SURE RAM PAGE ZERO IS MAPPED TO LOWER 32K
-	CALL	0FF20H		; CALL HBIOS PROXY INITIALIZATION
+	CALL	$FF20		; CALL HBIOS PROXY INITIALIZATION
 ;
-	JP	8400H		; JUMP TO LOADER
+	JP	$8400		; JUMP TO LOADER
 ;______________________________________________________________________________________________________________________
 ;
 ; NOTE THAT MEMORY MANAGER CODE IS IN UPPER MEMORY!
@@ -107,6 +124,6 @@ LOOP:
 ; PAD OUT REMAINDER OF PAGE
 ;
 	.ORG	$ - $8000	; ORG BACK TO LOWER MEMORY
-	.FILL	$0200 - $,$FF	; PAD OUT REMAINDER OF PAGE
+	.FILL	$200 - $,$FF	; PAD OUT REMAINDER OF PAGE
 ;
 	.END

branches/dgg/Source/cbios.asm

@@ -98,11 +98,8 @@ BOOT:
 ;__________________________________________________________________________________________________			
 WBOOT:
 	DI
-#IF (INTMODE = 2)
-	IM 	2		; HARDWARE SUPPORTS MODE 2 INTERRUPTS
-#ELSE
-	IM	1		; HARDWARE DOES NOT SUPPORT MODE 2 INTERRUPTS
-#ENDIF
+	IM	1
+
 	LD	SP,ISTACK	; STACK FOR INITIALIZATION
 	
 	; RELOAD COMMAND PROCESSOR FROM CACHE
@@ -165,9 +162,6 @@ CURDSK:
 	LD	A,(CDISK)		; GET CURRENT USER/DISK
 GOCCP:
 	LD	C,A			; SETUP C WITH CURRENT USER/DISK, ASSUME IT IS OK
-#IF (INTMODE = 2)
-	EI				; BE BRAVE
-#ENDIF
 	JP	CCP
 ;
 ;__________________________________________________________________________________________________			
@@ -882,9 +876,9 @@ BLK_CMPLOOP:
 ; BLOCK DATA - INSERT CPM DMA BUF INTO PROPER PART OF PHYSICAL SECTOR BUFFER
 ;
 BLK_BLOCK:
-	CALL	BLK_SETUP	; SETUP SOURCE AND DESTINATION
-	EX	DE,HL		; SWAP HL/DE FOR BLOCK OPERATION
-	LD	BC,128		; DMA BUFFER SIZE
+	CALL		BLK_SETUP	; SETUP SOURCE AND DESTINATION
+	EX		DE,HL		; SWAP HL/DE FOR BLOCK OPERATION
+	LD		BC,128		; DMA BUFFER SIZE
 	LDIR				; COPY THE DATA
 	RET
 ;
@@ -893,9 +887,9 @@ BLK_BLOCK:
 ; DEBLOCK DATA - EXTRACT DESIRED CPM DMA BUF FROM PHYSICAL SECTOR BUFFER
 ;
 BLK_DEBLOCK:
-	CALL	BLK_SETUP	; SETUP SOURCE AND DESTINATION
-	LD	BC,128		; DMA BUFFER SIZE
-	LDIR			; COPY THE DATA
+	CALL		BLK_SETUP	; SETUP SOURCE AND DESTINATION
+	LD		BC,128		; DMA BUFFER SIZE
+	LDIR				; COPY THE DATA
 	RET
 ;
 ;__________________________________________________________________________________________________
@@ -904,17 +898,17 @@ BLK_DEBLOCK:
 ; AT EXIT, HL = ADDRESS OF DESIRED BLOCK IN SECTOR BUFFER, DE = DMA
 ;
 BLK_SETUP:	
-	LD	BC,(SEKSEC)
-	LD	A,C
-	AND	3		; A = INDEX OF CPM BUF IN SEC BUF
-	RRCA			; MULTIPLY BY 64
+	LD		BC,(SEKSEC)
+	LD		A,C
+	AND		3		; A = INDEX OF CPM BUF IN SEC BUF
+	RRCA				; MULTIPLY BY 64
 	RRCA
-	LD	E,A		; INTO LOW ORDER BYTE OF DESTINATION
-	LD	D,0		; HIGH ORDER BYTE IS ZERO
-	LD	HL,(BUFADR)	; HL = START OF SEC BUF
-	ADD	HL,DE		; ADD IN COMPUTED OFFSET
-	ADD	HL,DE		; HL NOW = INDEX * 128 (SOURCE)
-	LD	DE,(DMAADR)	; DE = DESTINATION = DMA BUF
+	LD		E,A		; INTO LOW ORDER BYTE OF DESTINATION
+	LD		D,0		; HIGH ORDER BYTE IS ZERO
+	LD		HL,(BUFADR)	; HL = START OF SEC BUF
+	ADD		HL,DE		; ADD IN COMPUTED OFFSET
+	ADD		HL,DE		; HL NOW = INDEX * 128 (SOURCE)
+	LD		DE,(DMAADR)	; DE = DESTINATION = DMA BUF
 	RET
 ;
 ;==================================================================================================
@@ -1350,13 +1344,6 @@ MD_DMACPY:
 ;
 #INCLUDE "memmgr.asm"
 ;
-ORG_ISR		.EQU	$
-#INCLUDE "isr.asm"
-SIZ_ISR		.EQU	$ - ORG_ISR
-		.ECHO	"ISR occupies "
-		.ECHO	SIZ_ISR
-		.ECHO	" bytes.\n"
-;
 ;==================================================================================================
 ; UTILITY FUNCTIONS
 ;==================================================================================================
@@ -1806,15 +1793,15 @@ SLACK		.EQU	(CBIOS_END - $ - 32 - 32 - 16 - 512)
 ; OF THE MEDIA ID'S (SAME SEQUENCE, NO GAPS)
 ;
 DPB_MAP:
-	.DW	0			; MID_NONE (NO MEDIA)
-	.DW	DPB_ROM			; MID_MDROM
-	.DW	DPB_RAM			; MID_MDRAM
-	.DW	DPB_HD			; MID_HD
-	.DW	DPB_FD720		; MID_FD720
-	.DW	DPB_FD144		; MID_FD144
-	.DW	DPB_FD360		; MID_FD360
-	.DW	DPB_FD120		; MID_FD120
-	.DW	DPB_FD111		; MID_FD111
+	.DW	0		; MID_NONE (NO MEDIA)
+	.DW	DPB_ROM		; MID_MDROM
+	.DW	DPB_RAM		; MID_MDRAM
+	.DW	DPB_HD		; MID_HD
+	.DW	DPB_FD720	; MID_FD720
+	.DW	DPB_FD144	; MID_FD144
+	.DW	DPB_FD360	; MID_FD360
+	.DW	DPB_FD120	; MID_FD120
+	.DW	DPB_FD111	; MID_FD111
 ;
 DPB_CNT	.EQU	($ - DPB_MAP) / 2
 ;
@@ -2019,12 +2006,7 @@ CFGBUF:				; START OF 256 BYTE CONFIG BUFFER
 ;
 INIT:
 	DI
-#IF (INTMODE = 2)
-	IM 	2		; HARDWARE SUPPORTS MODE 2 INTERRUPTS
-	CALL	INITISR		; INITIALISE VECTOR TABLE AND ANY INTERRUPT HARDWARE
-#ELSE
-	IM	1		; HARDWARE DOES NOT SUPPORT MODE 2 INTERRUPTS
-#ENDIF
+	IM	1
 	
 	; SETUP A TEMP STACK IN UPPER 32K
 	LD	SP,ISTACK		; STACK FOR INITIALIZATION
@@ -2046,17 +2028,13 @@ INIT:
 	LD	(IOBYTE),A		; STORE IT
 	
 #IF (PLATFORM != PLT_N8)
-	IN	A,(RTC)			; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER
-;	LD	A,40H			; *DEBUG* SIMULATE JUMPER OPEN
-;	LD	A,00H			; *DEBUG* SIMULATE JUMPER SHORTED
-	AND	40H			; ISOLATE BIT 6
-	JR	Z,INIT1			; IF BIT6=0, SHORTED, USE ALT IOBYTE
-	LD	A,DEFIOBYTE		; LOAD DEF IOBYTE VALUE
-	JR	INIT2			; CONTINUE
-INIT1:
-	LD	A,ALTIOBYTE		; LOAD ALT IOBYTE VALUE
-INIT2:	
-	LD	(IOBYTE),A		; SET THE ACTIVE IOBYTE
+	IN	A,(RTC)		; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER
+	BIT	6,A		; BIT 6 HAS CONFIG JUMPER STATE
+	LD	A,DEFIOBYTE	; ASSUME WE WANT DEFAULT IOBYTE VALUE
+	JR	NZ,INIT1	; IF BIT6=1, NOT SHORTED, CONTINUE WITH DEFAULT
+	LD	A,ALTIOBYTE	; LOAD ALT IOBYTE VALUE
+INIT1:	
+	LD	(IOBYTE),A	; SET THE ACTIVE IOBYTE
 #ENDIF
 	
 	; DEFAULT DRIVE

branches/dgg/Source/config_n8_2312.asm

@@ -3,34 +3,21 @@
 ;   ROMWBW 2.X CONFIGURATION FOR N8 5/8/2012
 ;==================================================================================================
 ;
-; About Doug's configuration
-;
-; The CPU Frequency is specified as 18 (MHz)
-; The Platform is PLT_N8
-; The default VDA is the TMS9918 (N8V)
-; The default emulation is ANSI
-; The DSKMAP is DM_PPIDE
-; The N8VENABLE is TRUE
-; The PPIDEENABLE is TRUE
-; The PPIDECAPACITY is 200*9
-; The TTYENABLE AND ANSIENABLE ARE TRUE
-
-
 ; BUILD CONFIGURATION OPTIONS
 ;
-CPUFREQ		.EQU	18		; IN MHZ, USED TO COMPUTE DELAY FACTORS
+CPUFREQ		.EQU	20		; IN MHZ, USED TO COMPUTE DELAY FACTORS
 ;
 PLATFORM	.EQU	PLT_N8		; PLT_N8VEM, PLT_ZETA, PLT_N8
 ;
 DEFCON		.EQU	CIODEV_UART	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_VDU, DIODEV_PRPCON
 ALTCON		.EQU	DEFCON		; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
 DEFVDA		.EQU	VDADEV_N8V	; DEFAULT VDA (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_7220, VDADEV_N8V)
-DEFEMU		.EQU	EMUTYP_ANSI	; EMUTYP_TTY	; DEFAULT EMULATION TYPE (EMUTYP_TTY, EMUTYP_ANSI, ...)
+DEFEMU		.EQU	EMUTYP_TTY	; DEFAULT EMULATION TYPE (EMUTYP_TTY, EMUTYP_ANSI, ...)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_PPIDE	; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD
+DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD
 ;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
@@ -61,16 +48,16 @@ IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE
 IDE8BIT		.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
 IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-PPIDEENABLE	.EQU	TRUE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
+PPIDEENABLE	.EQU	FALSE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
 PPIDEMODE	.EQU	PPIDEMODE_STD	; PPIDEMODE_STD, PPIDEMODE_DIO3
 PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
 PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
-PPIDECAPACITY	.EQU	200*9		; CAPACITY OF DEVICE (IN MB)
+PPIDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 PPIDESLOW	.EQU	FALSE		; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
 ;
 SDENABLE	.EQU	TRUE		; TRUE FOR SD SUPPORT
-SDTRACE		.EQU	2		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
-SDCAPACITY	.EQU	200*9		; CAPACITY OF DEVICE (IN MB)
+SDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIO		.EQU	TRUE		; TRUE IF USING THE CSIO PORT (N8 ONLY)
 SDCSIOFAST	.EQU	FALSE		; TRUE IF USING THE LOOKUP TABLE RATHER THAN SHIFTS AND ROTATES (N8 ONLY)
 PPISD		.EQU	FALSE		; TRUE IF USING PPISD MINI-BOARD (DO NOT COMBINE WITH PPIDE)

branches/dgg/Source/cvdu.asm

@@ -24,6 +24,7 @@ CVDU_DATA	 .EQU	$EC		; READ/WRITE M8563 DATA
 ;======================================================================
 ;
 CVDU_INIT:
+	PRTS("CVDU:$")
 	CALL 	CVDU_CRTINIT		; SETUP THE CVDU CHIP REGISTERS
 	CALL	CVDU_LOADFONT		; LOAD FONT DATA FROM ROM TO CVDU STRORAGE
 

branches/dgg/Source/fd.asm

@@ -429,6 +429,11 @@ FD_MEDIA3:
 ; FD_INIT
 ;
 FD_INIT:
+	PRTS("FD: IO=0x$")
+	LD	A,FDC_MSR
+	CALL	PRTHEXBYTE
+	PRTS(" UNITS=2$")
+
 	LD	A,FDMEDIA
 	LD	(FCD_U0MEDIA),A
 	LD	(FCD_U1MEDIA),A

branches/dgg/Source/bnk1.asm → branches/dgg/Source/hbios.asm

@@ -1,7 +1,7 @@
-;__________________________________________________________________________________________________
 ;
-;	BANK1
-;__________________________________________________________________________________________________
+;==================================================================================================
+;   HBIOS
+;==================================================================================================
 ;
 
 ; bnk1.asm 11/16/2012 dwg - specify hl=0 before calling N8V_INIT 
@@ -14,7 +14,6 @@
 ; INCLUDE GENERIC STUFF
 ;
 #INCLUDE "std.asm"
-
 ;
 ;==================================================================================================
 ;   SYSTEM INITIALIZATION
@@ -24,140 +23,152 @@
 ;
 INITSYS:
 ;
+; ANNOUNCE HBIOS
+;
+	CALL	NEWLINE
+	CALL	NEWLINE
+	PRTX(STR_PLATFORM)
+	PRTS(" @ $")
+	LD	HL,CPUFREQ
+	CALL	PRTDEC
+	PRTS("MHz ROM=$")
+	LD	HL,ROMSIZE
+	CALL	PRTDEC
+	PRTS("KB RAM=$")
+	LD	HL,RAMSIZE
+	CALL	PRTDEC
+	PRTS("KB$")
+;
 ; INSTALL HBIOS PROXY IN UPPER MEMORY
 ;
-	LD	HL,HB_IMG
-	LD	DE,HB_LOC
-	LD	BC,HB_SIZ
-	LDIR
+	LD	HL,HB_IMG	; HL := SOURCE OF HBIOS PROXY IMAGE
+	LD	DE,HB_LOC	; DE := DESTINATION TO INSTALL IT
+	LD	BC,HB_SIZ	; SIZE
+	LDIR			; DO THE COPY
+;
+; DURING INITIALIZATION, CONSOLE IS UART!
+; POST-INITIALIZATION, WILL BE SWITCHED TO USER CONFIGURED CONSOLE
+;
+	LD	A,CIODEV_UART
+	LD	(CONDEV),A
+;
+; PERFORM DEVICE INITIALIZATION
+;
+	LD	B,HB_INITTBLLEN
+	LD	DE,HB_INITTBL
+INITSYS2:
+	CALL	NEWLINE
+	LD	A,(DE)
+	LD	L,A
+	INC	DE
+	LD	A,(DE)
+	LD	H,A
+	INC	DE
+	PUSH	DE
+	PUSH	BC
+	CALL	JPHL
+	OR	A
+	JR	Z,INITSYS3
+	PUSH	AF
+	CALL	PC_SPACE
+	POP	AF
+	CALL	PC_LBKT
+	CALL	PRTHEXBYTE
+	CALL	PC_RBKT
+	JR	INITSYS4
+INITSYS3:
+	PRTS(" [OK]$")
+INITSYS4:
+	POP	BC
+	POP	DE
+	DJNZ	INITSYS2
+;
+; SET UP THE DEFAULT DISK BUFFER ADDRESS
 ;
 	LD	HL,$8000	; DEFAULT DISK XFR BUF ADDRESS
 	LD	(DIOBUF),HL	; SAVE IT
 ;
-#IF (PLATFORM != PLT_N8)
+; NOW SWITCH TO USER CONFIGURED CONSOLE
+;
+#IF (PLATFORM == PLT_N8)
+	LD	A,DEFCON
+#ELSE
 	IN	A,(RTC)		; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER
-	LD	A,DEFCON	; ASSUME WE WANT DEFAULT CONSOLE
 	BIT	6,A		; BIT 6 HAS CONFIG JUMPER STATE
+	LD	A,DEFCON	; ASSUME WE WANT DEFAULT CONSOLE
 	JR	NZ,INITSYS1	; IF NZ, JUMPER OPEN, DEF CON IS CORRECT
 	LD	A,ALTCON	; JUMPER SHORTED, USE ALTERNATE CONSOLE
 INITSYS1:
-	LD	(CONDEV),A	; SET THE ACTIVE CONSOLE DEVICE
 #ENDIF
+	LD	(CONDEV),A	; SET THE ACTIVE CONSOLE DEVICE
 ;
-; PERFORM INTERRUPT INITIALISATION
+; DISPLAY THE POST-INITIALIZATION BANNER
 ;
-#IF (INTMODE = 2)
-	LD	A,0FFH		; INTERRUPT VECTOR TABLE PAGE
-	LD	I,A		; INTERRUPT VECTOR REGISTER
-	IM	2		; MODE 2 INTERRUPTS
-#IF (PLATFORM = PLT_N8)
-	XOR	A		; PUT Z180 VECTORS ON PAGE BOUNDARY
-	OUT	(CPU_IL),A
-#ENDIF
-#IF ((PLATFORM = PLT_N8VEM) & (ZPBASE !=0))
-				; INIT VECTORS ON ZILOG PERIPHERALS BOARD
-				; INIT Z80-CTC
-	XOR	A		; VECTOR AT FF00H
-	OUT	(ZPBASE+0),A	; ALL CHANNELS
-
-				; INIT Z80-PIO1
-	LD	A,08H		; VECTOR AT FF08H
-	OUT	(ZPBASE+0AH),A	; PORT A
-	LD	A,0AH		; VECTOR AT FF0AH
-	OUT	(ZPBASE+0BH),A	; PORT B
-
-				; INIT Z80-PIO2
-	LD	A,0CH		; VECTOR AT FF0CH
-	OUT	(ZPBASE+0EH),A	; PORT A
-	LD	A,0EH		; VECTOR AT FF0EH
-	OUT	(ZPBASE+0FH),A	; PORT B
-
-				; INIT Z80-DART/SIO
-	LD	A,02		; POINT TO REGISTER 2
-	OUT	(ZPBASE+7),A	; CHANNEL B COMMAND
-	LD	A,10H		; VECTOR AT FF10H
-	OUT	(ZPBASE+7),A	; ONE VECTOR FOR WHOLE CHIP
-#ENDIF
-#IF ((PLATFORM = PLT_N8VEM) & (PIO4BASE !=0))
-				; INIT VECTORS ON A 4PIO BOARD
-	XOR	A		; VECTOR AT FF00H
-	OUT	(PIO4BASE+1)	; PIO0 PORT A
-	LD	A,02		; VECTOR AT FF02H
-	OUT	(PIO4BASE+3)	; PIO0 PORT B
-	LD	A,04		; VECTOR AT FF04H
-	OUT	(PIO4BASE+5)	; PIO1 PORT A
-	LD	A,06		; VECTOR AT FF02H
-	OUT	(PIO4BASE+7)	; PIO1 PORT B
-	LD	A,08		; VECTOR AT FF02H
-	OUT	(PIO4BASE+9)	; PIO2 PORT A
-	LD	A,0AH		; VECTOR AT FF02H
-	OUT	(PIO4BASE+B)	; PIO2 PORT B
-	LD	A,0CH		; VECTOR AT FF02H
-	OUT	(PIO4BASE+D)	; PIO3 PORT A
-	LD	A,0EH		; VECTOR AT FF02H
-	OUT	(PIO4BASE+F)	; PIO3 PORT B
-#ENDIF
-#ENDIF
+	CALL	NEWLINE
+	CALL	NEWLINE
+	PRTX(STR_BANNER)
+	CALL	NEWLINE
 ;
-; PERFORM DEVICE INITIALIZATION
+	RET
+;
+;==================================================================================================
+;   TABLE OF INITIALIZATION ENTRY POINTS
+;==================================================================================================
 ;
+HB_INITTBL:
 #IF (UARTENABLE)
-	CALL	UART_INIT
+	.DW	UART_INIT
 #ENDIF
 #IF (VDUENABLE)
-	CALL	VDU_INIT
+	.DW	VDU_INIT
 #ENDIF
 #IF (CVDUENABLE)
-	CALL	CVDU_INIT
+	.DW	CVDU_INIT
 #ENDIF
 #IF (UPD7220ENABLE)
-	CALL	UPD7220_INIT
+	.DW	UPD7220_INIT
 #ENDIF
 #IF (N8VENABLE)
-	LD		HL,CHARSET		; tell init to use built-in bitmaps
-	CALL	N8V_VDAINI
+	.DW	N8V_INIT
 #ENDIF
 #IF (PRPENABLE)
-	CALL	PRP_INIT
+	.DW	PRP_INIT
 #ENDIF
 #IF (PPPENABLE)
-	CALL	PPP_INIT
+	.DW	PPP_INIT
 #ENDIF
 #IF (DSKYENABLE)
-	CALL	DSKY_INIT
+	.DW	DSKY_INIT
 #ENDIF
 #IF (FDENABLE)
-	CALL	FD_INIT
+	.DW	FD_INIT
 #ENDIF
 #IF (IDEENABLE)
-	CALL	IDE_INIT
+	.DW	IDE_INIT
 #ENDIF
 #IF (PPIDEENABLE)
-	CALL	PPIDE_INIT
+	.DW	PPIDE_INIT
 #ENDIF
 #IF (SDENABLE)
-	CALL	SD_INIT
+	.DW	SD_INIT
 #ENDIF
 #IF (HDSKENABLE)
-	CALL	HDSK_INIT
+	.DW	HDSK_INIT
 #ENDIF
 #IF (PPKENABLE)
-	CALL	PPK_INIT
+	.DW	PPK_INIT
 #ENDIF
 #IF (KBDENABLE)
-	CALL	KBD_INIT
+	.DW	KBD_INIT
 #ENDIF
 #IF (TTYENABLE)
-	CALL	TTY_INIT
+	.DW	TTY_INIT
 #ENDIF
 #IF (ANSIENABLE)
-	CALL	ANSI_INIT
+	.DW	ANSI_INIT
 #ENDIF
 ;
-	LD	DE,STR_BANNER
-	CALL	WRITESTR
-;
-	RET
+HB_INITTBLLEN	.EQU	(($ - HB_INITTBL) / 2)
 ;
 ;==================================================================================================
 ;   IDLE
@@ -727,10 +738,10 @@ SIZ_ANSI	.EQU	$ - ORG_ANSI
 #INCLUDE "util.asm"
 ;
 ;==================================================================================================
-;   BANK ONE GLOBAL DATA
+;   HBIOS GLOBAL DATA
 ;==================================================================================================
 ;
-CONDEV		.DB	DEFCON
+CONDEV		.DB	CIODEV_UART
 ;
 IDLECOUNT	.DB	0
 ;
@@ -745,18 +756,20 @@ DIOBUF		.DW	$FD00		; PTR TO 512 BYTE DISK XFR BUFFER
 ;
 STR_BANNER	.DB	"N8VEM HBIOS v", BIOSVER, " ("
 VAR_LOC		.DB	VARIANT, "-"
-TST_LOC		.DB	TIMESTAMP, ")\r\n"
-		.DB	PLATFORM_NAME, DSKYLBL, VDULBL, CVDULBL, UPD7220LBL, N8VLBL,
-		.DB	FDLBL, IDELBL, PPIDELBL, SDLBL, PRPLBL, PPPLBL, HDSKLBL, "\r\n$"
+TST_LOC		.DB	TIMESTAMP, ")"
+;		.DB	"\r\n", PLATFORM_NAME, DSKYLBL, VDULBL, CVDULBL, UPD7220LBL, N8VLBL
+;		.DB	FDLBL, IDELBL, PPIDELBL, SDLBL, PRPLBL, PPPLBL, HDSKLBL
+		.DB	"$"
+STR_PLATFORM	.DB	PLATFORM_NAME, "$"
 ;
 ;==================================================================================================
-;   FILL REMAINDER OF BANK
+;   FILL REMAINDER OF HBIOS
 ;==================================================================================================
 ;
 SLACK:		.EQU	(7F00H - $)
 		.FILL	SLACK,0FFH
 ;
-		.ECHO	"BNK1 space remaining: "
+		.ECHO	"HBIOS space remaining: "
 		.ECHO	SLACK
 		.ECHO	" bytes.\n"
 ;
@@ -775,26 +788,8 @@ HB_IMG	.EQU	$
 ;
 ; AREA RESERVED FOR UP TO 16 INTERRUPT VECTOR ENTRIES (MODE 2)
 ;
-; DEFAULT VECTORS ALL POINT TO DUMMY INTERRUPT SERVICE ROUTINE
-HB_IVT:				; *** = NOT USED
-				; VECTOR ADDR	N8	4PIO	ZILOG PERIPHERAL
-	.DW	DUMISR		; FF00		/INT1	PIO0 A	CTC CHANNEL 0
-	.DW	DUMISR		; FF02		/INT2	PIO0 B	CTC CHANNEL 1
-	.DW	DUMISR		; FF04		PRT0	PIO1 A	CTC CHANNEL 2
-	.DW	DUMISR		; FF06		PRT1	PIO1 B	CTC CHANNEL 3
-	.DW	DUMISR		; FF08		DMA0	PIO2 A	PIO1 A
-	.DW	DUMISR		; FF0A		DMA1	PIO2 B	PIO1 B
-	.DW	DUMISR		; FF0C		CSI/O	PIO3 A	PIO2 A
-	.DW	DUMISR		; FF0E		ASCI0	PIO3 B	PIO2 B
-	.DW	DUMISR		; FF10		ASCI1	***	DART - ANY OR CH.B TX EMPTY
-	.DW	DUMISR		; FF12		***	***	DART CH.B EXTERNAL STATUS CHANGE
-	.DW	DUMISR		; FF14		***	***	DART CH.B RX CHAR AVAILABLE
-	.DW	DUMISR		; FF16		***	***	DART CH.B SPECIAL RECEIVE CONDITION
-	.DW	DUMISR		; FF18		***	***	DART CH.A TX EMPTY
-	.DW	DUMISR		; FF1A		***	***	DART CH.A EXTERNAL STATUS CHANGE
-	.DW	DUMISR		; FF1C		***	***	DART CH.A RX CHAR AVAILABLE
-	.DW	DUMISR		; FF1E		***	***	DART CH.A SPECIAL RECEIVE CONDITION
-;	.FILL	20H,0FFH
+HB_IVT:
+	.FILL	20H,0FFH
 ;
 ;==================================================================================================
 ;   HBIOS INITIALIZATION
@@ -853,7 +848,7 @@ HB_ENTRY:
 	PGRAMF(1)		; MAP RAM PAGE 1 INTO LOWER 32K
 	
 	LD	(HB_STKSAV),SP	; SAVE ORIGINAL STACK FRAME
-	LD	SP,8000H	; SETUP NEW STACK FRAME AT END OF BANK 1
+	LD	SP,8000H	; SETUP NEW STACK FRAME AT END OF HBIOS
 
 	CALL	BIOS_DISPATCH	; CALL HBIOS FUNCTION DISPATCHER
 
@@ -869,17 +864,8 @@ HB_ENTRY:
 ;
 HB_STKSAV	.DW	0	; PREVIOUS STACK POINTER
 ;
-;==================================================================================================
-;   DUMMY INTERRUPT SERVICE ROUTINE
-;==================================================================================================
-;
-HB_DUMISR:
-DUMISR	.EQU	$
-	EI			; RE-ENABLE INTERRUPTS
-	RETI			; RETURN FROM INTERRUPT
-;
 HB_SLACK	.EQU	(HB_END - $)
-		.ECHO	"HBIOS space remaining: "
+		.ECHO	"STACK space remaining: "
 		.ECHO	HB_SLACK
 		.ECHO	" bytes.\n"
 ;

branches/dgg/Source/hdsk.asm

@@ -54,6 +54,7 @@ HDSK_MEDIA:
 ;
 ;
 HDSK_INIT:
+	PRTS("HDSK: UNITS=4$")
 	XOR	A
 	DEC	A		; INITIAL STATUS IS NOT READY $FF
 	LD	(HDSK_STAT),A	; SAVE IT

branches/dgg/Source/ide.asm

@@ -81,6 +81,7 @@ IDE_MEDIA:
 ;
 ;
 IDE_INIT:
+	PRTS("IDE:$")
 	CALL	IDE_RESET
 	XOR	A
 	DEC	A		; INITIAL STATUS IS NOT READY $FF

branches/dgg/Source/kbd.asm

@@ -62,6 +62,7 @@ KBD_IDLE	.DB	0	; IDLE COUNT
 ;__________________________________________________________________________________________________
 ;
 KBD_INIT:
+	PRTS("KBD:$")
 	LD	A,KBD_DEFRPT		; GET DEFAULT REPEAT RATE
 	LD	(KBD_REPEAT),A		; SAVE IT
 	LD	A,KBD_DEFSTATE		; GET DEFAULT STATE

branches/dgg/Source/makefile

@@ -182,7 +182,7 @@ os.bin: $(CPBIN) $(DOSBIN) cbios.bin
 rom0.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin romfill.bin dbgmon.bin os.bin hbfill.bin
 	copy /B $(subst $(SPACE),+,$(^)) $@
 	
-rom1.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin bnk1.bin
+rom1.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin hbios.bin
 	copy /B $(subst $(SPACE),+,$(^)) $@
 
 $(OUTDIR)\$(ROMNAME).rom: rom0.bin rom1.bin $(ROMDISKFILES) $(OUTDIR)\$(ROMNAME).sys
@@ -191,7 +191,7 @@ $(OUTDIR)\$(ROMNAME).rom: rom0.bin rom1.bin $(ROMDISKFILES) $(OUTDIR)\$(ROMNAME)
 	$(CPMCP) -f rom$(ROMSIZE)KB RomDisk.tmp ../Output/$(ROMNAME).sys 0:$(SYS).sys
 	copy /B rom0.bin+rom1.bin+RomDisk.tmp $@
 
-$(OUTDIR)\$(ROMNAME).com: bootapp.bin syscfg.bin loader.bin bnk1.bin dbgmon.bin os.bin
+$(OUTDIR)\$(ROMNAME).com: bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin os.bin
 	copy /B $(subst $(SPACE),+,$(^)) $@
 
 $(OUTDIR)\$(ROMNAME).sys: prefix.bin os.bin

branches/dgg/Source/n8v.asm

@@ -23,7 +23,14 @@ DATAP:  .EQU    BASE+24
 ;_________________________________________________________________________
 ; BOARD INITIALIZATION
 ;_________________________________________________________________________
-
+;
+N8V_INIT:
+	PRTS("N8V:$")
+	LD	HL,CHARSET
+	CALL	N8V_VDAINI
+	XOR	A
+	RET
+;
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; This routine is called from bnk1.asm to init the TMS9918		;
 ; If HL is non-zero, it specifies the character bitmaps to load ;
@@ -269,7 +276,8 @@ BAN_LOOP3:
 BAN_DONE3:
 ; fall through...
 
-	CALL	PPK_INIT
+;	WBW: PPK_INIT SHOULD ONLY BE CALLED FROM HBIOS INIT
+;	CALL	PPK_INIT
 	; fall through...
 
 	XOR	A

branches/dgg/Source/ppide.asm

@@ -123,6 +123,13 @@ PPIDE_MEDIA:
 ;
 ;
 PPIDE_INIT:
+	PRTS("PPIDE: IO=0x$")
+	LD	A,IDELSB
+	CALL	PRTHEXBYTE
+	PRTS(" UNITS=2$")
+#IF (PPIDESLOW)
+	PRTS(" SLOW$")
+#ENDIF
 	CALL	PPIDE_RESET
 	XOR	A
 	DEC	A		; INITIAL STATUS IS NOT READY $FF

branches/dgg/Source/ppk.asm

@@ -69,6 +69,7 @@ PPK_IDLE	.DB	0	; IDLE COUNT
 ;__________________________________________________________________________________________________
 ;
 PPK_INIT:
+	PRTS("PPK:$")
 	CALL 	PPK_INITPORT		; SETS PORT C SO CAN INPUT AND OUTPUT
 
 	LD	A,PPK_DEFRPT		; GET DEFAULT REPEAT RATE

branches/dgg/Source/ppp.asm

@@ -36,6 +36,7 @@ PPP_CMDRESET	.EQU	$F0           ; SOFT RESET PROPELLER
 ; GLOBAL PARPORTPROP INITIALIZATION
 ;
 PPP_INIT:
+	PRTS("PPP:$")
 	LD	A,$9B			; PPI MODE 0, ALL PINS INPUT
 	OUT	(PPIX),A		; SEND IT
 

branches/dgg/Source/prp.asm

@@ -7,6 +7,7 @@
 ; GLOBAL PARPORTPROP INITIALIZATION
 ;
 PRP_INIT:
+	PRTS("PRPSD:$")
 	CALL	PRPSD_INIT		; SD CARD INITIALIZATION
 	
 	RET

branches/dgg/Source/sd.asm

@@ -107,6 +107,7 @@ SD_MEDIAEND:
 	RET
 ;
 SD_INIT:
+	PRTS("SD:$")
 	LD	A,20H		; PUT RTC LATCH TO IDLE
 	OUT	(RTC),A
 #IF (PPISD)

branches/dgg/Source/std.asm

@@ -129,13 +129,6 @@ IDEMODE_DIDE	.EQU	2		; DUAL IDE
 ;
 PPIDEMODE_STD	.EQU	1		; STANDARD N8VEM PARALLEL PORT
 PPIDEMODE_DIO3	.EQU	2		; DISKIO V3 PARALLEL PORT
-;;
-;; CONSOLE DEVICE CHOICES FOR LDRCON AND DBGCON IN CONFIG SETTINGS
-;;
-;CON_UART	.EQU	1
-;CON_VDU		.EQU	2
-;CON_PRP		.EQU	3
-;CON_PPP		.EQU	4
 ;
 ; CONSOLE TERMINAL TYPE CHOICES
 ;
@@ -173,7 +166,7 @@ SYS		.EQU	BLD_SYS
 #IF (SYS == SYS_CPM)
 DOS		.EQU	DOS_BDOS
 CP		.EQU	CP_CCP
-#DEFINE		OSLBL	"CP/M-80 2.2C"
+#DEFINE		OSLBL	"CP/M-80 2.2"
 #ENDIF
 ;
 #IF (SYS == SYS_ZSYS)
@@ -674,3 +667,13 @@ INTMODE		.EQU	1	; N8VEM BY ITSELF CAN ONLY USE MODE 1
 	.ECHO	PPPLBL
 	.ECHO	HISTLBL
 	.ECHO	"\n"
+;
+; HELPER MACROS
+;
+#DEFINE	PRTC(C)	CALL PRTCH \ .DB C	; PRINT CHARACTER C TO CONSOLE - PRTC('X')
+#DEFINE	PRTS(S)	CALL PRTSTRD \ .DB S	; PRINT STRING S TO CONSOLE - PRTD("HELLO")
+#DEFINE	PRTX(X) CALL PRTSTRI \ .DW X	; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)
+;
+#DEFINE	XIO_PRTC(C)	CALL XIO_PRTCH \ .DB C		; PRINT CHARACTER C TO CONSOLE - PRTC('X')
+#DEFINE	XIO_PRTS(S)	CALL XIO_PRTSTRD \ .DB S	; PRINT STRING S TO CONSOLE - PRTD("HELLO")
+#DEFINE	XIO_PRTX(X)	CALL XIO_PRTSTRI \ .DW X	; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)

branches/dgg/Source/tty.asm

@@ -8,6 +8,7 @@
 ;   - SOME FUNCTIONS ARE NOT IMPLEMENTED!!!
 ;
 TTY_INIT:
+	PRTS("TTY:$")
 	JR	TTY_INI		; REUSE THE INI FUNCTION BELOW
 ;
 ;

branches/dgg/Source/uart.asm

@@ -12,29 +12,28 @@ UART0_DIV	.EQU	(1843200 / (16 * BAUDRATE))
 ;   B: FUNCTION (IN)
 ;   C: CHARACTER (IN/OUT)
 ;   E: DEVICE/UNIT (IN)
-;   
+;
 ;
 UART_DISPATCH:
 #IF (PLATFORM == PLT_N8)
 	LD	A,C	; GET DEVICE/UNIT
 	AND	$0F	; ISOLATE UNIT
-	JR	Z,UART0
+	JP	Z,UART0
 	DEC	A
-	JR	Z,UART1
+	JP	Z,UART1
 	CALL	PANIC
 #ENDIF
 ;
 UART0:
-;	LD	C,E	; FIX: COMPAT W/OLD DRIVERS, GET CHAR INTO C
 	LD	A,B	; GET REQUESTED FUNCTION
 	AND	$0F	; ISOLATE SUB-FUNCTION
-	JR	Z,UART0_IN
+	JP	Z,UART0_IN
 	DEC	A
-	JR	Z,UART0_OUT
+	JP	Z,UART0_OUT
 	DEC	A
-	JR	Z,UART0_IST
+	JP	Z,UART0_IST
 	DEC	A
-	JR	Z,UART0_OST
+	JP	Z,UART0_OST
 	CALL	PANIC
 ;
 ;
@@ -42,14 +41,49 @@ UART0:
 UART_INIT:
 #IF (PLATFORM == PLT_N8)
 	; ASCI0
+	PRTS("ASCI0: IO=0x$")
+	LD	A,CPU_TDR0
+	CALL	PRTHEXBYTE
+	CALL	PC_COMMA
+	LD	A,CPU_RDR0
+	CALL	PRTHEXBYTE
+	PRTS(" BAUD=$")
+#IF ((BAUDRATE / 100) > 0)
+	LD	HL,BAUDRATE / 100
+	CALL	PRTDEC
+#ENDIF
+#IF ((BAUDRATE % 100) < 10)
+	PRTC("0")
+#ENDIF
+	LD	HL,BAUDRATE % 100
+	CALL	PRTDEC
+
 	LD	A,66H
 	OUT0	(CPU_ASEXT0),A
 	LD	A,64H
 	OUT0	(CPU_CNTLA0),A
 	LD	A,Z180_CNTLB0
 	OUT0	(CPU_CNTLB0),A
-	
+
 	; ASCI1
+	CALL	NEWLINE
+	PRTS("ASCI1: IO=0x$")
+	LD	A,CPU_TDR1
+	CALL	PRTHEXBYTE
+	CALL	PC_COMMA
+	LD	A,CPU_RDR1
+	CALL	PRTHEXBYTE
+	PRTS(" BAUD=$")
+#IF ((BAUDRATE / 100) > 0)
+	LD	HL,BAUDRATE / 100
+	CALL	PRTDEC
+#ENDIF
+#IF ((BAUDRATE % 100) < 10)
+	PRTC("0")
+#ENDIF
+	LD	HL,BAUDRATE % 100
+	CALL	PRTDEC
+
 	LD	A,66H
 	OUT0	(CPU_ASEXT1),A
 	LD	A,64H
@@ -57,6 +91,22 @@ UART_INIT:
 	LD	A,Z180_CNTLB1
 	OUT0	(CPU_CNTLB1),A
 #ELSE
+	PRTS("UART0: IO=0x$")
+	LD	A,SIO_BASE
+	CALL	PRTHEXBYTE
+	PRTS(" BAUD=$")
+#IF ((BAUDRATE / 100) > 0)
+	LD	HL,BAUDRATE / 100
+	CALL	PRTDEC
+#ENDIF
+#IF ((BAUDRATE % 100) < 10)
+	PRTC("0")
+#ENDIF
+	LD	HL,BAUDRATE % 100
+	CALL	PRTDEC
+	
+	CALL	PC_SPACE
+
 	LD	A,80H
 	OUT	(SIO_LCR),A		; DLAB ON
 	LD	A,UART0_DIV
@@ -65,8 +115,9 @@ UART_INIT:
 	OUT	(SIO_DLM),A		; SET DIVISOR (MS)
 
 	LD    	B,03H			; B = DEFAULT SETTING FOR MCR (DTR + RTS)
-	
+
 #IF (UARTAFC)
+	PRTS(" AFC$")
 	LD	A,$55			; TEST VALUE
 	OUT	(SIO_SCR),A		; SET SCRATCH REG TO TEST VALUE
 	LD	A,0BFH
@@ -76,12 +127,12 @@ UART_INIT:
 	JR	NZ,UART_AFC1		; NZ, HAVE EFR, DO IT
 	SET	5,B			; ENABLE AUTO FLOW CONTROL
 	JR	UART_AFC2
-UART_AFC1:	
+UART_AFC1:
 	LD	A,0C0H			; ENABLE CTS/RTS FLOW CONTROL
 	OUT	(SIO_EFR),A		; SAVE IT
 UART_AFC2:
 #ENDIF
-	
+
 	LD	A,03H
 	OUT	(SIO_LCR),A		; DLAB OFF, 8 DATA, 1 STOP, NO PARITY
 
@@ -89,8 +140,10 @@ UART_AFC2:
 	OUT  	(SIO_MCR),A		; SAVE IT
 
 #IF (UARTFIFO)
-	LD	A,07H			; ENABLE AND RESET FIFOS
-	OUT	(SIO_FCR),A
+;	LD	A,07H			; ENABLE AND RESET FIFOS
+	LD	A,01H			; ENABLE AND RESET FIFOS
+	OUT	(SIO_FCR),A		; ENABLE FIFOS
+	PRTS(" FIFO$")
 #ENDIF
 
 #ENDIF
@@ -103,7 +156,7 @@ UART0_IN:
 	OR	A
 	JR	Z,UART0_IN
 #IF (PLATFORM == PLT_N8)
-	IN0	A,(CPU_RDR0)	; READ THE CHAR FROM THE UART 	
+	IN0	A,(CPU_RDR0)	; READ THE CHAR FROM THE UART
 #ELSE
 	IN	A,(SIO_RBR)	; READ THE CHAR FROM THE UART
 #ENDIF
@@ -118,7 +171,7 @@ UART0_IST:
 	IN0	A,(CPU_STAT0)
 	AND	70H			; PARITY, FRAMING, OR OVERRUN ERROR
 	JR	Z,UART0_IST1		; ALL IS WELL, CHECK FOR DATA
-	
+
 	; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
 	IN0	A,(CPU_CNTLA0)
 	RES	3,A			; CLEAR EFR (ERROR FLAG RESET)
@@ -126,7 +179,7 @@ UART0_IST:
 
 UART0_IST1:	; CHECK FOR STAT0.RDRF (DATA READY)
 	IN0	A,(CPU_STAT0)		; READ LINE STATUS REGISTER
-	AND	$80			; TEST IF DATA IN RECEIVE BUFFER	
+	AND	$80			; TEST IF DATA IN RECEIVE BUFFER
 #ELSE
 	IN	A,(SIO_LSR)		; READ LINE STATUS REGISTER
 	AND	$01			; TEST IF DATA IN RECEIVE BUFFER
@@ -196,7 +249,7 @@ UART1_IST:
 	IN0	A,(CPU_STAT1)
 	AND	70H			; PARITY, FRAMING, OR OVERRUN ERROR
 	JR	Z,UART1_IST1		; ALL IS WELL, CHECK FOR DATA
-	
+
 	; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
 	IN0	A,(CPU_CNTLA1)
 	RES	3,A			; CLEAR EFR (ERROR FLAG RESET)
@@ -204,7 +257,7 @@ UART1_IST:
 
 UART1_IST1:	; CHECK FOR STAT0.RDRF (DATA READY)
 	IN0	A,(CPU_STAT1)		; READ LINE STATUS REGISTER
-	AND	$80			; TEST IF DATA IN RECEIVE BUFFER	
+	AND	$80			; TEST IF DATA IN RECEIVE BUFFER
 	JP	Z,CIO_IDLE		; DO IDLE PROCESSING AND RETURN
 	XOR	A
 	INC	A			; SIGNAL CHAR READY, A = 1

branches/dgg/Source/util.asm

@@ -88,6 +88,73 @@ NEWLINE:
 	CALL	PC_LF
 	RET
 ;
+; PRINT A CHARACTER REFERENCED BY POINTER AT TOP OF STACK
+; USAGE:
+;   CALL PRTCH
+;   .DB  'X'
+;
+PRTCH:
+	EX	(SP),HL
+	PUSH	AF
+	LD	A,(HL)
+	CALL	COUT
+	POP	AF
+	INC	HL
+	EX	(SP),HL
+	RET
+;
+; PRINT A STRING AT ADDRESS SPECIFIED IN HL
+; STRING MUST BE TERMINATED BY '$'
+; USAGE:
+;   LD	HL,MYSTR
+;   CALL PRTSTR
+;   ...
+;   MYSTR: .DB  "HELLO$"
+;
+PRTSTR:
+	LD	A,(HL)
+	INC	HL
+	CP	'$'
+	RET	Z
+	CALL	COUT
+	JR	PRTSTR
+;
+; PRINT A STRING DIRECT: REFERENCED BY POINTER AT TOP OF STACK
+; STRING MUST BE TERMINATED BY '$'
+; USAGE:
+;   CALL PRTSTR
+;   .DB  "HELLO$"
+;   ...
+;
+PRTSTRD:
+	EX	(SP),HL
+	PUSH	AF
+	CALL	PRTSTR
+	POP	AF
+	EX	(SP),HL
+	RET
+;
+; PRINT A STRING INDIRECT: REFERENCED BY INDIRECT POINTER AT TOP OF STACK
+; STRING MUST BE TERMINATED BY '$'
+; USAGE:
+;   CALL PRTSTRI(MYSTRING)
+;   MYSTRING	.DB	"HELLO$"
+;
+PRTSTRI:
+	EX	(SP),HL
+	PUSH	AF
+	LD	A,(HL)
+	INC	HL
+	PUSH	HL
+	LD	H,(HL)
+	LD	L,A
+	CALL	PRTSTR
+	POP	HL
+	INC	HL
+	POP	AF
+	EX	(SP),HL
+	RET
+;
 ; PRINT THE HEX BYTE VALUE IN A
 ;
 PRTHEXBYTE:
@@ -379,8 +446,8 @@ LDELAY:
 	RET
 ;
 ; MULTIPLY 8-BIT VALUES
-; IN:  MULTIPLY H WITH E
-; OUT: HL = RESULT
+; IN:  MULTIPLY H BY E
+; OUT: HL = RESULT, E = 0, B = 0
 ;
 MULT8:
 	LD D,0
@@ -394,6 +461,33 @@ MULT8_NOADD:
 	DJNZ MULT8_LOOP
 	RET
 ;
+; PRINT VALUE OF HL IN DECIMAL WITH LEADING ZERO SUPPRESSION
+;
+PRTDEC:
+	LD	E,'0'
+	LD	BC,-10000
+	CALL	PRTDEC1
+	LD	BC,-1000
+	CALL	PRTDEC1
+	LD	BC,-100
+	CALL	PRTDEC1
+	LD	C,-10
+	CALL	PRTDEC1
+	LD	E,0
+	LD	C,-1
+PRTDEC1:
+	LD	A,'0' - 1
+PRTDEC2:
+	INC	A
+	ADD	HL,BC
+	JR	C,PRTDEC2
+	SBC	HL,BC
+	CP	E
+	RET	Z
+	LD	E,0
+	CALL	COUT
+	RET
+;
 ;==================================================================================================
 ; DSKY KEYBOARD ROUTINES
 ;==================================================================================================

branches/dgg/Source/vdu.asm

@@ -28,6 +28,7 @@ VDU_DATA	 .EQU	0F3h		; VDU DATA REGISTER
 ;======================================================================
 ;
 VDU_INIT:
+	PRTS("VDU:$")
 	CALL 	VDU_CRTINIT		; INIT SY6845 VDU CHIP
 	
 VDU_RESET:

branches/dgg/Source/xio.asm

@@ -0,0 +1,76 @@
+;___XIO________________________________________________________________________________________________________________
+;
+; DIRECT SERIAL I/O
+;
+;   PROVIDES INTERFACE TO PLATFORM BASE SERIAL I/O DEVICE
+;   ALLOWS USER MESSAGING/INTERACTION PRIOR TO AND DURING HBIOS INIT
+;______________________________________________________________________________________________________________________
+;
+XIO_INIT:	; MINIMAL UART INIT
+#IF (PLATFORM == PLT_N8)
+	; ASCI0
+	LD	A,66H
+	OUT0	(CPU_ASEXT0),A
+	LD	A,64H
+	OUT0	(CPU_CNTLA0),A
+	LD	A,Z180_CNTLB0
+	OUT0	(CPU_CNTLB0),A
+	RET
+#ELSE
+XIO_DIV		.EQU	(1843200 / (16 * BAUDRATE))
+
+	LD	A,$80			; LCR := DLAB ON
+	OUT	(SIO_LCR),A		; SET LCR
+	LD	A,XIO_DIV		; BAUD RATE DIVISOR (LSB)
+	OUT	(SIO_DLL),A		; SET DIVISOR (LSB)
+	XOR	A			; BAUD RATE DIVISOR (MSB), ALWAYS 0
+	OUT	(SIO_DLM),A		; SET DIVISOR (MSB)
+	LD	A,03H			; VALUE FOR LCR AND MCR
+	OUT	(SIO_LCR),A		; LCR := 3, DLAB OFF, 8 DATA, 1 STOP, NO PARITY
+	OUT  	(SIO_MCR),A		; MCR := 3, DTR ON, RTS ON
+	LD	A,6			; DISABLE & RESET FIFO'S
+	OUT	(SIO_FCR),A		; DO IT
+	RET
+#ENDIF
+;
+XIO_CRLF:	; OUTPUT A NEWLINE
+	LD	A,13			; A = CR
+	CALL	XIO_OUTC		; WRITE IT
+	LD	A,10			; A = LF
+	JR	XIO_OUTC		; WRITE IT
+;
+XIO_SPACE:	; OUTPUT A SPACE CHARACTER
+	LD	A,' '
+	JR	XIO_OUTC
+;
+XIO_DOT:	; OUTPUT A DOT (MARK PROGRESS)
+	LD	A,'.'
+;	
+XIO_OUTC:	; OUTPUT BYTE IN A
+#IF (PLATFORM == PLT_N8)
+	PUSH	AF			; SAVE INCOMING BYTE
+XIO_OUTC1:
+	IN0	A,(CPU_STAT0)
+	AND	$02
+	JR	Z,XIO_OUTC1
+	POP	AF
+	OUT0	(CPU_TDR0),A
+	RET
+#ELSE
+	PUSH	AF			; SAVE INCOMING BYTE
+XIO_OUTC1:
+	IN	A,(SIO_LSR)		; READ LINE STATUS REGISTER
+	AND	$20			; ISOLATE THRE
+	JR	Z,XIO_OUTC1		; LOOP TILL READY (EMPTY)
+	POP	AF			; RECOVER BYTE TO WRITE
+	OUT	(SIO_THR),A		; WRITE THE CHAR TO UART
+	RET
+#ENDIF
+;
+XIO_OUTS:	; OUTPUT '$' TERMINATED STRING AT ADDRESS IN HL
+	LD	A,(HL)			; GET NEXT BYTE
+	CP	'$'			; END OF STRING?
+	RET	Z			; YES, GET OUT
+	CALL	XIO_OUTC		; OTHERWISE, WRITE IT
+	INC	HL			; POINT TO NEXT BYTE
+	JR	XIO_OUTS		; AND LOOP