From a2c2ed0aefa8928304fd1e7f56e9762502284159 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Sat, 26 Dec 2020 11:58:31 -0800
Subject: [PATCH] Global Initialization of Z180 CSIO

Initialize CSIO speed at system startup.  A constant called Z180_CNTR_DEF has been created to hold the default value.  This value can be used by drivers to restore the default value after modification.
---
 Source/HBIOS/hbios.asm | 4 ++++
 Source/HBIOS/sd.asm    | 8 ++++----
 Source/HBIOS/std.asm   | 8 ++++++++
 3 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 2d53fc12..f7005d7c 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -916,6 +916,10 @@ HB_START:
 ;#ENDIF
 	LD	A,(RAMSIZE + RAMBIAS - 64) >> 2
 	OUT0	(Z180_CBR),A		; COMMON BASE = LAST (TOP) BANK
+
+	; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE)
+	LD	A,Z180_CNTR_DEF		; DIV 1280, 14KHZ @ 18MHZ CLK
+	OUT0	(SD_CNTR),A	
 #ENDIF
 ;
 #ENDIF
diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm
index 16c589d9..4cfd5e27 100644
--- a/Source/HBIOS/sd.asm
+++ b/Source/HBIOS/sd.asm
@@ -1045,7 +1045,7 @@ SD_INITCARD5:
 	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
 	CALL	DLY32			; WAIT A BIT MORE FOR FINAL BIT
 	XOR	A			; ZERO MEANS MAX SPEED
-	OUT0	(Z180_CNTR),A		; NOW SET CSIO PORT
+	OUT0	(SD_CNTR),A		; NOW SET CSIO PORT
 #ENDIF
 ;
 	; ISSUE SEND_CSD (TO DERIVE CARD CAPACITY)
@@ -1808,11 +1808,11 @@ SD_GET:
 #ELSE
   #IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
 	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
-	IN0	A,(Z180_CNTR)		; GET CSIO STATUS
+	IN0	A,(SD_CNTR)		; GET CSIO STATUS
 	SET	5,A			; START RECEIVER
-	OUT0	(Z180_CNTR),A
+	OUT0	(SD_CNTR),A
 	CALL	SD_WAITRX
-	IN0	A,(Z180_TRDR)		; GET RECEIVED BYTE
+	IN0	A,(SD_TRDR)		; GET RECEIVED BYTE
 	CALL	MIRROR			; MSB<-->LSB MIRROR BITS
 	LD	A,C			; KEEP RESULT
   #ELSE
diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm
index 90478171..cc58bcf6 100644
--- a/Source/HBIOS/std.asm
+++ b/Source/HBIOS/std.asm
@@ -543,6 +543,14 @@ INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B
 #DEFINE VEC(INTX) INTX*2
 
 #ENDIF
+
+; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE)
+; DIV 1280, 14KHZ @ 18MHZ CLK
+
+#IF (CPUFAM == CPU_Z180)
+Z180_CNTR_DEF	.EQU	$06	; DEFAULT VALUE FOR Z180 CSIO CONFIG
+#ENDIF
+
 ;
 ; HELPER MACROS
 ;