mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
Initial Support for Duodyne
This commit is contained in:
@@ -33,26 +33,12 @@ INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
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;
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DMAENABLE .SET FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
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;
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BATCOND .SET FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
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;
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CPUSPDDEF .SET SPD_LOW ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
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BATCOND .SET TRUE ; ENABLE LOW BATTERY WARNING MESSAGE
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;
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ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
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RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
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;
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MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
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;
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DSKYENABLE .SET TRUE ; ENABLES DSKY FUNCTIONALITY
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ICMENABLE .SET FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
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PKDENABLE .SET TRUE ; ENABLES DSKY NG PKD DRIVER (8259)
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;
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UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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;UARTCFG .SET UARTCFG | SER_RTS
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;
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LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
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;
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CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
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;
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FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
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;
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PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
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@@ -26,8 +26,8 @@ TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
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BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
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BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
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;
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CPUSPDCAP .EQU SPD_HILO ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
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CPUSPDDEF .EQU SPD_LOW ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
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CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
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CPUSPDDEF .EQU SPD_UNSUP ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
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CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ
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INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
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DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
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@@ -36,18 +36,18 @@ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
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ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
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ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
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MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
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MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
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MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
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MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
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MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
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MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
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MPGSEL_0 .EQU $50 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
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MPGSEL_1 .EQU $51 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
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MPGSEL_2 .EQU $52 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
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MPGSEL_3 .EQU $53 ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
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MPGENA .EQU $54 ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
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;
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RTCIO .EQU $70 ; RTC LATCH REGISTER ADR
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RTCIO .EQU $94 ; RTC LATCH REGISTER ADR
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;
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KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
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KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
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;
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CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT
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CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
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CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
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CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
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CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER
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@@ -65,7 +65,7 @@ WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
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;
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FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
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FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
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FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
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FPLED_DSKACT .EQU FALSE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
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FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
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FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
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;
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@@ -123,13 +123,14 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
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UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
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UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
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UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
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UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
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UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
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UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU TRUE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -137,7 +138,7 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
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;
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ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
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;
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SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
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SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
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SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
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SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
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SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
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@@ -154,11 +155,11 @@ XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
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;
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VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
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VDUSIZ .EQU V80X25 ; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
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CVDUENABLE .EQU TRUE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
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CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
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CVDUMODE .EQU CVDUMODE_MBC ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
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CVDUMON .EQU CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
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GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
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TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
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TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
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TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
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TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
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VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
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@@ -237,7 +238,7 @@ ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
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HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
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HDSKTRACE .EQU 1 ; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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;
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PIOENABLE .EQU TRUE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
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PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
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PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
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PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
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PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
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@@ -133,6 +133,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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@@ -169,6 +169,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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@@ -127,6 +127,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -133,6 +133,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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@@ -135,6 +135,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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@@ -139,6 +139,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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@@ -133,6 +133,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -132,6 +132,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -133,6 +133,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
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@@ -133,6 +133,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
|
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
|
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@@ -127,6 +127,7 @@ UARTMFP .EQU TRUE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
|
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;
|
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -133,6 +133,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
|
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
|
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
|
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
|
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UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
|
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;
|
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
|
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ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
|
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|
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@@ -125,6 +125,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
|
||||
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
|
||||
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
|
||||
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
|
||||
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
|
||||
;
|
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
|
||||
;
|
||||
|
||||
@@ -114,6 +114,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
|
||||
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
|
||||
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
|
||||
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
|
||||
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
|
||||
;
|
||||
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
|
||||
;
|
||||
|
||||
@@ -125,6 +125,7 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
|
||||
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
|
||||
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
|
||||
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
|
||||
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
|
||||
;
|
||||
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
|
||||
;
|
||||
|
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@@ -118,6 +118,7 @@ MODCNT .SET MODCNT + 1
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; TinyZ80: LED Port=0x6E, bit 0, inverted, dedicated port
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; Z80-512K: LED Port=0x6E, bit 0, inverted, dedicated port
|
||||
; MBC: LED Port=0x70, bits 1-0, normal, shared w/ RTC port
|
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; DUO: LED Port=0x94, bits 1-0, normal, shared w/ RTC port
|
||||
;
|
||||
#IF (LEDENABLE)
|
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#IF (LEDMODE == LEDMODE_STD)
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@@ -465,7 +466,11 @@ HBX_ROM:
|
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BIT 7,A ; BIT 7 SET REQUESTS RAM PAGE
|
||||
JR Z,HBX_ROM ; NOT SET, SELECT ROM PAGE
|
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RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT
|
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#IF (PLATFORM == PLT_DUO)
|
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ADD A,64 ; ADD 64 x 32K - RAM STARTS FROM 2048K
|
||||
#ELSE
|
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ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K
|
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#ENDIF
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;
|
||||
HBX_ROM:
|
||||
RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K
|
||||
@@ -1310,7 +1315,13 @@ Z280_INITZ:
|
||||
INC A
|
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OUT (MPGSEL_1),A
|
||||
#ENDIF
|
||||
LD A,62
|
||||
;
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||||
#IF (PLATFORM == PLT_DUO)
|
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LD A,128 + (RAMSIZE / 16) - 2
|
||||
#ELSE
|
||||
LD A,64 - 2
|
||||
#ENDIF
|
||||
;
|
||||
OUT (MPGSEL_2),A
|
||||
INC A
|
||||
OUT (MPGSEL_3),A
|
||||
|
||||
@@ -59,6 +59,7 @@ UARTMBASE .EQU $18
|
||||
UART4BASE .EQU $C0
|
||||
UARTRBASE .EQU $A0
|
||||
UARTDBASE .EQU $80
|
||||
UARTYBASE .EQU $58
|
||||
;
|
||||
#IF (UARTINTS)
|
||||
;
|
||||
@@ -1087,6 +1088,16 @@ UART_CFG_MFP:
|
||||
.DW UARTCFG ; LINE CONFIGURATION
|
||||
.DW 0 ; SHOULD NEVER NEED INT HANDLER
|
||||
#ENDIF
|
||||
#IF (UARTDUO)
|
||||
UART_CFG_DUO:
|
||||
; DUODYNE ONBOARD SERIAL PORT
|
||||
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
|
||||
.DB 0 ; UART TYPE
|
||||
.DB UARTYBASE ; IO PORT BASE (RBR, THR)
|
||||
.DB UARTYBASE + UART_LSR ; LINE STATUS PORT (LSR)
|
||||
.DW UARTCFG ; LINE CONFIGURATION
|
||||
.DW 0 ; POINTER TO RCV BUFFER STRUCT
|
||||
#ENDIF
|
||||
;
|
||||
UART_CNT .EQU ($ - UART_CFG) / 8
|
||||
;
|
||||
|
||||
Reference in New Issue
Block a user