Initial Support for Duodyne

Doc/ChangeLog.txt

@@ -16,6 +16,7 @@ Version 3.3
 - WBW: Support for Z180 running interrupt mode 1
 - WBW: Preliminary support for S100 Computers Z180
 - WBW: Preliminary support for Dan Werner's ESP32 MBC Module
+- WBW: Early support for Duodyne base system (CPU/UART/ROM/RAM/RTC/SPK)
 
 Version 3.2.1
 -------------

Source/Apps/rtc.asm

@@ -51,7 +51,7 @@ PORT_DYNO	.EQU	$0C		; RTC port for DYNO
 PORT_RCZ280	.EQU	$C0		; RTC port for RCZ280
 PORT_MBC	.EQU	$70		; RTC port for MBC
 PORT_RPH	.EQU	$84		; RTC port for RHYOPHYRE
-PORT_DUO	.EQU	$70		; RTC port for DUODYNE
+PORT_DUO	.EQU	$94		; RTC port for DUODYNE
 
 
 BDOS		.EQU	5		; BDOS invocation vector
@@ -1140,7 +1140,7 @@ HINIT:
 ;
 	LD	C,PORT_DUO
 	LD	DE,PLT_DUO
-	CP	13		; DUODYNE
+	CP	17		; DUODYNE
 	JP	Z,RTC_INIT2
 ;
 	; Unknown platform

Source/HBIOS/Config/DUO_std.asm

@@ -33,26 +33,12 @@ INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 ;
-BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
-;
-CPUSPDDEF	.SET	SPD_LOW		; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+BATCOND		.SET	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
 ;
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ;
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-DSKYENABLE	.SET	TRUE		; ENABLES DSKY FUNCTIONALITY
-ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
-PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
-;
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ;UARTCFG	.SET	UARTCFG | SER_RTS
-;
-LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-;
-CVDUMON		.SET	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
-;
-FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/cfg_duo.asm

@@ -26,8 +26,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
-CPUSPDCAP	.EQU	SPD_HILO	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
-CPUSPDDEF	.EQU	SPD_LOW		; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_UNSUP	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
@@ -36,18 +36,18 @@ RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
-MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
-MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
-MPGSEL_3	.EQU	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
-MPGENA		.EQU	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+MPGSEL_0	.EQU	$50		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$51		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$52		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$53		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$54		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
 ;
-RTCIO		.EQU	$70		; RTC LATCH REGISTER ADR
+RTCIO		.EQU	$94		; RTC LATCH REGISTER ADR
 ;
 KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
 ;
-CTCENABLE	.EQU	TRUE		; ENABLE ZILOG CTC SUPPORT
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	TRUE		; ENABLE CTC PERIODIC TIMER
@@ -65,7 +65,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPLED_DSKACT	.EQU	FALSE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
 FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
 FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
 ;
@@ -123,13 +123,14 @@ UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
 UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
-UARTSBC		.EQU	TRUE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
-UARTDUAL	.EQU	TRUE		; UART: AUTO-DETECT DUAL UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	TRUE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -137,7 +138,7 @@ Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -154,11 +155,11 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
-CVDUENABLE	.EQU	TRUE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.EQU	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
-TMSENABLE	.EQU	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSMODE		.EQU	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -237,7 +238,7 @@ ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
-PIOENABLE	.EQU	TRUE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR

Source/HBIOS/cfg_dyno.asm

@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_master.asm

@@ -169,6 +169,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_mbc.asm

@@ -127,6 +127,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	TRUE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;

Source/HBIOS/cfg_mk4.asm

@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_n8.asm

@@ -135,6 +135,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_rcz180.asm

@@ -139,6 +139,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_rcz280.asm

@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;

Source/HBIOS/cfg_rcz80.asm

@@ -132,6 +132,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;

Source/HBIOS/cfg_rph.asm

@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_s100.asm

@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_sbc.asm

@@ -127,6 +127,7 @@ UARTMFP		.EQU	TRUE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;

Source/HBIOS/cfg_scz180.asm

@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3

Source/HBIOS/cfg_z80retro.asm

@@ -125,6 +125,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;

Source/HBIOS/cfg_zeta.asm

@@ -114,6 +114,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;

Source/HBIOS/cfg_zeta2.asm

@@ -125,6 +125,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;

Source/HBIOS/hbios.asm

@@ -118,6 +118,7 @@ MODCNT	.SET	MODCNT + 1
 ; TinyZ80: LED Port=0x6E, bit 0, inverted, dedicated port
 ; Z80-512K: LED Port=0x6E, bit 0, inverted, dedicated port
 ; MBC: LED Port=0x70, bits 1-0, normal, shared w/ RTC port
+; DUO: LED Port=0x94, bits 1-0, normal, shared w/ RTC port
 ; 
 #IF (LEDENABLE)
   #IF (LEDMODE == LEDMODE_STD)
@@ -465,7 +466,11 @@ HBX_ROM:
 	BIT	7,A			; BIT 7 SET REQUESTS RAM PAGE
 	JR	Z,HBX_ROM		; NOT SET, SELECT ROM PAGE
 	RES	7,A			; RAM PAGE REQUESTED: CLEAR ROM BIT
+  #IF (PLATFORM == PLT_DUO)
+	ADD	A,64			; ADD 64 x 32K - RAM STARTS FROM 2048K
+  #ELSE
 	ADD	A,16			; ADD 16 x 32K - RAM STARTS FROM 512K
+  #ENDIF
 ;
 HBX_ROM:
 	RLCA				; TIMES 2 - GET 16K PAGE INSTEAD OF 32K
@@ -1310,7 +1315,13 @@ Z280_INITZ:
 	INC	A
 	OUT	(MPGSEL_1),A
   #ENDIF
-	LD	A,62
+;
+  #IF (PLATFORM == PLT_DUO)
+	LD	A,128 + (RAMSIZE / 16) - 2
+  #ELSE
+	LD	A,64 - 2
+  #ENDIF
+;
 	OUT	(MPGSEL_2),A
 	INC	A
 	OUT	(MPGSEL_3),A

Source/HBIOS/uart.asm

@@ -59,6 +59,7 @@ UARTMBASE		.EQU	$18
 UART4BASE		.EQU	$C0
 UARTRBASE		.EQU	$A0
 UARTDBASE		.EQU	$80
+UARTYBASE		.EQU	$58
 ;
 #IF (UARTINTS)
 ;
@@ -1087,6 +1088,16 @@ UART_CFG_MFP:
 	.DW	UARTCFG				; LINE CONFIGURATION
 	.DW	0				; SHOULD NEVER NEED INT HANDLER
 #ENDIF
+#IF (UARTDUO)
+UART_CFG_DUO:
+	; DUODYNE ONBOARD SERIAL PORT
+	.DB	0				; DEVICE NUMBER (UPDATED DURING INIT)
+	.DB	0				; UART TYPE
+	.DB	UARTYBASE			; IO PORT BASE (RBR, THR)
+	.DB	UARTYBASE + UART_LSR		; LINE STATUS PORT (LSR)
+	.DW	UARTCFG				; LINE CONFIGURATION
+	.DW	0				; POINTER TO RCV BUFFER STRUCT
+#ENDIF
 ;
 UART_CNT	.EQU	($ - UART_CFG) / 8
 ;

Source/ver.inc

@@ -2,7 +2,7 @@
 #DEFINE	RMN	3
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.3.0-dev.36"
+#DEFINE BIOSVER	"3.3.0-dev.37"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	3
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.3.0-dev.36"
+	db	"3.3.0-dev.37"
 	endm