Preserve Partition Table in SYSCOPY

Updated FLASH to latest version

Doc/Flash4.txt

@@ -1,182 +1,186 @@
-
-           FLASH4 (c) 2014 William R Sowerbutts <will@sowerbutts.com>
-                          http://sowerbutts.com/8bit/
-
-= Warning =
-
-FLASH4 has been tested and confirmed working on:
- * N8VEM SBCv2
- * N8VEM N8-2312
- * N8VEM Mark IV SBC
- * DX-Designs P112
- * ZETA SBC v2
-
-However it remains somewhat experimental. If it works for you, please let me
-know. If it breaks please also let me know so I can fix it!
-
-
-= Introduction =
-
-FLASH4 is a CP/M program which can read, write and verify Flash ROM contents to
-or from an image file stored on a CP/M filesystem. It is intended for in-system
-programming of Flash ROM chips on Z80 and Z180 systems.
-
-FLASH4 aims to support a range of Flash ROM chips. Ideally I would like to
-support all Flash ROM chips that are in use in Z80/Z180 N8VEM machines. If
-FLASH4 does not support your chip please let me know and I will try to add
-support.
-
-When writing to the Flash ROM chip, FLASH4 will only reprogram the sectors
-whose contents have changed. This helps to reduce wear on the flash memory,
-makes the reprogram operation faster, and reduces the risk of leaving the
-system unbootable if power fails during a reprogramming operation. FLASH4
-always performs a full verify operation after writing to the chip to confirm
-that the correct data has been loaded.
-
-FLASH4 is reasonably fast. Reprogramming and verifying every sector on a 512KB
-SST 39F040 chip takes 21 seconds on my Mark IV SBC, versus 45 seconds to
-perform the same task using a USB MiniPro TL866 EEPROM programmer under Linux
-on my PC. If only a subset of sectors require reprogramming FLASH4 will be
-even faster.
-
-FLASH4 works with binary ROM image files, it does not support Intel Hex format
-files. Hex files can be easily converted to or from binaries using "hex2bin" or
-the "srec_cat" program from SRecord:
-
-  $ srec_cat image.hex -intel -fill 0xFF 0 0x80000 -output image.bin -binary
-  $ srec_cat image.bin -binary -output image.hex -intel
-
-FLASH4 can use several different methods to access the Flash ROM chip. The best
-available method is determined automatically at run time. Alternatively you may
-provide a command-line option to force the use of a specific method.
-
-The first two methods use bank switching to map sections of the ROM into the
-CPU address space. FLASH4 will detect the presence of RomWBW or UNA BIOS and
-use the bank switching methods they provide. 
-
-On P112 systems the P112 B/P BIOS is detected and P112 bank switching is used.
-
-If no bank switching method can be auto-detected, and the system has a Z180
-CPU, FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This
-does not require any bank switching but it is slower and will not work on all
-platforms.
-
-Z180 DMA access requires the flash ROM to be linearly mapped into the lower
-region of physical memory, as it is on the Mark IV SBC (for example). The
-N8-2312 has additional memory mapping hardware, consequently Z180 DMA access on
-the N8-2312 is NOT SUPPORTED and if forced will corrupt the contents of RAM;
-use one of the supported bank switching methods instead.
-
-Z180 DMA access requires the Z180 CPU I/O base control register configured to
-locate the internal I/O addresses at 0x40 (ie ICR bits IOA7, IOA6 = 0, 1).
-
-
-= Usage =
-
-The three basic operations are:
-
-  FLASH4 WRITE filename [options]
-
-This will rewrite the flash ROM contents from the named file. The file size
-must exactly match the size of the ROM chip. After the write operation, a
-verify operation will be performed automatically.
-
-  FLASH4 VERIFY filename [options]
-
-This will read out the flash ROM contents and report if it matches the contents
-of the named file. The file size must exactly match the size of the ROM chip.
-
-  FLASH4 READ filename [options]
-
-This will read out the entire flash ROM contents and write it to the named
-file.
-
-If your ROM chip is larger than the image you wish to write, use the "/PARTIAL"
-(or "/P") command line option. To avoid accidentally flashing the wrong file,
-the image file must be an exact multiple of 32KB in length. The portion of the
-ROM not occupied by the image file is left either unmodified or erased.
-
-If you are using an ROM/EPROM/EEPROM chip which cannot be programmed in-system,
-FLASH4 will not be able to recognise it, however the software can still
-usefully READ and VERIFY the chip. Use the "/ROM" command line option to enable
-"READ" or "VERIFY" mode with unrecognised chips. This mode assumes a 512K ROM
-is fitted; smaller ROMs will be treated as a 512K ROM with the data repated
-multiple times -- with a 256K chip the data is repeated twice, four times for a
-128K chip, etc.
-
-One of the following optional command line arguments may be specified at the
-end of the command line to force FLASH4 to use a particular method to access
-the flash ROM chip:
-
-  /ROMWBW         For ROMWBW BIOS version 2.6 and later
-  /ROMWBWOLD      For ROMWBW BIOS version 2.5 and earlier
-  /UNABIOS        For UNA BIOS
-  /Z180DMA        For Z180 DMA
-  /P112           For DX-Designs P112
-
-If no option is specified FLASH4 attempts to determine the best available
-method automatically.
-
-
-= Supported chips and features =
-
-FLASH4 will interrogate your flash ROM chip to identify it automatically.
-FLASH4 assumes that you have a single flash ROM device and it is located at the
-bottom of the physical memory map.
-
-FLASH4 does not support setting or resetting the protection bits on individual
-sectors within Flash ROM devices. If your Flash ROM chip has protected sectors
-you will need to unprotect them by other means before FLASH4 can erase and
-reprogram them.
-
-AT29C series chips employ an optional "software data protection" feature. This
-is supported by FLASH4 and is left activated after programming the chip to
-prevent accidental reprogramming of sectors.
-
-The following chips are supported:
-
-  AT29F010
-  AT29F040
-  M29F010
-  M29F040
-  MX29F040
-  SST 39F010
-  SST 39F020
-  SST 39F040
-  AT29C512
-  AT29C040
-  AT29C010
-  AT29C020
-
-The following chips are supported but have unequal sector sizes; FLASH4 will
-only erase and reprogram the entire chip at once rather than its normal
-sector-by-sector operation:
-
-  AT49F001NT
-  AT49F001N
-  AT49F002N
-  AT49F002NT
-  AT49F040
-
-If you use a flash ROM chip that is not listed above please email me
-(will@sowerbutts.com) and I will try to add support for it.
-
-
-= Compiling =
-
-The software is written in a mix of C and assembler. It builds using the SDCC
-toolchain and the SRecord tools. A Makefile is provided to build the executable
-in Linux and I imagine it can be easily modified to build in Windows.
-
-You may need to adjust the path to the SDCC libraries in the Makefile if your
-sdcc installation is not in /usr/local
-
-
-= License =
-
-FLASH4 is licensed under the The GNU General Public License version 3 (see
-included "LICENSE.txt" file). 
-
-FLASH4 is provided with NO WARRANTY. In no event will the author be liable for
-any damages. Use of this program is at your own risk. May cause rifts in space
-and time.
+
+           FLASH4 (c) 2014 William R Sowerbutts <will@sowerbutts.com>
+                          http://sowerbutts.com/8bit/
+
+= Warning =
+
+FLASH4 has been tested and confirmed working on:
+ * N8VEM SBCv2
+ * N8VEM N8-2312
+ * N8VEM Mark IV SBC
+ * DX-Designs P112
+ * ZETA SBC v2
+
+However it remains somewhat experimental. If it works for you, please let me
+know. If it breaks please also let me know so I can fix it!
+
+
+= Introduction =
+
+FLASH4 is a CP/M program which can read, write and verify Flash ROM contents to
+or from an image file stored on a CP/M filesystem. It is intended for in-system
+programming of Flash ROM chips on Z80 and Z180 systems.
+
+FLASH4 aims to support a range of Flash ROM chips. Ideally I would like to
+support all Flash ROM chips that are in use in Z80/Z180 N8VEM machines. If
+FLASH4 does not support your chip please let me know and I will try to add
+support.
+
+When writing to the Flash ROM chip, FLASH4 will only reprogram the sectors
+whose contents have changed. This helps to reduce wear on the flash memory,
+makes the reprogram operation faster, and reduces the risk of leaving the
+system unbootable if power fails during a reprogramming operation. FLASH4
+always performs a full verify operation after writing to the chip to confirm
+that the correct data has been loaded.
+
+FLASH4 is reasonably fast. Reprogramming and verifying every sector on a 512KB
+SST 39F040 chip takes 21 seconds on my Mark IV SBC, versus 45 seconds to
+perform the same task using a USB MiniPro TL866 EEPROM programmer under Linux
+on my PC. If only a subset of sectors require reprogramming FLASH4 will be
+even faster.
+
+FLASH4 works with binary ROM image files, it does not support Intel Hex format
+files. Hex files can be easily converted to or from binaries using "hex2bin" or
+the "srec_cat" program from SRecord:
+
+  $ srec_cat image.hex -intel -fill 0xFF 0 0x80000 -output image.bin -binary
+  $ srec_cat image.bin -binary -output image.hex -intel
+
+FLASH4 can use several different methods to access the Flash ROM chip. The best
+available method is determined automatically at run time. Alternatively you may
+provide a command-line option to force the use of a specific method.
+
+The first two methods use bank switching to map sections of the ROM into the
+CPU address space. FLASH4 will detect the presence of RomWBW or UNA BIOS and
+use the bank switching methods they provide. 
+
+On P112 systems the P112 B/P BIOS is detected and P112 bank switching is used.
+
+If no bank switching method can be auto-detected, and the system has a Z180
+CPU, FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This
+does not require any bank switching but it is slower and will not work on all
+platforms.
+
+Z180 DMA access requires the flash ROM to be linearly mapped into the lower
+region of physical memory, as it is on the Mark IV SBC (for example). The
+N8-2312 has additional memory mapping hardware, consequently Z180 DMA access on
+the N8-2312 is NOT SUPPORTED and if forced will corrupt the contents of RAM;
+use one of the supported bank switching methods instead.
+
+Z180 DMA access requires the Z180 CPU I/O base control register configured to
+locate the internal I/O addresses at 0x40 (ie ICR bits IOA7, IOA6 = 0, 1).
+
+
+= Usage =
+
+The three basic operations are:
+
+  FLASH4 WRITE filename [options]
+
+This will rewrite the flash ROM contents from the named file. The file size
+must exactly match the size of the ROM chip. After the write operation, a
+verify operation will be performed automatically.
+
+  FLASH4 VERIFY filename [options]
+
+This will read out the flash ROM contents and report if it matches the contents
+of the named file. The file size must exactly match the size of the ROM chip.
+
+  FLASH4 READ filename [options]
+
+This will read out the entire flash ROM contents and write it to the named
+file.
+
+If your ROM chip is larger than the image you wish to write, use the "/PARTIAL"
+(or "/P") command line option. To avoid accidentally flashing the wrong file,
+the image file must be an exact multiple of 32KB in length. The portion of the
+ROM not occupied by the image file is left either unmodified or erased.
+
+If you are using an ROM/EPROM/EEPROM chip which cannot be programmed in-system,
+FLASH4 will not be able to recognise it, however the software can still
+usefully READ and VERIFY the chip. Use the "/ROM" command line option to enable
+"READ" or "VERIFY" mode with unrecognised chips. This mode assumes a 512K ROM
+is fitted; smaller ROMs will be treated as a 512K ROM with the data repated
+multiple times -- with a 256K chip the data is repeated twice, four times for a
+128K chip, etc.
+
+One of the following optional command line arguments may be specified at the
+end of the command line to force FLASH4 to use a particular method to access
+the flash ROM chip:
+
+BIOS interfaces:
+  /ROMWBW         For ROMWBW BIOS version 2.6 and later
+  /ROMWBWOLD      For ROMWBW BIOS version 2.5 and earlier
+  /UNABIOS        For UNA BIOS
+
+Direct hardware interfaces:
+  /Z180DMA        For Z180 DMA
+  /P112           For DX-Designs P112
+  /N8VEMSBC       For N8VEM SBC (v1, v2), Zeta (v1) SBC
+
+If no option is specified FLASH4 attempts to determine the best available
+method automatically.
+
+
+= Supported chips and features =
+
+FLASH4 will interrogate your flash ROM chip to identify it automatically.
+FLASH4 assumes that you have a single flash ROM device and it is located at the
+bottom of the physical memory map.
+
+FLASH4 does not support setting or resetting the protection bits on individual
+sectors within Flash ROM devices. If your Flash ROM chip has protected sectors
+you will need to unprotect them by other means before FLASH4 can erase and
+reprogram them.
+
+AT29C series chips employ an optional "software data protection" feature. This
+is supported by FLASH4 and is left activated after programming the chip to
+prevent accidental reprogramming of sectors.
+
+The following chips are supported:
+
+  AT29F010
+  AT29F040
+  M29F010
+  M29F040
+  MX29F040
+  SST 39F010
+  SST 39F020
+  SST 39F040
+  AT29C512
+  AT29C040
+  AT29C010
+  AT29C020
+
+The following chips are supported but have unequal sector sizes; FLASH4 will
+only erase and reprogram the entire chip at once rather than its normal
+sector-by-sector operation:
+
+  AT49F001NT
+  AT49F001N
+  AT49F002N
+  AT49F002NT
+  AT49F040
+
+If you use a flash ROM chip that is not listed above please email me
+(will@sowerbutts.com) and I will try to add support for it.
+
+
+= Compiling =
+
+The software is written in a mix of C and assembler. It builds using the SDCC
+toolchain and the SRecord tools. A Makefile is provided to build the executable
+in Linux and I imagine it can be easily modified to build in Windows.
+
+You may need to adjust the path to the SDCC libraries in the Makefile if your
+sdcc installation is not in /usr/local
+
+
+= License =
+
+FLASH4 is licensed under the The GNU General Public License version 3 (see
+included "LICENSE.txt" file). 
+
+FLASH4 is provided with NO WARRANTY. In no event will the author be liable for
+any damages. Use of this program is at your own risk. May cause rifts in space
+and time.

Source/Apps/Assign.asm

@@ -1729,4 +1729,4 @@ msgnoa	.db	"Drive A: is unassigned, aborting!",0
 msgdos	.db	"DOS error, return code=0x",0
 msgmem	.db	" Disk Buffer Bytes Free",0
 ;
-	.end
+	.end

Source/Apps/Format.asm

@@ -5,24 +5,210 @@
 ;	AUTHOR:  WAYNE WARTHEN (wwarthen@gmail.com)
 ;_______________________________________________________________________________
 ;
-; CHANGELOG:
+; Usage:
+;   FORMAT D:
+;     ex: FORMAT		(display version and usage)
+;         FORMAT /?		(display version and usage)
+;         FORMAT C:		(format drive C:)
 ;_______________________________________________________________________________
 ;
-; TODO:
+; Change Log:
+;_______________________________________________________________________________
 ;
+; ToDo:
+;  1) Actually implement this
 ;_______________________________________________________________________________
 ;
+;===============================================================================
+; Definitions
+;===============================================================================
+;
+stksiz	.equ	$40		; Working stack size
+;
+restart	.equ	$0000		; CP/M restart vector
+bdos	.equ	$0005		; BDOS invocation vector
+;;
+;stamp	.equ	$40		; loc of RomWBW CBIOS zero page stamp
+;
+rmj	.equ	2		; CBIOS version - major
+rmn	.equ	8		; CBIOS version - minor
+;
+;===============================================================================
+; Code Section
+;===============================================================================
+;
+;
+	.org	$100
+;
+	; setup stack (save old value)
+	ld	(stksav),sp	; save stack
+	ld	sp,stack	; set new stack
+;
+	; initialization
+	call	init		; initialize
+	jr	nz,exit		; abort if init fails
+;
+	; do the real work 
+	call	process		; parse and process command line
+	jr	nz,exit		; done if error or no action
+;
+exit:	; clean up and return to command processor
+	call	crlf		; formatting
+	ld	sp,(stksav)	; restore stack
+	jp	restart		; return to CP/M via restart
+	ret			; return to CP/M w/o restart
+;
+; Initialization
+;
+init:
+;
+	; locate start of cbios (function jump table)
+	ld	hl,(restart+1)	; load address of CP/M restart vector
+	ld	de,-3		; adjustment for start of table
+	add	hl,de		; HL now has start of table
+	ld	(bioloc),hl	; save it
+;
+	; check for UNA (UBIOS)
+	ld	a,($FFFD)	; fixed location of UNA API vector
+	cp	$C3		; jp instruction?
+	jr	nz,initx	; if not, not UNA
+	ld	hl,($FFFE)	; get jp address
+	ld	a,(hl)		; get byte at target address
+	cp	$FD		; first byte of UNA push ix instruction
+	jr	nz,initx	; if not, not UNA
+	inc	hl		; point to next byte
+	ld	a,(hl)		; get next byte
+	cp	$E5		; second byte of UNA push ix instruction
+	jr	nz,initx	; if not, not UNA
+	ld	hl,unamod	; point to UNA mode flag
+	ld	(hl),$FF	; set UNA mode flag
+;
+initx:
+;
+	xor	a
+	ret
+;
+; Process command line
+;
+process:
+	jr	usage
+;
+	xor	a
+	ret
+;
+usage:
+;
+	call	crlf		; formatting
+	ld	de,msgban1	; point to version message part 1
+	call	prtstr		; print it
+	ld	a,(unamod)	; get UNA flag
+	or	a		; set flags
+	ld	de,msghb	; point to HBIOS mode message
+	call	z,prtstr	; if not UNA, say so
+	ld	de,msgub	; point to UBIOS mode message
+	call	nz,prtstr	; if UNA, say so
+	call	crlf		; formatting
+	ld	de,msgban2	; point to version message part 2
+	call	prtstr		; print it
+	call	crlf2		; blank line
+	ld	de,msguse	; point to usage message
+	call	prtstr		; print it
+	xor	a		; signal success
+	ret			; and return
+;
+; Print character in A without destroying any registers
+;
+prtchr:
+	push	bc		; save registers
+	push	de
+	push	hl
+	ld	e,a		; character to print in E
+	ld	c,$02		; BDOS function to output a character
+	call	bdos		; do it
+	pop	hl		; restore registers
+	pop	de
+	pop	bc
+	ret
+;
+; Print a zero terminated string at (HL) without destroying any registers
+;
+prtstr:
+	push	de
+;
+prtstr1:
+	ld	a,(de)		; get next char
+	or	a
+	jr	z,prtstr2
+	call	prtchr
+	inc	de
+	jr	prtstr1
+;
+prtstr2:
+	pop	de		; restore registers
+	ret	
+;
+; Start a new line
+;
+crlf2:
+	call	crlf		; two of them
+crlf:
+	push	af		; preserve AF
+	ld	a,13		; <CR>
+	call	prtchr		; print it
+	ld	a,10		; <LF>
+	call	prtchr		; print it
+	pop	af		; restore AF
+	ret
+;
+; Invoke CBIOS function
+; The CBIOS function offset must be stored in the byte
+; following the call instruction.  ex:
+;	call	cbios
+;	.db	$0C		; offset of CONOUT CBIOS function
+;
+cbios:
+	ex	(sp),hl
+	ld	a,(hl)		; get the function offset
+	inc	hl		; point past value following call instruction
+	ex	(sp),hl		; put address back at top of stack and recover HL
+	ld	hl,(bioloc)	; address of CBIOS function table to HL
+	call	addhl		; determine specific function address
+	jp	(hl)		; invoke CBIOS
+;
+; Add the value in A to HL (HL := HL + A)
+;
+addhl:
+	add	a,l		; A := A + L
+	ld	l,a		; Put result back in L
+	ret	nc		; if no carry, we are done
+	inc	h		; if carry, increment H
+	ret			; and return
+;
+; Jump indirect to address in HL
+;
+jphl:
+	jp	(hl)
 ;
 ;===============================================================================
-; MAIN PROGRAM PROCEDURE
+; Storage Section
 ;===============================================================================
 ;
-	.ORG	00100H
-	RET
+bioloc	.dw	0		; CBIOS starting address
+;
+unamod	.db	0		; $FF indicates UNA UBIOS active
+;
+stksav	.dw	0		; stack pointer saved at start
+	.fill	stksiz,0	; stack
+stack	.equ	$		; stack top
 ;
-STACKSAV	.DW	0
-STACKSIZ	.EQU	40H		; WE ARE A STACK PIG
-		.FILL	STACKSIZ,0
-STACK		.EQU	$
+msgban1	.db	"FORMAT v0.1 for RomWBW CP/M 2.2, 24-Apr-2016",0
+msghb	.db	" (HBIOS Mode)",0
+msgub	.db	" (UBIOS Mode)",0
+msgban2	.db	"Copyright 2016, Wayne Warthen, GNU GPL v3",0
+msguse	.db	"FORMAT command is not yet implemented!",13,10,13,10
+	.db	"Use FD command to physically format floppy diskettes",13,10
+	.db	"Use CLRDIR command to (re)initialize directories",13,10
+	.db	"Use SYSCOPY command to make disks bootable",13,10
+	.db	"Use FDISK80 command to partition mass storage media",0
 ;
-		.END
+	.end

Source/Apps/SysCopy.asm

@@ -15,6 +15,7 @@
 ;_______________________________________________________________________________
 ;
 ; Change Log:
+;   2016-04-24 [WBW] Updated to preserve MBR partition table
 ;_______________________________________________________________________________
 ;
 ; ToDo:
@@ -31,7 +32,8 @@ stksiz	.equ	$40		; we are a stack pig
 restart	.equ	$0000		; CP/M restart vector
 bdos	.equ	$0005		; BDOS invocation vector
 ;
-buf	.equ	$900		; load point for system image (from original SYSGEN)
+imgbuf	.equ	$900		; load point for system image (from original SYSGEN)
+mbrbuf	.equ	imgbuf+$4000	; load point for MBR storage
 ;
 ;===============================================================================
 ; Code Section
@@ -142,16 +144,16 @@ confirm:
 	ld	de,sconf3
 	call	prtstr
 ;
-	; get input
+	; get input (imgbuf is used for temp storage)
 	ld	c,$0A		; get console buffer
-	ld	de,buf		; into buf
+	ld	de,imgbuf		; into buf
 	ld	a,1		; max of 1 character
 	ld	(de),a		; set up buffer
 	call	bdos		; invoke BDOS
-	ld	a,(buf+1)	; get num chars entered
+	ld	a,(imgbuf+1)	; get num chars entered
 	dec	a		; check that we got exactly one char
 	jr	nz,confirm	; bad input, re-prompt
-	ld	a,(buf+2)	; get the character
+	ld	a,(imgbuf+2)	; get the character
 	and	$DF		; force upper case
 	cp	'Y'		; compare to Y
 	ret			; return with Z set appropriately
@@ -190,7 +192,7 @@ rdfil:
 	ld	(rwfun),a	; save bdos function
 	ld	a,12		; start with 1536 byte header (12 records)
 	ld	(reccnt),a	; init record counter
-	ld	hl,buf		; start of buffer
+	ld	hl,imgbuf	; start of buffer
 	ld	(bufptr),hl	; init buffer pointer
 	call	rwfil		; read the header
 	ret	nz		; abort on error (no need to close file)
@@ -237,7 +239,7 @@ wrfil1:	; create target file
 	ld	(rwfun),a	; save bdos function
 	ld	a,(imgsiz)	; number of records to read
 	ld	(reccnt),a	; init record counter
-	ld	hl,buf		; start of buffer
+	ld	hl,imgbuf	; start of buffer
 	ld	(bufptr),hl	; init buffer pointer
 	call	rwfil		; do it
 	ret	nz		; abort on error
@@ -329,7 +331,36 @@ wrdsk:
 	; force return to go through disk reset
 	ld	hl,resdsk	; load address of reset disk routine
 	push	hl		; and put it on the stack
-	; set drive for subsequent writes
+	; setup to read existing MBR
+	ld	a,(destfcb)	; get the drive
+	dec	a		; adjust for zero indexing
+	call	setdsk		; setup disk
+	ret	nz		; abort on error
+	ld	hl,mbrbuf	; override to read
+	ld	(bufptr),hl	; ... into MBR buffer
+	ld	a,4		; 4 records = 1 512 byte sector
+	; set function to read
+	ld	hl,(cbftbl)	; get address of CBIOS function table
+	ld	a,$27		; $27 is CBIOS READ entry offset
+	call	addhl		; set HL to resultant entry point
+	ld	(actfnc),hl	; save it
+	; read the existing MBR into memory
+	call	rwdsk		; read the sector
+	ret	nz		; abort on error
+	; test for valid partition table ($55, $AA at offset $1FE)
+	ld	hl,(mbrbuf+$1FE); HL := signature
+	ld	a,$55		; load expected value of first byte
+	cp	l		; check for proper value
+	jr	nz,wrdsk1	; mismatch, ignore old partition table
+	ld	a,$AA		; load expected value of second byte
+	cp	h		; check for proper value
+	jr	nz,wrdsk1	; mismatch, ignore old partition table
+	; valid MBR, copy existing partition table over to new image
+	ld	hl,mbrbuf+$1BE	; copy from MBR offset of existing MBR
+	ld	de,imgbuf+$1BE	; copy to MBR offset of new image
+	ld	bc,$40		; size of MBR
+	ldir			; do it
+wrdsk1:	; setup to write the image from memory to disk
 	ld	a,(destfcb)	; get the drive
 	dec	a		; adjust for zero indexing
 	call	setdsk		; setup disk
@@ -396,7 +427,7 @@ setdsk:
 	ld	hl,0
 	ld	(acttrk),hl	; active track := 0
 	ld	(actsec),hl	; active sector := 0
-	ld	hl,buf
+	ld	hl,imgbuf	; assume r/w to image buffer
 	ld	(bufptr),hl	; reset buffer pointer
 ;
 	xor	a		; signal success
@@ -458,14 +489,14 @@ jphl:	jp	(hl)		; indirect jump
 ;
 chkhdr:
 	; check signature
-	ld	hl,(buf+$580)	; get signature
+	ld	hl,(imgbuf+$580)	; get signature
 	ld	de,$A55A	; signature value
 	or	a		; clear CF
 	sbc	hl,de		; compare
 	jp	nz,errsig	; invalid signature
 	; compute the image size (does not include size of header)
-	ld	hl,(buf+$5FC)	; get CPM_END
-	ld	de,(buf+$5FA)	; get CPM_LOC
+	ld	hl,(imgbuf+$5FC)	; get CPM_END
+	ld	de,(imgbuf+$5FA)	; get CPM_LOC
 	or	a		; clear CF
 	sbc	hl,de		; image size := CPM_END - CPM_LOC
 	xor	a		; signal success

Source/HBIOS/prefix.asm

@@ -1,20 +1,52 @@
-;----------------------------------------------------------------------------
-;       PREFIX_UNA.ASM
+;===============================================================================
+; PREFIX.ASM
 ;
-;       PUT AT THE HEAD OF BOOT.BIN TO XFER TO A FLOPPY DISK
+; CP/M DISK FORMATS ALLOW FOR RESERVED TRACKS THAT CONTAIN AN IMAGE OF THE
+; OPERATING SYSTEM TO BE LOADED WHEN THE DISK IS BOOTED.  THE OPERATING SYSTEM
+; IMAGE ITSELF IS NORMALLY PREFIXED BY A 1-N SECTORS CONTAINING OS BOOTSTRAP
+; CODE AND DISK METADATA.
+;
+; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE
+; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES):
+;
+;   SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP, 
+;             PARTITION TABLE, AND BOOT SIGNATURE
+;   SECTOR 2: RESERVED
+;   SECTOR 3: METADATA
+;
+; THE HARDWARE BIOS IS EXPECTED TO READ AND LOAD THE FIRST TWO SECTORS FROM THE
+; DISK TO MEMORY ADDRESS $8000 AND JUMP TO THAT LOCATION TO BEGIN THE BOOT
+; PROCESS.  THE BIOS IS EXPECTED TO VERIFY THAT A STANDARD BOOT SIGNATURE
+; OF $55, $AA IS PRESENT AT OFFSET $1FE-$1FF.  IF THE SIGNATURE IS NOT FOUND,
+; THE BIOS SHOULD ASSUME THE DISK HAS NOT BEEN PROPERLY INITIALIZED AND SHOULD
+; NOT JUMP TO THE LOAD ADDRESS.
+;
+;===============================================================================
 ;
-;----------------------------------------------------------------------------
-
 #INCLUDE "std.asm"
-
 BYT		.EQU	1	; used to describe METADATA_SIZE below
 WRD		.EQU	2
-
+;
 SECTOR_SIZE	.EQU	512
 BLOCK_SIZE	.EQU	128
 PREFIX_SIZE	.EQU	(3 * SECTOR_SIZE)	; 3 SECTORS
 METADATA_SIZE	.EQU	BYT+WRD+(4*BYT)+16+BYT+WRD+WRD+WRD+WRD	; (as defined below)
-
+;
+PARTTBL_LOC	.EQU	$1BE
+PARTTBL_SIZ	.EQU	$40
+BOOTSIG_LOC	.EQU	$1FE
+;
+;-------------------------------------------------------------------------------
+; SECTOR 1
+;
+;   THIS SECTOR FOLLOWS THE CONVENTIONS OF AN IBM-PC MBR CONTAINING THE OS
+;   BOOTSTRAP CODE, PARTITION TABLE, AND BOOT SIGNATURE
+;
+;----------------------------------------------------------------------------
+;
+; THE FOLLOWING BOOTSTRAP CODE IS BUILT TO ASSUME IT WILL BE EXECUTED AT A STARTING
+; ADDRESS OF $8000.
+;
 	.ORG	$8000
 	JR	BOOT
 ;
@@ -114,37 +146,76 @@ HEXCONV:
 	RET	
 ;
 ERROR:
-	LD	DE,STR_ERR	; POINT TO ERROR STRING
-	CALL	PRTSTR		; PRINT IT
-	HALT			; HALT
+	LD	DE,STR_ERR		; POINT TO ERROR STRING
+	CALL	PRTSTR			; PRINT IT
+	HALT				; HALT
+;
+; DATA
 ;
 STR_LOAD	.DB	"\r\nLoading",0
 STR_DONE	.DB	"\r\n",0
 STR_ERR		.DB	" Read Error!",0
 ;
-		.ORG	$ - $8000
+	.ORG	$ - $8000		; RESTORE ORG
+	.FILL	PARTTBL_LOC - $		; FILL TO START OF PARTITION TABLE
+;
+; RESERVE SPACE FOR STANDARD IBM-PC PARTITION TABLE.  ALTHOUGH A
+; PARTITION TABLE IS NOT RELEVANT FOR A FLOPPY DISK, IT DOES NO HARM.
+; THE CONTENTS OF THE PARTITION TABLE MUST BE MANAGED BY FDISK80.
+;
+PARTTBL	.FILL	PARTTBL_SIZ,$00		; PARTITION TABLE, FILL WITH ZEROES
+;
+; THE END OF THE FIRST SECTOR MUST CONTAIN THE TWO BYTE BOOT
+; SIGNATURE.
 ;
-		.FILL	(SECTOR_SIZE) - $ - 2
-		.DW	$AA55
+BOOTSIG	.DB	$55,$AA			; STANDARD BOOT SIGNATURE
 ;
-		.FILL	((PREFIX_SIZE - BLOCK_SIZE) - $),00H
-PR_SIG		.DW	$A55A				; SIGNATURE GOES HERE
+;-------------------------------------------------------------------------------
+; SECTOR 2
 ;
-PR_PLATFORM	.DB	PLATFORM
-PR_DEVICE	.DB	0
-PR_FORMATTER	.DB	0,0,0,0,0,0,0,0
-PR_DRIVE	.DB	0
-PR_LOG_UNIT	.DW	0
-
+;   THIS SECTOR HAS NOT BEEN DEFINED AND IS RESERVED.
+;
+;----------------------------------------------------------------------------
+;
+	.FILL	512,0			; JUST FILL SECTOR WITH ZEROES
+;
+;-------------------------------------------------------------------------------
+; SECTOR 3
+;
+;   OS AND DISK METADATA
+;
+;----------------------------------------------------------------------------
+;
+	.FILL	128 * 3,0		; FIRST 384 BYTES ARE NOT YET DEFINED
+;
+; THE FOLLOWING TWO BYTES ARE AN ADDITIONAL SIGNATURE THAT IS VERIFIED BY
+; SOME HARDWARE BIOSES.
+;
+PR_SIG		.DB	$5A,$A5		; SIGNATURE GOES HERE
+;
+; FIRST CHUNK OF METADATA IMMEDIATELY FOLLOWS THE SIGNATURE BYTES
+;
+PR_PLATFORM	.DB	PLATFORM	; PLATFORM ID (SEE STD.ASM)
+PR_DEVICE	.DB	0		; ? (PROBABLY UNUSED)
+PR_FORMATTER	.DB	0,0,0,0,0,0,0,0	; ? (PROBABLY UNUSED)
+PR_DRIVE	.DB	0		; ? (PROBABLY UNUSED)
+PR_LOG_UNIT	.DW	0		; ? (PROBABLY UNUSED)
+;
+; FILLER TO PLACE SECOND CHUNK OF METADATA AT THE END OF THE SECTOR
 ;
 		.FILL	((PREFIX_SIZE - METADATA_SIZE) - $),00H
-		.DB	0		; write protect boolean
-		.DW	0		; starting update number
-		.DB	RMJ,RMN,RUP,RTP
-		.DB	"Unlabeled Drive ","$"
-		.DW	0		; PTR TO LOCATION TO STORE DISKBOOT & BOOTDRIVE (SEE CNFGDATA)
-		.DW	CPM_LOC		; CCP START
-		.DW	CPM_END		; END OF CBIOS
-		.DW	CPM_ENT		; COLD BOOT LOCATION
-
-		.END
+;
+; SECOND CHUNK OF METADATA 
+;
+PR_WP		.DB	0		; WRITE PROTECT BOOLEADN
+PR_UPDSEQ	.DW	0		; PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?)
+PR_VER		.DB	RMJ,RMN,RUP,RTP	; OS BUILD VERSION
+PR_LABEL	.DB	"Unlabeled Drive ","$"	; DISK LABEL (EXACTLY 16 BYTES!!!)
+		.DW	0		; DEPRECATED
+PR_LDLOC	.DW	CPM_LOC		; ADDRESS TO START LOADING OS
+PR_LDEND	.DW	CPM_END		; ADDRESS TO STOP LOADING OS
+PR_ENTRY	.DW	CPM_ENT		; ADDRESS TO ENTER OS
+;
+;
+;
+		.END