Update ppide.asm

Initial multi device ppide

Source/HBIOS/ppide.asm

@@ -29,11 +29,6 @@ PPIDE_IO_BASE	.EQU	$80
 PPIDE_IO_BASE	.EQU	$4C
 #ENDIF
 ;
-PPIDE_IO_DATALO	.EQU	PPIDE_IO_BASE + 0	; IDE DATA BUS LSB (8255 PORT A)
-PPIDE_IO_DATAHI	.EQU	PPIDE_IO_BASE + 1	; IDE DATA BUS MSB (8255 PORT B)
-PPIDE_IO_CTL	.EQU	PPIDE_IO_BASE + 2	; IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)
-PPIDE_IO_PPI	.EQU	PPIDE_IO_BASE + 3	; 8255 CONTROL PORT
-;
 ; THE CONTROL PORT OF THE 8255 IS PROGRAMMED AS NEEDED TO READ OR WRITE
 ; DATA ON THE IDE BUS.	PORT C OF THE 8255 IS ALWAYS IN OUTPUT MODE BECAUSE
 ; IT IS DRIVING THE ADDRESS BUS AND CONTROL SIGNALS.  PORTS A & B WILL BE
@@ -173,6 +168,11 @@ PPIDE_REG_DRVADR	.EQU	PPIDE_CTL_CS3FX | $07	; DRIVE ADDRESS REGISTER (R)
 ;   PPIDE2:	SECONDARY MASTER
 ;   PPIDE3:	SECONDARY SLAVE
 ;
+PPIDE0IO	.EQU	PPIDE_IO_BASE
+PPIDE1IO	.EQU	20H
+PPIDE2IO	.EQU	00H
+PPIDE3IO	.EQU	00H
+;
 PPIDE_DEVCNT		.EQU	2	; ASSUME ONLY PRIMARY INTERFACE
 ;
 ; COMMAND BYTES
@@ -213,7 +213,7 @@ PPIDE_DRVSLAVE	.DB	%11110000	; LBA, SLAVE DEVICE
 ;
 ; PPIDE DEVICE CONFIGURATION
 ;
-PPIDE_CFGSIZ	.EQU	12		; SIZE OF CFG TBL ENTRIES
+PPIDE_CFGSIZ	.EQU	16		; SIZE OF CFG TBL ENTRIES
 ;
 ; PER DEVICE DATA OFFSETS
 ;
@@ -223,6 +223,11 @@ PPIDE_TYPE	.EQU	2		; DEVICE TYPE (BYTE)
 PPIDE_FLAGS	.EQU	3		; FLAG BITS BIT 0=CF, 1=LBA (BYTE)
 PPIDE_MEDCAP	.EQU	4		; MEDIA CAPACITY (DWORD)
 PPIDE_LBA	.EQU	8		; OFFSET OF LBA (DWORD)
+PPIDE_PORT	.EQU	12		; PORT ADDRESS OF THIS DEVICE (BYTE)
+PPIDE_DATALO	.EQU	12		; IDE DATA BUS LSB (8255 PORT A) (BYTE)
+PPIDE_DATAHI	.EQU	13		; IDE DATA BUS MSB (8255 PORT B)(BYTE)
+PPIDE_CTL	.EQU	14		; IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)(BYTE)
+PPIDE_PPI	.EQU	15		; 8255 CONTROL PORT(BYTE)
 ;
 PPIDE_CFGTBL:
 	; DEVICE 0, PRIMARY MASTER
@@ -232,6 +237,10 @@ PPIDE_CFGTBL:
 	.DB	0			; FLAGS BYTE
 	.DW	0,0			; DEVICE CAPACITY
 	.DW	0,0			; CURRENT LBA
+	.DB	PPIDE0IO  		; DATALO IDE DATA BUS LSB (8255 PORT A)+ BASE ADDRESS OF PORT	
+	.DB	PPIDE0IO+1		; DATAHI IDE DATA BUS MSB (8255 PORT B)
+	.DB	PPIDE0IO+2		; CTL    IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)
+	.DB	PPIDE0IO+3		; PPI    8255 CONTROL PORT
 	; DEVICE 1, PRIMARY SLAVE
 	.DB	1			; DRIVER DEVICE NUMBER
 	.DB	0			; DEVICE STATUS
@@ -239,6 +248,10 @@ PPIDE_CFGTBL:
 	.DB	0			; FLAGS BYTE
 	.DW	0,0			; DEVICE CAPACITY
 	.DW	0,0			; CURRENT LBA
+	.DB	PPIDE0IO		; DATALO IDE DATA BUS LSB (8255 PORT A)+ BASE ADDRESS OF PORT
+	.DB	PPIDE0IO+1		; DATAHI IDE DATA BUS MSB (8255 PORT B)
+	.DB	PPIDE0IO+2		; CTL    IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)
+	.DB	PPIDE0IO+3		; PPI    8255 CONTROL PORT
 ;
 #IF ($ - PPIDE_CFGTBL) != (PPIDE_DEVCNT * PPIDE_CFGSIZ)
 	.ECHO	"*** INVALID PPIDE CONFIG TABLE ***\n"
@@ -275,6 +288,7 @@ PPIDE_INIT:
 	LD	(PPIDE_TOSCALER),HL	; SAVE IT
 ;
 	PRTS(" IO=0x$")			; LABEL FOR IO ADDRESS
+	LD	IY,PPIDE_CFGTBL
 	LD	A,PPIDE_IO_BASE
 	CALL	PRTHEXBYTE
 ;
@@ -375,11 +389,15 @@ PPIDE_DETECT:
 	; THEN THE BUS HOLD CIRCUITRY WILL READ BACK THE ZERO. SINCE
 	; WE ARE IN WRITE MODE, AN IDE CONTROLLER WILL NOT BE ABLE TO
 	; INTERFERE WITH THE VALUE BEING READ.
+	LD	C,(IY+PPIDE_PPI)
 	LD	A,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
-	OUT	(PPIDE_IO_PPI),A	; OUTPUT TO CONTROL WORD
-	LD	C,PPIDE_IO_DATALO	; PPI PORT A
+	OUT	(C),A			; OUTPUT TO CONTROL WORD
+
+	LD	C,(IY+PPIDE_DATALO)	; PPI PORT A
 	XOR	A			; VALUE ZERO
 	OUT	(C),A			; PUSH VALUE TO PORT
+;;	OUT	(C),0
+;;	.DB	$ED,$71
 	IN	A,(C)			; GET PORT VALUE
 	DCALL	PC_SPACE
 	DCALL	PRTHEXBYTE
@@ -717,7 +735,7 @@ PPIDE_RUNCMD:
 	JP	NZ,PPIDE_CMDERR
 	RET
 ;
-;
+;	READ IDE DATA INTO BUFFER POINTED TO BY HL
 ;
 PPIDE_GETBUF:
 #IF (PPIDETRACE >= 3)
@@ -729,19 +747,22 @@ PPIDE_GETBUF:
 	RET	NZ			; BAIL OUT IF TIMEOUT
 ;
 	; SETUP PPI TO READ
+	LD	C,(IY+PPIDE_PPI)	;;
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ
-	OUT	(PPIDE_IO_PPI),A	; DO IT
+	OUT	(C),A			; DO IT
 ;
 	; SELECT READ/WRITE IDE REGISTER
+	LD	C,(IY+PPIDE_CTL)	;;
 	LD	A,PPIDE_REG_DATA	; DATA REGISTER
-	OUT	(PPIDE_IO_CTL),A	; DO IT
+	OUT	(C),A			; DO IT
+
 	LD	E,A			; E := READ UNASSERTED
 	XOR	PPIDE_CTL_DIOR		; SWAP THE READ LINE BIT
 	LD	D,A			; D := READ ASSERTED
 ;
 	; LOOP SETUP
 	LD	B,0			; 256 ITERATIONS
-	LD	C,PPIDE_IO_DATALO	; SETUP C WITH IO PORT (LSB)
+	LD	C,(IY+PPIDE_DATALO)	; SETUP C WITH IO PORT (LSB)
 ;
 #IF (!PPIDE8BIT)
 	INC	C			; PRE-INCREMENT C
@@ -761,16 +782,22 @@ PPIDE_GETBUF:
 	RET
 ;
 PPIDE_GETBUF1:	; START OF READ LOOP
-	LD	A,D			; ASSERT READ
-	OUT	(PPIDE_IO_CTL),A	; DO IT
+	PUSH	BC			;;
+	LD	C,(IY+PPIDE_CTL)	;;
+	OUT	(C),D			; ASSERT READ
+	POP	BC			;;
+
 #IF (!PPIDE8BIT)
 	DEC	C
 	INI				; GET AND SAVE NEXT BYTE
 	INC	C			; LSB -> MSB
 #ENDIF
 	INI				; GET AND SAVE NEXT BYTE
-	LD	A,E			; DEASSERT READ
-	OUT	(PPIDE_IO_CTL),A	; DO IT
+
+	PUSH	BC			;;
+	LD	C,(IY+PPIDE_CTL)	;;
+	OUT	(C),E			; DEASSERT READ
+	POP	BC			;;
 ;
 	JR	NZ,PPIDE_GETBUF1	; LOOP UNTIL DONE
 	RET
@@ -787,19 +814,23 @@ PPIDE_PUTBUF:
 	RET	NZ			; BAIL OUT IF TIMEOUT
 ;
 	; SETUP PPI TO WRITE
+
+	LD	C,(IY+PPIDE_PPI)	;;
 	LD	A,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
-	OUT	(PPIDE_IO_PPI),A	; DO IT
+	OUT	(C),A			; DO IT
 ;
 	; SELECT READ/WRITE IDE REGISTER
+	LD	C,(IY+PPIDE_CTL)	;;
 	LD	A,PPIDE_REG_DATA	; DATA REGISTER
-	OUT	(PPIDE_IO_CTL),A	; DO IT
+	OUT	(C),A			;;
+
 	LD	E,A			; E := WRITE UNASSERTED
 	XOR	PPIDE_CTL_DIOW		; SWAP THE READ LINE BIT
 	LD	D,A			; D := WRITE ASSERTED
 ;
 	; LOOP SETUP
 	LD	B,0			; 256 ITERATIONS
-	LD	C,PPIDE_IO_DATALO	; SETUP C WITH IO PORT (LSB)
+	LD	C,(IY+PPIDE_DATALO)	; SETUP C WITH IO PORT (LSB)
 ;
 #IF (!PPIDE8BIT)
 	INC	C			; PRE-INCREMENT C
@@ -825,10 +856,12 @@ PPIDE_PUTBUF1:	; START OF READ LOOP
 	INC	C
 #ENDIF
 	OUTI
-	LD	A,D			; ASSERT WRITE
-	OUT	(PPIDE_IO_CTL),A	; DO IT
-	LD	A,E			; DEASSERT WRITE
-	OUT	(PPIDE_IO_CTL),A	; DO IT
+	PUSH	BC
+	LD	C,(IY+PPIDE_CTL)	; ASSERT WRITE
+	OUT	(C),D			; DO IT
+	LD	C,(IY+PPIDE_CTL)	; DEASSERT WRITE
+	OUT	(C),E			; DO IT
+	POP	BC
 ;
 	JR	NZ,PPIDE_PUTBUF1	; LOOP UNTIL DONE
 	RET
@@ -860,17 +893,26 @@ PPIDE_GETRES:
 ;
 PPIDE_RESET:
 ;
+	PUSH	BC
+
 	; SETUP PPI TO READ
+	LD	C,(IY+PPIDE_PPI)	;;
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ
-	OUT	(PPIDE_IO_PPI),A	; DO IT
-;
+	OUT	(C),A			; DO IT
+
 	; PULSE IDE RESET LINE
+	LD	C,(IY+PPIDE_CTL)
 	LD	A,PPIDE_CTL_RESET
-	OUT	(PPIDE_IO_CTL),A
+	OUT	(C),A	
+;
 	LD	DE,20
 	CALL	VDELAY
-	XOR	A
-	OUT	(PPIDE_IO_CTL),A
+;
+	XOR	A			
+	OUT	(C),A	
+;;	OUT	(C),0
+;;	.DB	$ED,$71
+;
 	LD	DE,20
 	CALL	VDELAY
 ;
@@ -909,6 +951,7 @@ PPIDE_RESET1:
 	DJNZ	PPIDE_RESET1		; LOOP AS NEEDED
 ;
 	POP	IY			; RECOVER DEVICE CFG PTR
+	POP	BC
 ;
 	XOR	A			; SIGNAL SUCCESS
 	RET				; AND DONE
@@ -973,9 +1016,13 @@ PPIDE_PROBE:
 	; RETURN SOMETHING OTHER THAN ZERO.  IF AN IDE CONTROLLER IS
 	; THERE, THEN THE VALUE WRITTEN TO PPI PORT A IS IGNORED
 	; BECAUSE THE WRITE SIGNAL IS NEVER PULSED.
-	XOR	A
-	OUT	(PPIDE_IO_DATALO),A
-;	IN	A,(PPIDE_REG_STAT)	; GET STATUS
+;
+	LD	C,(IY+PPIDE_DATALO)
+	XOR	A		
+	OUT	(C),A
+;;	OUT	(C),0
+;;	.DB	$ED,$71
+;
 	CALL	PPIDE_IN
 	.DB	PPIDE_REG_STAT
 	DCALL	PC_SPACE
@@ -1207,48 +1254,61 @@ PPIDE_WAITBSY2:
 ;
 ;
 ;
-PPIDE_IN:
+PPIDE_IN:				; IY POINT TO CURRENT CFG TABLE
+	PUSH	BC			; SAVE INCOMING BC			; 11TS
+	LD	C,(IY+PPIDE_PPI)	;					; 19TS
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ	; 7TS
-	OUT	(PPIDE_IO_PPI),A	; DO IT					; 11TS
+	OUT	(C),A			; DO IT					; 12TS
+	POP	BC			; RECOVER INCOMING BC			; 10TS
 	EX	(SP),HL			; GET PARM POINTER			; 19TS
+;
 	PUSH	BC			; SAVE INCOMING BC			; 11TS
 	LD	B,(HL)			; GET CTL PORT VALUE			; 7TS
-	LD	C,PPIDE_IO_CTL		; SETUP PORT TO WRITE			; 7TS
+	LD	C,(IY+PPIDE_CTL)	; SETUP PORT TO WRITE			; 19TS
 	OUT	(C),B			; SET ADDRESS LINES			; 12TS
 	SET	6,B			; TURN ON WRITE BIT			; 8TS
 	OUT	(C),B			; ASSERT WRITE LINE			; 12TS
-	;NOP
-	;NOP
-	IN	A,(PPIDE_IO_DATALO)	; GET DATA VALUE FROM DEVICE		; 11TS
-	;NOP
-	;NOP
+	 ;NOP
+	 ;NOP
+	LD	C,(IY+PPIDE_DATALO)	;					; 19TS
+	IN	A,(C)			; GET DATA VALUE FROM DEVICE		; 12TS
+	 ;NOP
+	 ;NOP
 	RES	6,B			; CLEAR WRITE BIT			; 8TS
+	LD	C,(IY+PPIDE_CTL)						; 19TS
 	OUT	(C),B			; DEASSERT WRITE LINE			; 12TS
 	POP	BC			; RECOVER INCOMING BC			; 10TS
 	INC	HL			; POINT PAST PARM			; 6TS
 	EX	(SP),HL			; RESTORE STACK				; 19TS
 	RET									; 10TS
 ;										; -----
-;										; 170TS
+;										; 243TS      WAS 170TS
+;										; -----
+; OUTPUT A TO 										
 ;
-PPIDE_OUT:
-	PUSH	AF			; PRESERVE INCOMING VALUE
-	LD	A,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
-	OUT	(PPIDE_IO_PPI),A	; DO IT
-	POP	AF			; RECOVER VALUE TO WRITE
+PPIDE_OUT:				; IY POINT TO CURRENT CFG TABLE
+	PUSH	BC			; SAVE INCOMING BC
+	LD	C,(IY+PPIDE_PPI)
+	LD	B,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
+	OUT	(C),B			; DO IT
+	POP	BC			;;
 	EX	(SP),HL			; GET PARM POINTER
+
 	PUSH	BC			; SAVE INCOMING BC
 	LD	B,(HL)			; GET IDE ADDRESS VALUE
-	LD	C,PPIDE_IO_CTL		; SETUP PORT TO WRITE
+	LD	C,(IY+PPIDE_CTL)	; SETUP PORT TO WRITE
+;
 	OUT	(C),B			; SET ADDRESS LINES
 	SET	5,B			; TURN ON WRITE BIT
 	OUT	(C),B			; ASSERT WRITE LINE
-	;NOP
-	;NOP
-	OUT	(PPIDE_IO_DATALO),A	; SEND DATA VALUE TO DEVICE
-	;NOP
-	;NOP
+	 ;NOP
+	 ;NOP
+	LD	C,(IY+PPIDE_DATALO)	;;
+	OUT	(C),A			; SEND DATA VALUE TO DEVICE
+	 ;NOP
+	 ;NOP
 	RES	5,B			; CLEAR WRITE BIT
+	LD	C,(IY+PPIDE_CTL)
 	OUT	(C),B			; DEASSERT WRITE LINE
 	POP	BC			; RECOVER INCOMING BC
 	INC	HL			; POINT PAST PARM
@@ -1354,29 +1414,42 @@ PPIDE_PRTSTAT3:
 ; PRINT ALL REGISTERS DIRECTLY FROM DEVICE
 ; DEVICE MUST BE SELECTED PRIOR TO CALL
 ;
+;
+; PRINT ALL REGISTERS DIRECTLY FROM DEVICE
+; DEVICE MUST BE SELECTED PRIOR TO CALL
+;
 PPIDE_REGDUMP:
 	PUSH	AF
 	PUSH	BC
+	PUSH	DE
 	CALL	PC_SPACE
 	CALL	PC_LBKT
+	LD	C,(IY+PPIDE_PPI)	;
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ
-	OUT	(PPIDE_IO_PPI),A	; DO IT
-	LD	C,PPIDE_REG_CMD
-	LD	B,7
+	OUT	(C),A			; DO IT
+	LD	E,PPIDE_REG_CMD
+	LD	D,7
 PPIDE_REGDUMP1:
-	LD	A,C			; REGISTER ADDRESS
-	OUT	(PPIDE_IO_CTL),A	; SET IT
+	LD	A,E			; REGISTER ADDRESS
+	LD	C,(IY+PPIDE_CTL)
+	OUT	(C),A			; SET IT
 	XOR	PPIDE_CTL_DIOR		; SET BIT TO ASSERT READ LINE
-	OUT	(PPIDE_IO_CTL),A	; ASSERT READ
-	IN	A,(PPIDE_IO_DATALO)	; GET VALUE
+	OUT	(C),A			; ASSERT READ
+;
+	LD	C,(IY+PPIDE_DATALO)
+	IN	A,(C)			; GET VALUE
 	CALL	PRTHEXBYTE		; DISPLAY IT
-	LD	A,C			; RELOAD ADDRESS W/ READ UNASSERTED
-	OUT	(PPIDE_IO_CTL),A	; AND SET IT
-	DEC	C			; NEXT LOWER REGISTER
-	DEC	B			; DEC LOOP COUNTER
+;
+	LD	A,E			; 
+	LD	C,(IY+PPIDE_CTL)	; RELOAD ADDRESS W/ READ UNASSERTED
+	OUT	(C),E
+;
+	DEC	E			; NEXT LOWER REGISTER
+	DEC	D			; DEC LOOP COUNTER
 	CALL	NZ,PC_SPACE		; FORMATTING
 	JR	NZ,PPIDE_REGDUMP1	; LOOP AS NEEDED
 	CALL	PC_RBKT			; FORMATTING
+	POP	DE
 	POP	BC
 	POP	AF
 	RET