From 1ff1a70bfb43be95c1c8db634d26425f932ff883 Mon Sep 17 00:00:00 2001 From: b1ackmai1er Date: Sat, 23 Nov 2019 17:31:16 +0800 Subject: [PATCH 1/5] Collection of minors --- Source/Forth/camel80.azm | 8 ++++---- Source/Forth/camel80h.azm | 4 ++-- Source/Images/ReadMe.txt | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/Source/Forth/camel80.azm b/Source/Forth/camel80.azm index a2ce8acf..c74af4fc 100644 --- a/Source/Forth/camel80.azm +++ b/Source/Forth/camel80.azm @@ -1,5 +1,5 @@ CIODEV_CONSOLE EQU 0D0h -CIOIN EQU 00h ; CHARACTER INPPUT +CIOIN EQU 00h ; CHARACTER INPUT CIOOUT EQU 01h ; CHARACTER OUTPUT CIOIST EQU 02h ; CHARACTER INPUT STATUS BID_BOOT EQU 00h @@ -35,7 +35,7 @@ FTH_LOC EQU 0200h ; ; =============================================== ; CAMEL80.AZM: Code Primitives -; Source code is for the Z80MR macro assembler. +; Source code is for the ZSM assembler. ; Forth words are documented as follows: ;x NAME stack -- stack description ; where x=C for ANS Forth Core words, X for ANS @@ -126,12 +126,12 @@ nexthl MACRO ENDM ; RESET AND INTERRUPT VECTORS =================== -; ...are not used in the CP/M implementation +; ...are not used in the ROMWBW implementation ; Instead, we have the... ; RELOCATED ENTRY POINT - .PHASE 0200H + .PHASE FTH_LOC reset: ld hl,0FDFFh ; HBIOS address, rounded down ld l,0 ; = end of avail.mem (EM) diff --git a/Source/Forth/camel80h.azm b/Source/Forth/camel80h.azm index d7a7c481..85990346 100644 --- a/Source/Forth/camel80h.azm +++ b/Source/Forth/camel80h.azm @@ -23,7 +23,7 @@ ; ; =============================================== ; CAMEL80H.AZM: High Level Words -; Source code is for the Z80MR macro assembler. +; Source code is for the ZSM assembler. ; Forth words are documented as follows: ;* NAME stack -- stack description ; Word names in upper case are from the ANS @@ -1023,5 +1023,5 @@ DOTS2: DW EXIT DB 55,'Z80 CamelForth v1.02 25 Jan 1995, ROMWBW 19 Oct 2019' DB 0dh,0ah DW TYPE,ABORT ; ABORT never returns -; DON'T FORGET TO UPDATE THE BYTE COUNT IF YOU CHANCGE THE SIZE OF THE BOOT MSG +; DON'T FORGET TO UPDATE THE BYTE COUNT IF YOU CHANGE THE SIZE OF THE BOOT MSG diff --git a/Source/Images/ReadMe.txt b/Source/Images/ReadMe.txt index b984e4a4..2bce9386 100644 --- a/Source/Images/ReadMe.txt +++ b/Source/Images/ReadMe.txt @@ -200,7 +200,7 @@ then use the COPYSYS command to make the desired drive bootable. You would use a command like the following to make drive C bootable. - | B>COPYSYS C:=CPM.SYS + | B>SYSCOPY C:=CPM.SYS Notes ----- From c6e6ed89dc5eea627d1869665c13143d38652339 Mon Sep 17 00:00:00 2001 From: b1ackmai1er Date: Sat, 23 Nov 2019 22:55:30 +0800 Subject: [PATCH 2/5] minor --- Source/Images/ReadMe.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Source/Images/ReadMe.txt b/Source/Images/ReadMe.txt index 2bce9386..23d9f66c 100644 --- a/Source/Images/ReadMe.txt +++ b/Source/Images/ReadMe.txt @@ -196,7 +196,7 @@ choice best left to the user. The simplest way to make a resultant image bootable is to do it from your running CP/M system. Boot your system using the ROM selection, -then use the COPYSYS command to make the desired drive bootable. +then use the SYSCOPY command to make the desired drive bootable. You would use a command like the following to make drive C bootable. From 7917a0143abbed780f8c604aaae59fc8474d2cb0 Mon Sep 17 00:00:00 2001 From: b1ackmai1er Date: Sun, 24 Nov 2019 20:49:51 +0800 Subject: [PATCH 3/5] ecb-sbc-v2 ecb-zp ctc timer support --- Source/HBIOS/cfg_sbc.asm | 1 + Source/HBIOS/hbios.asm | 67 +++++++++++++++++++++++++++++++++++++--- 2 files changed, 63 insertions(+), 5 deletions(-) diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 7576fbe1..27de79c6 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -38,6 +38,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCBASE .EQU $80 ; CTC BASE FOR ECB-ZILOG-PERIPHERALS ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index b17a35ca..e3e0e75b 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -1071,16 +1071,62 @@ HB_CPU2: ; #IF (HTIMENABLE) ; SIMH TIMER ; - #IF (INTMODE == 1) + #IF (INTMODE == 1) LD HL,HB_TIMINT CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST #ENDIF + + #ENDIF + #IF (CTCENABLE) + #IF (INTMODE == 2) ; - #IF (INTMODE == 2) - ;LD HL,HB_TIMINT - ;LD (HBX_IVT),HL - #ENDIF + ; TIMER INTERRUPT IS ON CTCD, VECTOR IS FOURTH IVT SLOT + LD HL,HB_TIMINT ; TIMER INT HANDLER ADR + LD (IVT(INT_CTC0D)),HL ; IVT ENTRY FOR CTC0D ; + ; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR + ; EACH CHANNEL. BELOW WE SET THE BASE VECTOR TO THE + ; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE + ; IVT CORRESPOND TO CTC CHANNELS A-D + LD A,0 + OUT (CTCA),A ; SETUP CTC BASE INT VECTOR +; + ; ASSUMING ECB-ZP WITH 4.9125MHz XTAL AND / 8 DIVIDER + ; JUMPER X5 15-16, 9-11, X5 PIN 3 (PHI_X) TO X4 PIN 7 (CTC_TG2) + ; CONFIGURE CHANNEL D FOR 50HZ PERIODIC INTERRUPTS + ; CTC CLK = 614,400Hz + ; CTCD TIME CONSTANT = 48 + ; INT FREQ IS CTC CLK / CTCC TC / CTCD TC + ; WHICH IS 614,400HZ / 256 / 48 = 50HZ + LD A,%01010111 ; CTCC CONTROL WORD VALUE + ; |||||||+-- 1=CONTROL WORD FLAG + ; ||||||+--- 1=SOFTWARE RESET + ; |||||+---- 1=TIME CONSTANT FOLLOWS + ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED + ; |||+------ 1=RISING EDGE TRIGGER + ; ||+------- 1=PRESCALER OF 16 (NOT USED) + ; |+-------- 1=COUNTER MODE + ; +--------- 0=NO INTERRUPTS + OUT (CTCC),A ; SETUP CTCC + LD A,0 ; CTCC TIMER CONSTANT = 256, 0 MEANS 256 + OUT (CTCC),A ; SETUP CTCC TIMER CONSTANT + LD A,%11010111 ; CTCD CONTROL WORD VALUE + ; |||||||+-- 1=CONTROL WORD FLAG + ; ||||||+--- 1=SOFTWARE RESET + ; |||||+---- 1=TIME CONSTANT FOLLOWS + ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED + ; |||+------ 1=RISING EDGE TRIGGER + ; ||+------- 1=PRESCALER OF 16 (NOT USED) + ; |+-------- 1=COUNTER MODE + ; +--------- 1=ENABLE INTERRUPTS + OUT (CTCD),A ; SETUP CTCD + LD A,48 ; CTCD TIMER CONSTANT = 48 + OUT (CTCD),A ; SETUP CTCD TIMER CONSTANT + + #ELSE + .ECHO "*** ERROR: CTC REQUIRES INTMODE 2!!!\n" + !!! ; FORCE AN ASSEMBLY ERROR + #ENDIF #ENDIF ; #ENDIF @@ -1740,6 +1786,9 @@ HB_INITTBL: #IF (UFENABLE) .DW UF_INIT #ENDIF +#IF (CTCENABLE) + .DW CTC_INIT +#ENDIF ; HB_INITTBLLEN .EQU (($ - HB_INITTBL) / 2) ; @@ -3197,6 +3246,14 @@ SIZ_UF .EQU $ - ORG_UF .ECHO SIZ_UF .ECHO " bytes.\n" #ENDIF +#IF (CTCENABLE) +ORG_CTC .EQU $ + #INCLUDE "ctcstub.asm" +SIZ_CTC .EQU $ - ORG_CTC + .ECHO "CTC occupies " + .ECHO SIZ_CTC + .ECHO " bytes.\n" +#ENDIF ; #DEFINE USEDELAY #INCLUDE "util.asm" From e2f066492f90fd8a0a6e57bda0c9854cfbd4ba03 Mon Sep 17 00:00:00 2001 From: b1ackmai1er Date: Sun, 24 Nov 2019 20:51:39 +0800 Subject: [PATCH 4/5] Create ctcstub.asm --- Source/HBIOS/ctcstub.asm | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Source/HBIOS/ctcstub.asm diff --git a/Source/HBIOS/ctcstub.asm b/Source/HBIOS/ctcstub.asm new file mode 100644 index 00000000..4551502e --- /dev/null +++ b/Source/HBIOS/ctcstub.asm @@ -0,0 +1,20 @@ +;___CTC________________________________________________________________________________________________________________ +; +; Z80 CTC STUB +; +; DISPLAY CONFIGURATION DETAILS +;______________________________________________________________________________________________________________________ +; +CTC_INIT: ; MINIMAL INIT +CTC_PRTCFG: + ; ANNOUNCE PORT + CALL NEWLINE ; FORMATTING + PRTS("CTC$") ; FORMATTING +; LD A,(IY) ; DEVICE NUM +; CALL PRTDECB ; PRINT DEVICE NUM + PRTS(": IO=0x$") ; FORMATTING + LD A,CTCBASE ; GET BASE PORT + CALL PRTHEXBYTE ; PRINT BASE PORT +; + XOR A + RET From 6d22708b66beb645d72dc7e21304bb3484eef01c Mon Sep 17 00:00:00 2001 From: b1ackmai1er Date: Sun, 24 Nov 2019 21:18:08 +0800 Subject: [PATCH 5/5] ecb-sbc-v2 / ecb-zp ctc timer configuration Correct instructions on jumpering. --- Source/HBIOS/hbios.asm | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index e3e0e75b..0bc178c4 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -1086,13 +1086,15 @@ HB_CPU2: ; ; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR ; EACH CHANNEL. BELOW WE SET THE BASE VECTOR TO THE - ; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE + ; START OF THE IVT, SO THE FIRST FOUR ENTRIES OF THE ; IVT CORRESPOND TO CTC CHANNELS A-D LD A,0 OUT (CTCA),A ; SETUP CTC BASE INT VECTOR ; ; ASSUMING ECB-ZP WITH 4.9125MHz XTAL AND / 8 DIVIDER - ; JUMPER X5 15-16, 9-11, X5 PIN 3 (PHI_X) TO X4 PIN 7 (CTC_TG2) + ; JUMPER X5 15-16, 9-11 + ; JUMPER X5 PIN 3 (PHI_X) TO X4 PIN 7 (CTC_TG2) + ; JUMPER X4 PIN 8 (CTC_ZC2) TO X4 PIN 9 (CTC_TG3) ; CONFIGURE CHANNEL D FOR 50HZ PERIODIC INTERRUPTS ; CTC CLK = 614,400Hz ; CTCD TIME CONSTANT = 48