diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 2d53fc12..b5ed6377 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -916,6 +916,10 @@ HB_START:
 ;#ENDIF
 	LD	A,(RAMSIZE + RAMBIAS - 64) >> 2
 	OUT0	(Z180_CBR),A		; COMMON BASE = LAST (TOP) BANK
+
+	; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE)
+	LD	A,Z180_CNTR_DEF		; DIV 1280, 14KHZ @ 18MHZ CLK
+	OUT0	(Z180_CNTR),A	
 #ENDIF
 ;
 #ENDIF
diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm
index a45738ca..f9b92a2a 100644
--- a/Source/HBIOS/sd.asm
+++ b/Source/HBIOS/sd.asm
@@ -708,10 +708,26 @@ SD_IO:
 	LD	(SD_BLKCNT),A		; ... AND SAVE IT
 	OR	A			; SET FLAGS
 	RET	Z			; ZERO SECTOR I/O, RETURN W/ E=0 & A=0
+;
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
+	; CONSIDER CAPTURING CURRENT CNTR VALUE HERE AND USE IT
+	; IN SD_CSIO_DEF
+
+	; SET CSIO FOR HIGH SPEED OPERATION
+	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
+	CALL	DLY32			; WAIT A BIT MORE FOR FINAL BIT
+	XOR	A			; ZERO MEANS MAX SPEED
+	OUT0	(SD_CNTR),A		; NOW SET CSIO PORT
+	; HOOK RETURN TO RESTORE CSIO TO DEFAULT SPEED
+	LD	HL,SD_CSIO_DEF		; ROUTE RETURN
+	PUSH	HL			; ... THRU CSIO RESTORE
+#ENDIF
+;
 #IF (SDTRACE == 1)
 	LD	HL,SD_PRTERR		; SET UP SD_PRTERR
 	PUSH	HL			; ... TO FILTER ALL EXITS
 #ENDIF
+;
 	CALL	SD_SELUNIT		; HARDWARE SELECTION OF TARGET UNIT
 	RET	NZ			; ABORT ON ERROR
 	LD	A,(SD_CMDVAL)		; GET COMMAND VALUE
@@ -871,6 +887,10 @@ SD_INITCARD:
 ;
 	CALL	SD_CHKCD		; CHECK CARD DETECT
 	JP	Z,SD_NOMEDIA		; Z=NO MEDIA, HANDLE IF SO
+;
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
+	CALL	SD_CSIO_DEF		; ENSURE CSIO AT DEFAULT SPEED
+#ENDIF
 ;
 	; WAKE UP THE CARD, KEEP DIN HI (ASSERTED) AND /CS HI (DEASSERTED)
 	LD	B,$10	; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8)
@@ -916,9 +936,6 @@ SD_INITCARD3:
 	CALL	VDELAY			; CPU SPEED NORMALIZED DELAY
 	; SEND APP CMD INTRODUCER
 	CALL	SD_EXECACMD		; SEND APP COMMAND INTRODUCER
-;#IF (SDMODE == SDMODE_MT)
-;	CALL	NZ,SD_EXECACMD		; retry any fail
-;#ENDIF
 	CP	SD_STCMDERR		; COMMAND ERROR?
 	JR	Z,SD_INITCARD3A		; IF SO, TRY MMC CARD INIT
 	OR	A			; SET FLAGS
@@ -1039,14 +1056,16 @@ SD_INITCARD5:
 	CALL	SD_EXECCMDND		; EXEC COMMAND W/ NO DATA
 	RET	NZ			; ABORT ON ERROR
 
-#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
-	; PER SPEC, THE CARD SHOULD NOW BE ABLE TO HANDLE FULL SPEED OPERATION
-	; SO, FOR CSIO OPERATION, WE SET CSIO TO MAXIMUM SPEED
-	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
-	CALL	DLY32			; WAIT A BIT MORE FOR FINAL BIT
-	XOR	A			; ZERO MEANS MAX SPEED
-	OUT	(Z180_CNTR),A		; NOW SET CSIO PORT
-#ENDIF
+; HIGH SPEED CSIO OPERATION IS NOW SET AT THE START OF SD_IO
+;
+;#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
+;	; PER SPEC, THE CARD SHOULD NOW BE ABLE TO HANDLE FULL SPEED OPERATION
+;	; SO, FOR CSIO OPERATION, WE SET CSIO TO MAXIMUM SPEED
+;	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
+;	CALL	DLY32			; WAIT A BIT MORE FOR FINAL BIT
+;	XOR	A			; ZERO MEANS MAX SPEED
+;	OUT0	(SD_CNTR),A		; NOW SET CSIO PORT
+;#ENDIF
 ;
 	; ISSUE SEND_CSD (TO DERIVE CARD CAPACITY)
 	LD	A,SD_CMD_SEND_CSD	; SEND_CSD
@@ -1808,11 +1827,11 @@ SD_GET:
 #ELSE
   #IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
 	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
-	IN0	A,(Z180_CNTR)		; GET CSIO STATUS
+	IN0	A,(SD_CNTR)		; GET CSIO STATUS
 	SET	5,A			; START RECEIVER
-	OUT0	(Z180_CNTR),A
+	OUT0	(SD_CNTR),A
 	CALL	SD_WAITRX
-	IN0	A,(Z180_TRDR)		; GET RECEIVED BYTE
+	IN0	A,(SD_TRDR)		; GET RECEIVED BYTE
 	CALL	MIRROR			; MSB<-->LSB MIRROR BITS
 	LD	A,C			; KEEP RESULT
   #ELSE
@@ -1849,6 +1868,23 @@ SD_GET1:
 #ENDIF
 	RET
 ;
+; SET CSIO TO DEFAULT SPEED
+;
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
+;
+SD_CSIO_DEF:
+	; SET CSIO FOR DEFAULT OPERATION
+	PUSH	AF			; PRESERVE AF
+	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
+	CALL	DLY32			; WAIT A BIT MORE FOR FINAL BIT
+	LD	A,Z180_CNTR_DEF		; DIV 1280, 14KHZ @ 18MHZ CLK
+	OUT0	(SD_CNTR),A		; DO IT
+	POP	AF			; RESTORE AF
+	RET
+;
+#ENDIF
+;
+;
 ;=============================================================================
 ; ERROR HANDLING AND DIAGNOSTICS
 ;=============================================================================
diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm
index 90478171..7a57020e 100644
--- a/Source/HBIOS/std.asm
+++ b/Source/HBIOS/std.asm
@@ -543,6 +543,16 @@ INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B
 #DEFINE VEC(INTX) INTX*2
 
 #ENDIF
+
+; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE)
+; DIV 1280, 14KHZ @ 18MHZ CLK
+
+#IF (BIOS == BIOS_WBW)
+  #IF (CPUFAM == CPU_Z180)
+Z180_CNTR_DEF	.EQU	$06	; DEFAULT VALUE FOR Z180 CSIO CONFIG
+  #ENDIF
+#ENDIF
+
 ;
 ; HELPER MACROS
 ;
diff --git a/Source/ver.inc b/Source/ver.inc
index dcb9a35d..c328bb6f 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.23"
+#DEFINE BIOSVER	"3.1.1-pre.24"
diff --git a/Source/ver.lib b/Source/ver.lib
index eebdbd43..09a3a0df 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.23"
+	db	"3.1.1-pre.24"
 	endm