From 890119db3c49944b72636ef09c3d3a5e727f6b5d Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sat, 26 Dec 2020 10:46:29 -0800 Subject: [PATCH 1/3] Update sd.asm Fix for Issue #170. Correct use of OUT to OUT0 during CSIO speed change. Credit to Douglas Miller for finding this bug. Co-Authored-By: Douglas Miller <16920069+durgadas311@users.noreply.github.com> --- Source/HBIOS/sd.asm | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm index a45738ca..16c589d9 100644 --- a/Source/HBIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -1045,7 +1045,7 @@ SD_INITCARD5: CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING CALL DLY32 ; WAIT A BIT MORE FOR FINAL BIT XOR A ; ZERO MEANS MAX SPEED - OUT (Z180_CNTR),A ; NOW SET CSIO PORT + OUT0 (Z180_CNTR),A ; NOW SET CSIO PORT #ENDIF ; ; ISSUE SEND_CSD (TO DERIVE CARD CAPACITY) From a2c2ed0aefa8928304fd1e7f56e9762502284159 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sat, 26 Dec 2020 11:58:31 -0800 Subject: [PATCH 2/3] Global Initialization of Z180 CSIO Initialize CSIO speed at system startup. A constant called Z180_CNTR_DEF has been created to hold the default value. This value can be used by drivers to restore the default value after modification. --- Source/HBIOS/hbios.asm | 4 ++++ Source/HBIOS/sd.asm | 8 ++++---- Source/HBIOS/std.asm | 8 ++++++++ 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 2d53fc12..f7005d7c 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -916,6 +916,10 @@ HB_START: ;#ENDIF LD A,(RAMSIZE + RAMBIAS - 64) >> 2 OUT0 (Z180_CBR),A ; COMMON BASE = LAST (TOP) BANK + + ; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE) + LD A,Z180_CNTR_DEF ; DIV 1280, 14KHZ @ 18MHZ CLK + OUT0 (SD_CNTR),A #ENDIF ; #ENDIF diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm index 16c589d9..4cfd5e27 100644 --- a/Source/HBIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -1045,7 +1045,7 @@ SD_INITCARD5: CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING CALL DLY32 ; WAIT A BIT MORE FOR FINAL BIT XOR A ; ZERO MEANS MAX SPEED - OUT0 (Z180_CNTR),A ; NOW SET CSIO PORT + OUT0 (SD_CNTR),A ; NOW SET CSIO PORT #ENDIF ; ; ISSUE SEND_CSD (TO DERIVE CARD CAPACITY) @@ -1808,11 +1808,11 @@ SD_GET: #ELSE #IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC)) CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING - IN0 A,(Z180_CNTR) ; GET CSIO STATUS + IN0 A,(SD_CNTR) ; GET CSIO STATUS SET 5,A ; START RECEIVER - OUT0 (Z180_CNTR),A + OUT0 (SD_CNTR),A CALL SD_WAITRX - IN0 A,(Z180_TRDR) ; GET RECEIVED BYTE + IN0 A,(SD_TRDR) ; GET RECEIVED BYTE CALL MIRROR ; MSB<-->LSB MIRROR BITS LD A,C ; KEEP RESULT #ELSE diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index 90478171..cc58bcf6 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -543,6 +543,14 @@ INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B #DEFINE VEC(INTX) INTX*2 #ENDIF + +; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE) +; DIV 1280, 14KHZ @ 18MHZ CLK + +#IF (CPUFAM == CPU_Z180) +Z180_CNTR_DEF .EQU $06 ; DEFAULT VALUE FOR Z180 CSIO CONFIG +#ENDIF + ; ; HELPER MACROS ; From af2639ef426073b94c2c6b5c0b764847bb760f2a Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sat, 26 Dec 2020 17:36:33 -0800 Subject: [PATCH 3/3] Enhance CSIO handling in sd.asm Enhance CSIO to play nice(r) with other users of Z180 CSIO by restoring the CSIO speed to default upon function return. --- Source/HBIOS/hbios.asm | 2 +- Source/HBIOS/sd.asm | 58 ++++++++++++++++++++++++++++++++++-------- Source/HBIOS/std.asm | 4 ++- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 5 files changed, 53 insertions(+), 15 deletions(-) diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index f7005d7c..b5ed6377 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -919,7 +919,7 @@ HB_START: ; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE) LD A,Z180_CNTR_DEF ; DIV 1280, 14KHZ @ 18MHZ CLK - OUT0 (SD_CNTR),A + OUT0 (Z180_CNTR),A #ENDIF ; #ENDIF diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm index 4cfd5e27..f9b92a2a 100644 --- a/Source/HBIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -708,10 +708,26 @@ SD_IO: LD (SD_BLKCNT),A ; ... AND SAVE IT OR A ; SET FLAGS RET Z ; ZERO SECTOR I/O, RETURN W/ E=0 & A=0 +; +#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC)) + ; CONSIDER CAPTURING CURRENT CNTR VALUE HERE AND USE IT + ; IN SD_CSIO_DEF + + ; SET CSIO FOR HIGH SPEED OPERATION + CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING + CALL DLY32 ; WAIT A BIT MORE FOR FINAL BIT + XOR A ; ZERO MEANS MAX SPEED + OUT0 (SD_CNTR),A ; NOW SET CSIO PORT + ; HOOK RETURN TO RESTORE CSIO TO DEFAULT SPEED + LD HL,SD_CSIO_DEF ; ROUTE RETURN + PUSH HL ; ... THRU CSIO RESTORE +#ENDIF +; #IF (SDTRACE == 1) LD HL,SD_PRTERR ; SET UP SD_PRTERR PUSH HL ; ... TO FILTER ALL EXITS #ENDIF +; CALL SD_SELUNIT ; HARDWARE SELECTION OF TARGET UNIT RET NZ ; ABORT ON ERROR LD A,(SD_CMDVAL) ; GET COMMAND VALUE @@ -871,6 +887,10 @@ SD_INITCARD: ; CALL SD_CHKCD ; CHECK CARD DETECT JP Z,SD_NOMEDIA ; Z=NO MEDIA, HANDLE IF SO +; +#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC)) + CALL SD_CSIO_DEF ; ENSURE CSIO AT DEFAULT SPEED +#ENDIF ; ; WAKE UP THE CARD, KEEP DIN HI (ASSERTED) AND /CS HI (DEASSERTED) LD B,$10 ; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8) @@ -916,9 +936,6 @@ SD_INITCARD3: CALL VDELAY ; CPU SPEED NORMALIZED DELAY ; SEND APP CMD INTRODUCER CALL SD_EXECACMD ; SEND APP COMMAND INTRODUCER -;#IF (SDMODE == SDMODE_MT) -; CALL NZ,SD_EXECACMD ; retry any fail -;#ENDIF CP SD_STCMDERR ; COMMAND ERROR? JR Z,SD_INITCARD3A ; IF SO, TRY MMC CARD INIT OR A ; SET FLAGS @@ -1039,14 +1056,16 @@ SD_INITCARD5: CALL SD_EXECCMDND ; EXEC COMMAND W/ NO DATA RET NZ ; ABORT ON ERROR -#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC)) - ; PER SPEC, THE CARD SHOULD NOW BE ABLE TO HANDLE FULL SPEED OPERATION - ; SO, FOR CSIO OPERATION, WE SET CSIO TO MAXIMUM SPEED - CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING - CALL DLY32 ; WAIT A BIT MORE FOR FINAL BIT - XOR A ; ZERO MEANS MAX SPEED - OUT0 (SD_CNTR),A ; NOW SET CSIO PORT -#ENDIF +; HIGH SPEED CSIO OPERATION IS NOW SET AT THE START OF SD_IO +; +;#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC)) +; ; PER SPEC, THE CARD SHOULD NOW BE ABLE TO HANDLE FULL SPEED OPERATION +; ; SO, FOR CSIO OPERATION, WE SET CSIO TO MAXIMUM SPEED +; CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING +; CALL DLY32 ; WAIT A BIT MORE FOR FINAL BIT +; XOR A ; ZERO MEANS MAX SPEED +; OUT0 (SD_CNTR),A ; NOW SET CSIO PORT +;#ENDIF ; ; ISSUE SEND_CSD (TO DERIVE CARD CAPACITY) LD A,SD_CMD_SEND_CSD ; SEND_CSD @@ -1849,6 +1868,23 @@ SD_GET1: #ENDIF RET ; +; SET CSIO TO DEFAULT SPEED +; +#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC)) +; +SD_CSIO_DEF: + ; SET CSIO FOR DEFAULT OPERATION + PUSH AF ; PRESERVE AF + CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING + CALL DLY32 ; WAIT A BIT MORE FOR FINAL BIT + LD A,Z180_CNTR_DEF ; DIV 1280, 14KHZ @ 18MHZ CLK + OUT0 (SD_CNTR),A ; DO IT + POP AF ; RESTORE AF + RET +; +#ENDIF +; +; ;============================================================================= ; ERROR HANDLING AND DIAGNOSTICS ;============================================================================= diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index cc58bcf6..7a57020e 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -547,8 +547,10 @@ INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B ; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE) ; DIV 1280, 14KHZ @ 18MHZ CLK -#IF (CPUFAM == CPU_Z180) +#IF (BIOS == BIOS_WBW) + #IF (CPUFAM == CPU_Z180) Z180_CNTR_DEF .EQU $06 ; DEFAULT VALUE FOR Z180 CSIO CONFIG + #ENDIF #ENDIF ; diff --git a/Source/ver.inc b/Source/ver.inc index dcb9a35d..c328bb6f 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1.1-pre.23" +#DEFINE BIOSVER "3.1.1-pre.24" diff --git a/Source/ver.lib b/Source/ver.lib index eebdbd43..09a3a0df 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 1 rtp equ 0 biosver macro - db "3.1.1-pre.23" + db "3.1.1-pre.24" endm