Release Testing WIP

This commit is contained in:
Wayne Warthen
2025-02-08 17:35:51 -08:00
parent 874f1b999e
commit ae9b9f9c14
22 changed files with 61 additions and 30 deletions

View File

@@ -52,6 +52,7 @@ INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
HTIMENABLE .SET TRUE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .SET TRUE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
SSERENABLE .SET TRUE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG
SSERSTATUS .SET $6D ; SSER: STATUS PORT