From af00df9182945dd9716b43ef8f33e2dd9cbf0394 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Mon, 18 Dec 2023 13:04:50 -0800 Subject: [PATCH] Update CH Driver Port Config for RCBus Systems - Updated to standardize on 0x3E/0x3F for primary CH device and 0x3C/0x3D for secondary CH device. Both devices are optional and detected automatically. --- Source/HBIOS/cfg_epitx.asm | 8 ++++---- Source/HBIOS/cfg_master.asm | 8 ++++---- Source/HBIOS/cfg_mon.asm | 8 ++++---- Source/HBIOS/cfg_rcz180.asm | 10 +++++----- Source/HBIOS/cfg_rcz280.asm | 10 +++++----- Source/HBIOS/cfg_rcz80.asm | 8 ++++---- Source/HBIOS/cfg_scz180.asm | 10 +++++----- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 9 files changed, 33 insertions(+), 33 deletions(-) diff --git a/Source/HBIOS/cfg_epitx.asm b/Source/HBIOS/cfg_epitx.asm index 7bdfd511..446b096d 100644 --- a/Source/HBIOS/cfg_epitx.asm +++ b/Source/HBIOS/cfg_epitx.asm @@ -253,12 +253,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) -CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK -CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS -CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index 757ed6a0..004339a2 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -303,12 +303,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) -CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK -CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS -CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/cfg_mon.asm b/Source/HBIOS/cfg_mon.asm index 53217bde..92bff9fe 100644 --- a/Source/HBIOS/cfg_mon.asm +++ b/Source/HBIOS/cfg_mon.asm @@ -251,12 +251,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) -CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK -CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS -CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index e4e77189..5263d4a9 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -253,16 +253,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; -CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT +CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) -CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK -CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS -CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm index 5e59d62c..3b70b249 100644 --- a/Source/HBIOS/cfg_rcz280.asm +++ b/Source/HBIOS/cfg_rcz280.asm @@ -257,16 +257,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; -CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT +CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) -CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK -CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS -CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 5e5be2f9..ea4686b9 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -256,12 +256,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) -CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK -CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS -CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index 05180ef1..6ac906a9 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -247,16 +247,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; -CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT +CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) -CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS +CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2) +CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK -CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS -CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK +CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS +CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/ver.inc b/Source/ver.inc index b7399512..079c63fc 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,7 +2,7 @@ #DEFINE RMN 4 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.4.0-dev.34" +#DEFINE BIOSVER "3.4.0-dev.35" #define rmj RMJ #define rmn RMN #define rup RUP diff --git a/Source/ver.lib b/Source/ver.lib index 95eead44..1fc9eb4c 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 4 rup equ 0 rtp equ 0 biosver macro - db "3.4.0-dev.34" + db "3.4.0-dev.35" endm