ez80: use new firmware interface for w/s config settings

Source/HBIOS/cfg_rcez80.asm

@@ -45,17 +45,21 @@ MPGSEL_3	.EQU	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
 MPGENA		.EQU	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
 ;
 ; BUS TIMING FOR PAGED MEMORY ACCESS (CS3)
-EZ80_MEM_CYCLES	.EQU	3		; EZ80 CYCLES FOR MEMORY (1-15)
-EZ80_MEM_FREQ	.EQU	16000		; CALCULATE APPROPRIATE BUS CYCLES TO ACHIVE APPOX BUS FREQUENCY
-EZ80_MEM_MINCYC	.EQU	1		; EZ80 MINIMUM CYCLES FOR MEMORY WHEN CALCULATING FROM EZ80_MEM_FREQ
+EZ80_MEM_CYCLES	.EQU	3		; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_ASSIGN = EZ80WSMD_CYCLES
+EZ80_MEM_MIN_NS	.EQU	100		; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_ASSIGN = EZ80WSMD_CALC
+EZ80_MEM_WS	.EQU	5		; MEMORY WAIT STATES (0-7) TO APPLY, IF EZ80_ASSIGN = EZ80WSMD_WAIT
+EZ80_MEM_MIN_WS	.EQU	0		; MINIMUM WAIT STATES TO APPLY, IF EZ80_ASSIGN = EZ80WSMD_CALC
+
 ;
 ; BUS TIMING FOR EXTERNAL I/O ACCESS (CS2)
-EZ80_IO_CYCLES	.EQU	4		; EZ80 CYCLES FOR IO (1-15)
-EZ80_IO_FREQ	.EQU	5250		; CALCULATE APPROPRIATE BUS CYCLES TO ACHIVE APPOX BUS FREQUENCY
-EZ80_IO_MINCYC	.EQU	4		; EZ80 MINIMUM CYCLES FOR IO WHEN CALCULATING FROM EZ80_IO_FREQ
+EZ80_IO_CYCLES	.EQU	4		; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_ASSIGN = EZ80WSMD_CYCLES
+EZ80_IO_WS	.EQU	5		; IO WAIT STATES (0-7) TO APPLY, IF EZ80_ASSIGN = EZ80WSMD_WAIT
+EZ80_IO_MIN_NS	.EQU	320		; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_ASSIGN = EZ80WSMD_CALC
+EZ80_IO_MIN_WS	.EQU	6		; MINIMUM WAIT STATES TO APPLY, IF EZ80_ASSIGN = EZ80WSMD_CALC
+
+; APPLY CYCLES, W/S OR CALCULATE CYCLES BASED ON DESIRED PERIOD
+EZ80_ASSIGN	.EQU	EZ80WSMD_CALC	; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES|WAIT]
 ;
-; SELECT CYCLES, OR CALCULATE CYCLES BASED ON DESIRED FREQUENCY
-EZ80_ASSIGN	.EQU	0		; 0 -> USE FREQ, 1 -> USE CYCLES
 ;
 RTCIO		.EQU	$C0		; RTC LATCH REGISTER ADR
 ;

Source/HBIOS/ez80cpudrv.asm

@@ -46,22 +46,51 @@ EZ80_PREINIT:
 	LD	(CB_CPUKHZ), HL
 	LD	(HB_CPUOSC), HL
 
-#IF (EZ80_ASSIGN == 1)
-	LD	H, EZ80_MEM_CYCLES
+#IF (EZ80_ASSIGN == EZ80WSMD_CYCLES)
+	LD	L, EZ80_MEM_CYCLES
+	OR	$80
+	EZ80_UTIL_MEMTM_SET()
+	LD	A, L
+	LD	(EZ80_PLT_MEMWS), A
+
 	LD	L, EZ80_IO_CYCLES
-	EZ80_UTIL_SET_BUSTM()
-#ELSE
-	LD	HL, EZ80_MEM_FREQ
-	LD	DE, EZ80_IO_FREQ
-	EXX
-	LD	HL, EZ80_MEM_MINCYC << 8 | EZ80_IO_MINCYC
-	EXX
-	EZ80_UTIL_SET_BUSFQ()
+	OR	$80
+	EZ80_UTIL_IOTM_SET()
+	LD	A, L
+	LD	(EZ80_PLT_IOWS), A
+
+	RET
+#ENDIF
+
+#IF (EZ80_ASSIGN == EZ80WSMD_CALC)
+	LD	HL, EZ80_MEM_MIN_NS
+	LD	E, 0
+	EZ80_CPY_EHL_TO_UHL
+	LD	E, EZ80_MEM_MIN_WS
+	EZ80_UTIL_MEMTMFQ_SET
+	LD	A, L
+	LD	(EZ80_PLT_MEMWS), A
+
+	LD	HL, EZ80_IO_MIN_NS
+	LD	E, 0
+	EZ80_CPY_EHL_TO_UHL
+	LD	E, EZ80_IO_MIN_WS
+	EZ80_UTIL_IOTMFQ_SET
+
+	LD	A, L
+	LD	(EZ80_PLT_IOWS), A
 #ENDIF
-	LD	A, H
-	LD	(EZ80_PLT_C3CYL), A
+#IF (EZ80_ASSIGN == EZ80WSMD_WAIT)
+	LD	L, EZ80_MEM_WS
+	EZ80_UTIL_MEMTM_SET()
 	LD	A, L
-	LD	(EZ80_PLT_C2CYL), A
+	LD	(EZ80_PLT_MEMWS), A
+
+	LD	L, EZ80_IO_WS
+	EZ80_UTIL_IOTM_SET()
+	LD	A, L
+	LD	(EZ80_PLT_IOWS), A
+#ENDIF
 
 	LD	C, TICKFREQ
 	EZ80_TMR_SET_FREQTICK
@@ -69,12 +98,34 @@ EZ80_PREINIT:
 	RET
 
 EZ80_RPT_TIMINGS:
-	LD	A,(EZ80_PLT_C3CYL)
+	LD	A, (EZ80_PLT_MEMWS)
+	BIT	7, A
+	JR	NZ, EZ80_RPT_MCYC
+
+	CALL	PRTDECB
+	CALL	PRTSTRD
+	.TEXT	" MEM W/S, $"
+	JR	EZ80_RPT_IOTIMING
+
+EZ80_RPT_MCYC:
+	AND	$7F
 	CALL	PRTDECB
 	CALL	PRTSTRD
 	.TEXT	" MEM B/C, $"
 
-	LD	A,(EZ80_PLT_C2CYL)
+
+EZ80_RPT_IOTIMING:
+	LD	A, (EZ80_PLT_IOWS)
+	BIT	7, A
+	JR	NZ, EZ80_RPT_ICYC
+
+	CALL	PRTDECB
+	CALL	PRTSTRD
+	.TEXT	" I/O W/S$"
+	RET
+
+EZ80_RPT_ICYC:
+	AND	$7F
 	CALL	PRTDECB
 	CALL	PRTSTRD
 	.TEXT	" I/O B/C$"
@@ -129,10 +180,10 @@ PC_DASH:
 	LD	A, '-'
 	JP	PC_PRTCHR
 
-EZ80_PLT_C3CYL:
-	.DB	EZ80_MEM_CYCLES
-EZ80_PLT_C2CYL:
-	.DB	EZ80_IO_CYCLES
+EZ80_PLT_MEMWS:
+	.DB	EZ80_MEM_WS
+EZ80_PLT_IOWS:
+	.DB	EZ80_IO_WS
 
 EZ80_PLT_VERSION:
 	.DB	0, 0, 0, 0

Source/HBIOS/ez80instr.inc

@@ -17,6 +17,12 @@
   #DEFINE EZ80_UTIL_SET_BUSFQ 		XOR A \ LD B, 4 \ EZ80_FN
   #DEFINE EZ80_UTIL_GET_CPU_FQ 		XOR A \ LD B, 5 \ EZ80_FN
   #DEFINE EZ80_UTIL_DEBUG 		XOR A \ LD B, 7 \ EZ80_FN
+  #DEFINE EZ80_UTIL_MEMTM_SET 		XOR A \ LD B, 8 \ EZ80_FN
+  #DEFINE EZ80_UTIL_IOTM_SET 		XOR A \ LD B, 9 \ EZ80_FN
+  #DEFINE EZ80_UTIL_MEMTM_GET 		XOR A \ LD B, 10 \ EZ80_FN
+  #DEFINE EZ80_UTIL_IOTM_GET 		XOR A \ LD B, 11 \ EZ80_FN
+  #DEFINE EZ80_UTIL_MEMTMFQ_SET		XOR A \ LD B, 12 \ EZ80_FN
+  #DEFINE EZ80_UTIL_IOTMFQ_SET		XOR A \ LD B, 13 \ EZ80_FN
 
   #DEFINE EZ80_RTC_INIT 		LD A, 1 \ LD B, 0 \ EZ80_FN
   #DEFINE EZ80_RTC_GET_TIME 		LD A, 1	\ LD B, 1 \ EZ80_FN

Source/HBIOS/sn76489.asm

@@ -43,7 +43,7 @@ SN76489_PORT16_RIGHT	.EQU	(IO_SEGMENT*256) + SN76489_PORT_RIGHT
 
 #IF (CPUFAM == CPU_EZ80)
 ; The eZ80 configuration must have sufficient bus cycles configured for this driver
-; to work.  See the entries: (EZ80_ASSIGN and EZ80_IO_CYCLES or EZ80_IO_FREQ)
+; to work.  See the entries: (EZ80_ASSIGN and EZ80_IO_CYCLES, EZ80_IO_WS, EZ80_IO_MIN_NS)
 ;
 ; For CPU @ ~18Mhz, the eZ80 must have at least 4 Bus Cycles for I/O operations
 ; For CPU @ ~24Mhz, the eZ80 must have at least 5 Bus Cycles for I/O operations

Source/HBIOS/std.asm

@@ -548,6 +548,12 @@ SCSI_CMD_RDCAP		.EQU	$25
 SCSI_CMD_READ10		.EQU	$28
 SCSI_CMD_WRITE10	.EQU	$2A
 ;
+; EZ80 BUS MODES
+;
+EZ80WSMD_CALC	.EQU	0
+EZ80WSMD_CYCLES	.EQU	1
+EZ80WSMD_WAIT	.EQU	2
+;
 #INCLUDE "build.inc"		; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
 ;
 ; INCLUDE Z180 REGISTER DEFINITIONS