From af8385fba868a5a31a2b6c6285ec6747b4ecb211 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Wed, 15 Nov 2023 12:48:55 -0800 Subject: [PATCH] Fix IM1 Handling for Z180 - Credit to Dylan Hall - Z180 code failed to initialize interrupt vector registers for IM1 startup - Updated bad interrupt messaging to avoid interrupt stack overflow --- Source/HBIOS/acia.asm | 18 +++++++++++++++++- Source/HBIOS/hbios.asm | 10 ++++++---- Source/HBIOS/util.asm | 12 ++++++------ Source/ver.inc | 2 +- Source/ver.lib | 2 +- 5 files changed, 31 insertions(+), 13 deletions(-) diff --git a/Source/HBIOS/acia.asm b/Source/HBIOS/acia.asm index 92c9ce90..dd1900a8 100644 --- a/Source/HBIOS/acia.asm +++ b/Source/HBIOS/acia.asm @@ -178,10 +178,26 @@ ACIA1_INT: ; ACIA_INTRCV: ; CHECK TO SEE IF SOMETHING IS ACTUALLY THERE + CALL DELAY LD C,(IY+3) ; CMD/STAT PORT TO C IN A,(C) ; GET STATUS + LD B,A AND $01 ; ISOLATE READY BIT - RET Z ; IF NOT READY, RET W/ ZF SET (INT NOT HANDLED) + JR NZ,ACIA_INTRCV1 +; +#IF FALSE + CALL PC_LT + LD A,B + CALL PRTHEXBYTE + INC C + IN A,(C) + CALL PRTHEXBYTE + CALL PC_GT + OR $FF +#ENDIF +; + RET + ; ACIA_INTRCV1: ; RECEIVE CHARACTER INTO BUFFER diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index fdd3207f..6d76fa0c 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -2057,7 +2057,7 @@ HB_CPU3: LD A,(CB_CPUMHZ) ; CPU SPEED TO ACCUM AND INIT CALL DELAY_INIT ; .. SPEED COMPENSATED DELAY ; -#IF (INTMODE == 2) +#IF ((INTMODE == 2) | ((INTMODE == 1) & (CPUFAM == CPU_Z180))) ; SETUP Z80 IVT AND INT MODE 2 LD A,HBX_IVT >> 8 ; SETUP HI BYTE OF IVT ADDRESS LD I,A ; ... AND PLACE IT IN I REGISTER @@ -2068,7 +2068,9 @@ HB_CPU3: OUT0 (Z180_IL),A ; ... AND PLACE IN Z180 IL REGISTER #ENDIF + #IF (INTMODE == 2) IM 2 ; SWITCH TO INT MODE 2 + #ENDIF #ENDIF ; #IF (INTMODE == 3) @@ -5418,10 +5420,10 @@ HB_BADINTCNT .DB 0 LD A,L RRCA RRCA - CALL PRTHEXBYTE - PRTS("H: $") - + ;CALL PRTHEXBYTE + ;PRTS("H: $") CALL XREGDMP + CALL NEWLINE ;CALL CONTINUE OR $FF ; SIGNAL INTERRUPT HANDLED RET diff --git a/Source/HBIOS/util.asm b/Source/HBIOS/util.asm index 29e6c532..2496dd52 100644 --- a/Source/HBIOS/util.asm +++ b/Source/HBIOS/util.asm @@ -407,8 +407,8 @@ XREGDMP: LD (REGDMP_SP),SP ; SAVE STACK POINTER - ;LD (RD_STKSAV),SP ; SAVE ORIGINAL STACK POINTER - ;LD SP,RD_STACK ; SWITCH TO PRIVATE STACK + LD (RD_STKSAV),SP ; SAVE ORIGINAL STACK POINTER + LD SP,RD_STACK ; SWITCH TO PRIVATE STACK PUSH AF PUSH BC @@ -462,7 +462,7 @@ XREGDMP: POP BC POP AF - ;LD SP,(RD_STKSAV) ; BACK TO ORIGINAL STACK FRAME + LD SP,(RD_STKSAV) ; BACK TO ORIGINAL STACK FRAME JP $FFFF ; RETURN, $FFFF IS DYNAMICALLY UPDATED REGDMP_RET .EQU $-2 ; RETURN ADDRESS GOES HERE @@ -470,9 +470,9 @@ REGDMP_RET .EQU $-2 ; RETURN ADDRESS GOES HERE REGDMP_PC .DW 0 REGDMP_SP .DW 0 ; -;RD_STKSAV .DW 0 -; .FILL $FF,16*2 ; 16 LEVEL PRIVATE STACK -;RD_STACK .EQU $ +RD_STKSAV .DW 0 + .FILL $FF,16*2 ; 16 LEVEL PRIVATE STACK +RD_STACK .EQU $ ; ; ; diff --git a/Source/ver.inc b/Source/ver.inc index d0399649..43938e36 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,7 +2,7 @@ #DEFINE RMN 4 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.4.0-dev.17" +#DEFINE BIOSVER "3.4.0-dev.18" #define rmj RMJ #define rmn RMN #define rup RUP diff --git a/Source/ver.lib b/Source/ver.lib index ff1e48c9..e9e98711 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 4 rup equ 0 rtp equ 0 biosver macro - db "3.4.0-dev.17" + db "3.4.0-dev.18" endm