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  1. 2
      Applications/index.html
  2. 2
      Catalog/index.html
  3. 149
      Hardware/index.html
  4. 2
      Introduction/index.html
  5. 2
      SystemGuide/index.html
  6. 2
      UserGuide/index.html
  7. 4
      index.html
  8. 2
      search/search_index.json
  9. BIN
      sitemap.xml.gz

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Applications/index.html

@ -368,7 +368,7 @@
<p><strong>RomWBW Applications Guide</strong> \
Version 3.6 \
MartinR \&amp; Phillip Summers (<a href="mailto:"></a>) \
25 Nov 2025</p>
30 Nov 2025</p>
<h1 id="summary">Summary</h1>
<p>RomWBW is supplied with a suite of software applications that enhance
the use of the system. Some of these applications have been written

2
Catalog/index.html

@ -336,7 +336,7 @@
<p><strong>RomWBW Disk Catalog</strong> \
Version 3.6 \
Mark Pruden \&amp; Mykl Orders (<a href="mailto:"></a>) \
25 Nov 2025</p>
30 Nov 2025</p>
<h1 id="romwbw-distribution-file-catalog">RomWBW Distribution File Catalog</h1>
<p>This document is a reference to the files found on the disk media
distributed with RomWBW. Specifically, RomWBW provides a set of floppy

149
Hardware/index.html

@ -212,6 +212,10 @@
<ul class="nav flex-column">
</ul>
</li>
<li class="nav-item" data-bs-level="2"><a href="#n8-pc" class="nav-link">N8 PC</a>
<ul class="nav flex-column">
</ul>
</li>
<li class="nav-item" data-bs-level="2"><a href="#rcbus-z80" class="nav-link">RCBus Z80</a>
<ul class="nav flex-column">
<li class="nav-item" data-bs-level="3"><a href="#rcbus-z80-cpu-module" class="nav-link">RCBus Z80 CPU Module</a>
@ -396,7 +400,7 @@
<p><strong>RomWBW Hardware</strong> \
Version 3.6 \
Wayne Warthen (<a href="mailto:wwarthen@gmail.com">wwarthen@gmail.com</a>) \
25 Nov 2025</p>
30 Nov 2025</p>
<h1 id="overview">Overview</h1>
<h2 id="supported-platforms">Supported Platforms</h2>
<p>This section contains a summary of the system configuration target for
@ -737,6 +741,12 @@ external bank switching.</p>
<td style="text-align: right;">115200</td>
</tr>
<tr>
<td><a href="#n8-pc">N8 PC</a><sup>10</sup></td>
<td>ISA</td>
<td>N8PC_std.rom</td>
<td style="text-align: right;">38400</td>
</tr>
<tr>
<td><a href="#nabu-w-romwbw-option-board">NABU w/ RomWBW Option Board</a><sup>5</sup></td>
<td>NABU</td>
<td>NABU_std.rom</td>
@ -788,7 +798,8 @@ external bank switching.</p>
<sup>6</sup>Designed by Alan Cox<br />
<sup>7</sup>Designed by Doug Jackson<br />
<sup>8</sup>Designed by Dean Netherton<br />
<sup>9</sup>MSX Port by Henk Berends</p>
<sup>9</sup>MSX Port by Henk Berends<br />
<sup>10</sup>Designed by Dan Werner</p>
<h2 id="general-guidance">General Guidance</h2>
<p>The standard ROM images will detect and install support for certain
devices and peripherals that are on-board or frequently used with each
@ -2028,6 +2039,72 @@ additional boards are required.</p>
<ul>
<li>SD Card interface is configured for CSIO (N8 date code &gt;= 2312)</li>
</ul>
<h2 id="n8-pc">N8 PC</h2>
<p>This is a variant of the N8 computer.</p>
<ul>
<li>Creator: Dan Werner</li>
<li>Project GitHub: <a href="https://github.com/danwerner21/N8PC">N8 PC</a></li>
</ul>
<h4 id="rom-image-file-n8pc_stdrom">ROM Image File: N8PC_std.rom</h4>
<table>
<thead>
<tr>
<th></th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td>Bus</td>
<td>ISA</td>
</tr>
<tr>
<td>Default CPU Speed</td>
<td>9.216 MHz</td>
</tr>
<tr>
<td>Interrupts</td>
<td>None</td>
</tr>
<tr>
<td>System Timer</td>
<td>Z180</td>
</tr>
<tr>
<td>Serial Default</td>
<td>38400 Baud</td>
</tr>
<tr>
<td>Memory Manager</td>
<td>N8</td>
</tr>
<tr>
<td>ROM Size</td>
<td>512 KB</td>
</tr>
<tr>
<td>RAM Size</td>
<td>512 KB</td>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_16">Supported Hardware</h4>
<ul>
<li>PKD: IO=132, SIZE=8X1</li>
<li>M6242RTC: IO=160</li>
<li>ASCI: IO=64</li>
<li>ASCI: IO=65</li>
<li>TMS: MODE=N8PC, IO=152, SCREEN=80X24, KEYBOARD=KBD</li>
<li>KBD: ENABLED</li>
<li>MD: TYPE=RAM</li>
<li>MD: TYPE=ROM</li>
<li>FD: MODE=N8, IO=140, DRIVE 0, TYPE=3.5” HD</li>
<li>FD: MODE=N8, IO=140, DRIVE 1, TYPE=3.5” HD</li>
<li>PPIDE: MODE=STD, IO=132, MASTER</li>
<li>PPIDE: MODE=STD, IO=132, SLAVE</li>
<li>AY38910: MODE=N8, IO=156, CLOCK=3579545 HZ</li>
</ul>
<h4 id="notes_6">Notes:</h4>
<h2 id="rcbus-z80">RCBus Z80</h2>
<h3 id="rcbus-z80-cpu-module">RCBus Z80 CPU Module</h3>
<p>Generic Rom Image.</p>
@ -2074,7 +2151,7 @@ additional boards are required.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_16">Supported Hardware</h4>
<h4 id="supported-hardware_17">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -2147,7 +2224,7 @@ additional boards are required.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_17">Supported Hardware</h4>
<h4 id="supported-hardware_18">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -2230,7 +2307,7 @@ single module, thus saving space on the backplane.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_18">Supported Hardware</h4>
<h4 id="supported-hardware_19">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -2317,7 +2394,7 @@ of the RAM is reserved to act as ROM.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_19">Supported Hardware</h4>
<h4 id="supported-hardware_20">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -2401,7 +2478,7 @@ layout. The intent to replace the STD config with the RAM config.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_20">Supported Hardware</h4>
<h4 id="supported-hardware_21">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -2483,7 +2560,7 @@ specifically for ROM-less RomWBW. HBIOS is loaded from disk at boot</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_21">Supported Hardware</h4>
<h4 id="supported-hardware_22">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -2606,7 +2683,7 @@ to RAM location \$0000, which in turn starts execution of RomWBW.</p>
decompression program is stored.</p>
</li>
</ul>
<h4 id="supported-hardware_22">Supported Hardware</h4>
<h4 id="supported-hardware_23">Supported Hardware</h4>
<ul>
<li>DSRTC: MODE=STD, IO=192</li>
<li>SIO MODE=STD, IO=8, CHANNEL A, INTERRUPTS ENABLED</li>
@ -2669,7 +2746,7 @@ replacing the older K80W rev 1</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_23">Supported Hardware</h4>
<h4 id="supported-hardware_24">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -2745,7 +2822,7 @@ external memory management)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_24">Supported Hardware</h4>
<h4 id="supported-hardware_25">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>DSRTC: MODE=STD, IO=12</li>
@ -2820,7 +2897,7 @@ management)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_25">Supported Hardware</h4>
<h4 id="supported-hardware_26">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>DSRTC: MODE=STD, IO=12</li>
@ -2905,7 +2982,7 @@ RomWBW image from CF disk, then start RomWBW from 0x0</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_26">Supported Hardware</h4>
<h4 id="supported-hardware_27">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>DSRTC: MODE=STD, IO=12</li>
@ -2980,7 +3057,7 @@ external memory management)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_27">Supported Hardware</h4>
<h4 id="supported-hardware_28">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -3056,7 +3133,7 @@ management)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_28">Supported Hardware</h4>
<h4 id="supported-hardware_29">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -3146,7 +3223,7 @@ of the RAM is reserved to act as ROM.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_29">Supported Hardware</h4>
<h4 id="supported-hardware_30">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -3230,7 +3307,7 @@ layout. The intent to replace the STD config with the RAM config.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_30">Supported Hardware</h4>
<h4 id="supported-hardware_31">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -3314,7 +3391,7 @@ EPROM for other computers</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_31">Supported Hardware</h4>
<h4 id="supported-hardware_32">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -3400,7 +3477,7 @@ available from the manufacturer today</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_32">Supported Hardware</h4>
<h4 id="supported-hardware_33">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>LCD: IO=218, SIZE=20X4</li>
@ -3473,7 +3550,7 @@ Graphics Display Controller</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_33">Supported Hardware</h4>
<h4 id="supported-hardware_34">Supported Hardware</h4>
<ul>
<li>DSRTC: MODE=STD, IO=132</li>
<li>ASCI: IO=64</li>
@ -3542,7 +3619,7 @@ slave as defined by the IEEE-696 specs.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_34">Supported Hardware</h4>
<h4 id="supported-hardware_35">Supported Hardware</h4>
<ul>
<li>INTRTC: ENABLED</li>
<li>PLDSER: IO=172</li>
@ -3561,7 +3638,7 @@ slave as defined by the IEEE-696 specs.</p>
<li>PPIDE: MODE=S100B, IO=48, SLAVE</li>
<li>SD: MODE=SC, IO=12, UNITS=1</li>
</ul>
<h4 id="notes_6">Notes:</h4>
<h4 id="notes_7">Notes:</h4>
<ul>
<li>Z180 SBC SW2 (IOBYTE) Dip Switches:</li>
</ul>
@ -3665,7 +3742,7 @@ system.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_35">Supported Hardware</h4>
<h4 id="supported-hardware_36">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=13, SWIO=0</li>
<li>DSRTC: MODE=STD, IO=12</li>
@ -3693,7 +3770,7 @@ system.</p>
<li>PPIDE: IO=32, SLAVE</li>
<li>SD: MODE=SC, IO=12, UNITS=1</li>
</ul>
<h4 id="notes_7">Notes:</h4>
<h4 id="notes_8">Notes:</h4>
<ul>
<li>When disabled, watchdog requires /IM to be pulsed. If an RCBus module
holds the CPU in WAIT for more than this, the watchdog will fire when
@ -3749,7 +3826,7 @@ RomWBW (and CP/M)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_36">Supported Hardware</h4>
<h4 id="supported-hardware_37">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0, SWIO=0</li>
<li>DSRTC: MODE=STD, IO=12</li>
@ -3827,7 +3904,7 @@ RomWBW (and CP/M)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_37">Supported Hardware</h4>
<h4 id="supported-hardware_38">Supported Hardware</h4>
<ul>
<li>INTRTC: ENABLED</li>
<li>ASCI: IO=192, INTERRUPTS ENABLED</li>
@ -3885,7 +3962,7 @@ RomWBW (and CP/M)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_38">Supported Hardware</h4>
<h4 id="supported-hardware_39">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=160, SWIO=160</li>
<li>DSRTC: MODE=STD, IO=12</li>
@ -3963,7 +4040,7 @@ RomWBW (and CP/M)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_39">Supported Hardware</h4>
<h4 id="supported-hardware_40">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=160, SWIO=160</li>
<li>DSRTC: MODE=STD, IO=12</li>
@ -4046,7 +4123,7 @@ RomWBW (and CP/M)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_40">Supported Hardware</h4>
<h4 id="supported-hardware_41">Supported Hardware</h4>
<ul>
<li>FP: LEDIO=0</li>
<li>LCD: IO=170, SIZE=20X4</li>
@ -4132,7 +4209,7 @@ presented by John’s Basement on youTube)</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_41">Supported Hardware</h4>
<h4 id="supported-hardware_42">Supported Hardware</h4>
<ul>
<li>SIO MODE=Z80R, IO=128, CHANNEL A, INTERRUPTS ENABLED</li>
<li>SIO MODE=Z80R, IO=128, CHANNEL B, INTERRUPTS ENABLED</li>
@ -4192,7 +4269,7 @@ compatible with N8VEM SBC and Disk I/O boards.</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_42">Supported Hardware</h4>
<h4 id="supported-hardware_43">Supported Hardware</h4>
<ul>
<li>DSRTC: MODE=STD, IO=112</li>
<li>UART: IO=104</li>
@ -4203,7 +4280,7 @@ compatible with N8VEM SBC and Disk I/O boards.</p>
<li>MD: TYPE=ROM</li>
<li>FD: MODE=DIO, IO=54, DRIVE 0, TYPE=3.5” HD</li>
</ul>
<h4 id="notes_8">Notes:</h4>
<h4 id="notes_9">Notes:</h4>
<ul>
<li>If ParPortProp is installed, initial console output is determined by
JP1:</li>
@ -4269,7 +4346,7 @@ is made using CMOS technology and more power efficient than FDC9266</p>
</tr>
</tbody>
</table>
<h4 id="supported-hardware_43">Supported Hardware</h4>
<h4 id="supported-hardware_44">Supported Hardware</h4>
<ul>
<li>DSRTC: MODE=STD, IO=112</li>
<li>UART: IO=104</li>
@ -4282,7 +4359,7 @@ is made using CMOS technology and more power efficient than FDC9266</p>
<li>CTC: IO=32, TIMER MODE=COUNTER, DIVISOR=18432, HI=256, LO=72,
INTERRUPTS ENABLED</li>
</ul>
<h4 id="notes_9">Notes:</h4>
<h4 id="notes_10">Notes:</h4>
<ul>
<li>If ParPortProp is installed, initial console output is determined by
JP1:</li>
@ -4638,6 +4715,10 @@ the active platform and configuration.</p>
<td>DS12RTC</td>
<td>Dallas Semiconductor DS1288x Real-Time Clock w/ NVRAM</td>
</tr>
<tr>
<td>M6242</td>
<td>MSM6242 Real-Time Clock (no NVRAM)</td>
</tr>
</tbody>
</table>
<h2 id="dsky-display-keypad">DsKy (DiSplay KeYpad)</h2>

2
Introduction/index.html

@ -189,7 +189,7 @@
<p><strong>RomWBW Introduction</strong> \
Version 3.6 \
Wayne Warthen (<a href="mailto:wwarthen@gmail.com">wwarthen@gmail.com</a>) \
25 Nov 2025</p>
30 Nov 2025</p>
<h1 id="overview">Overview</h1>
<p>RomWBW software provides a complete, commercial quality implementation
of CP/M (and work-alike) operating systems and applications for modern

2
SystemGuide/index.html

@ -659,7 +659,7 @@
<p><strong>RomWBW System Guide</strong> \
Version 3.6 \
Wayne Warthen (<a href="mailto:wwarthen@gmail.com">wwarthen@gmail.com</a>) \
25 Nov 2025</p>
30 Nov 2025</p>
<h1 id="overview">Overview</h1>
<p>The objective of RomWBW is to provide firmware, operating systems, and
applications targeting the Z80 family of CPUs. The firmware, in the form

2
UserGuide/index.html

@ -527,7 +527,7 @@
<p><strong>RomWBW User Guide</strong> \
Version 3.6 \
Wayne Warthen (<a href="mailto:wwarthen@gmail.com">wwarthen@gmail.com</a>) \
25 Nov 2025</p>
30 Nov 2025</p>
<h4 id="preface">Preface</h4>
<p>This document is a general usage guide for the RomWBW software and is
generally the best place to start with RomWBW.</p>

4
index.html

@ -179,7 +179,7 @@
<p><strong>RomWBW Introduction</strong> \
Version 3.6 \
Wayne Warthen (<a href="mailto:wwarthen@gmail.com">wwarthen@gmail.com</a>) \
25 Nov 2025</p>
30 Nov 2025</p>
<h1 id="overview">Overview</h1>
<p>RomWBW software provides a complete, commercial quality implementation
of CP/M (and work-alike) operating systems and applications for modern
@ -704,5 +704,5 @@ control system to ensure their contributions are clearly documented.</p>
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Build Date UTC : 2025-11-30 23:09:31.496798+00:00
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