From b6ca264e882bfcc30ec7f2092bf04049d857b3a0 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Fri, 28 Sep 2018 17:46:18 -0700 Subject: [PATCH] Add SmallZ80 Support to FDU --- Doc/ChangeLog.txt | 1 + Doc/FDU.txt | 34 ++++++-- Source/Apps/FDU/FDU.asm | 171 +++++++++++++++++++++++++--------------- Source/Apps/FDU/FDU.txt | 34 ++++++-- 4 files changed, 165 insertions(+), 75 deletions(-) diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 1ba394fb..e322ba60 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -17,6 +17,7 @@ Version 2.9.1 - WBW: Added preliminary support for interrupt management API - P?S: Improved boot messages in RAM-Floppy driver - P?S: Added charge setting display to RTC boot messages +- WBW: Add SmallZ80 support to FDU Version 2.9.0 ------------- diff --git a/Doc/FDU.txt b/Doc/FDU.txt index 6387c066..b591b7c3 100644 --- a/Doc/FDU.txt +++ b/Doc/FDU.txt @@ -1,9 +1,9 @@ ================================================================ -Floppy Disk Utility (FDU) v5.1 for RetroBrew Computers -Disk IO / Zeta / Dual-IDE / N8 +Floppy Disk Utility (FDU) v5.3 for RetroBrew Computers +Disk IO / Zeta / Dual-IDE / N8 / RC2014 / SmallZ80 ================================================================ -Updated December 16, 2017 +Updated September 5, 2018 by Wayne Warthen (wwarthen@gmail.com) Application to test the hardware functionality of the Floppy @@ -74,6 +74,9 @@ supported: - Zeta 2 - N8 - Mark IV + - RC2014 w/ SMC + - RC2014 w/ WDC + - SmallZ80 You must be using either a RomWBW or UBA based OS version. @@ -85,13 +88,15 @@ You must have one of the following floppy disk controllers: - Zeta SBC onboard FDC - Zeta 2 SBC onboard FDC - N8 SBC onboard FDC + - RC2014 Scott Baker SMC-based Floppy Module + - RC2014 Scott Baker WDC-based Floppy Module Finally, you will need a floppy drive connected via an appropriate cable: Disk IO - no twist in cable, drive unit 0/1 must be selected by jumper on drive -DISK IO 3, Zeta, Zeta 2 - cable with twist, unit 0 after twist, unit 1 before twist -DIDE, N8 - cable with twist, unit 0 before twist, unit 1 after twist +DISK IO 3, Zeta, Zeta 2, RC2014 - cable with twist, unit 0 after twist, unit 1 before twist +DIDE, N8, Mark IV, SmallZ80 - cable with twist, unit 0 before twist, unit 1 after twist Note that FDU does not utilize your systems ROM or OS to access the floppy system. FDU interacts directly with @@ -138,6 +143,16 @@ P5 (bd ID): 1-2, 3-4 (for $20-$3F port range) There are no specific N8 jumper settings, but the default I/O range starting at $80 is assumed in the published code. +The RC2014 Scott Baker SMC-based floppy module should be jumpered +for I/O base address 0x50 (SV1: 11-12), JP1 (TS) shorted, +JP2 (/FAULT) shorted, JP3 (MINI): 2-3, JP4 (/DC/RDY): 2-3. + +The RC2014 Scott Baker WDC-based floppy module should be jumpered +for I/O base address 0x50 (SV1: 11-12), JP1 (/DACK): 1-2, +JP2 (TC): 2-3. + +SmallZ80 does not have any relevant jumper settings. The +hardwired I/O ranges are assumed in the code. Modes of Operation ------------------ @@ -481,3 +496,12 @@ WW 1/8/2018: v5.2 Added support for RC2014 hardware: - Scott Baker SMC 9266 FDC module - Scott Baker WDC 37C65 FDC module + +WW 9/5/2018: v5.3 + - Removed use of pulsing TC to end R/W operations after one sector and + instead set EOT = R (sector number) so that after desired sector is + read, R/W stops with end of cylinder error which is a documented + method for controling number of sectors R/W. This specific termination + condition is no longer considered an error, but a successful end of + operation. + - Added support for SmallZ80 diff --git a/Source/Apps/FDU/FDU.asm b/Source/Apps/FDU/FDU.asm index dcacd8bc..2fda22db 100644 --- a/Source/Apps/FDU/FDU.asm +++ b/Source/Apps/FDU/FDU.asm @@ -41,6 +41,9 @@ ; 2018-01-08: V5.2 ADDED RC2014 SUPPORT FOR: ; - SCOTT BAKER (SMB) SMC 9266 FDC ; - SCOTT BAKER (SMB) WDC 37C65 FDC +; 2018-09-05: v5.3 ADDED SUPPORT FOR SMALLZ80 +; - USE EOT=R TO END R/W AFTER ONE SECTOR INSTEAD +; OF USING PULSE TC ; ;_______________________________________________________________________________ ; @@ -60,6 +63,11 @@ ;_______________________________________________________________________________ ; ; +FALSE .EQU 0 +TRUE .EQU ~FALSE +; +; FDC ID +; FDC_DIO .EQU 0 FDC_DIO3 .EQU 1 FDC_ZETA .EQU 2 @@ -68,18 +76,15 @@ FDC_DIDE .EQU 4 FDC_N8 .EQU 5 FDC_RCSMC .EQU 6 FDC_RCWDC .EQU 7 +FDC_SMZ80 .EQU 8 ; -_DIO .EQU 1 << FDC_DIO -_DIO3 .EQU 1 << FDC_DIO3 -_ZETA .EQU 1 << FDC_ZETA -_ZETA2 .EQU 1 << FDC_ZETA2 -_DIDE .EQU 1 << FDC_DIDE -_N8 .EQU 1 << FDC_N8 -_RCSMC .EQU 1 << FDC_RCSMC -_RCWDC .EQU 1 << FDC_RCWDC +; FDC MODE ; -FALSE .EQU 0 -TRUE .EQU ~FALSE +_DIO .EQU $01 ; CUSTOM FOR DIO BOARD +_DIO3 .EQU $02 ; CUSTOM FOR DIO3 BOARD +_ZETA .EQU $04 ; CUSTOM FOR ZETA +_RCSMC .EQU $08 ; CUSTOM FOR RC2014 SMB SMC MODULE +_PCAT .EQU $10 ; PC/AT MODE IN NEWER CONTROLLERS ; ;=============================================================================== ; MAIN PROGRAM PROCEDURE @@ -177,11 +182,13 @@ INIT1: JR INIT3 ; AND DONE INIT2: - ; NO KNOWN BIOS DETECTED, BAIL OUT W/ ERROR - LD DE,STR_BIOERR - CALL WRITESTR - OR 0FFH - RET + ;; NO KNOWN BIOS DETECTED, BAIL OUT W/ ERROR + ;LD DE,STR_BIOERR + ;CALL WRITESTR + ;OR 0FFH + ;RET + LD A,20 + LD (CPUSPD),A INIT3: ; COMPUTE CPU SCALER FOR DELAY LOOPS @@ -204,8 +211,8 @@ INIT5: XOR A RET -STR_BANNER .DB "Floppy Disk Utility (FDU) v5.2, 08-Jan-2018$" -STR_BANNER2 .DB "Copyright (C) 2017, Wayne Warthen, GNU GPL v3","$" +STR_BANNER .DB "Floppy Disk Utility (FDU) v5.3, 28-Sep-2018$" +STR_BANNER2 .DB "Copyright (C) 2018, Wayne Warthen, GNU GPL v3","$" STR_HBIOS .DB " [HBIOS]$" STR_UBIOS .DB " [UBIOS]$" ; @@ -238,20 +245,7 @@ FDCSEL1: FDCSEL2: ; SAVE SELECTED FDC IDENTIFIER DEC A ; CONVERT TO ZERO-BASED FDC ID - LD (FDCID),A ; RECORD THE FDC ID - PUSH AF ; SAVE IT -; - ; CREATE AND SAVE A BIT MAPPED VALUE - INC A ; PREPARE LOOP COUNT - LD B,A ; AND PUT IN B - XOR A ; START WITH ALL BITS OFF - SCF ; ... AND CF SET -FDCSEL3: - RLA ; ROTATE BIT TO NEXT POSITION - DJNZ FDCSEL3 ; AND CONTINUE TILL DONE - LD (FDCBM),A ; SAVE BITMAP VALUE -; - POP AF ; RESTORE FDC ID + LD (FDCID),A ; RECORD THE FDC ID RLCA ; TIMES 4 RLCA ; ... FOR 4 BYTE ENTRIES LD HL,FDCTBL ; POINT TO FDC INSTANCE TABLE @@ -266,6 +260,8 @@ FDCSEL3: LD D,(HL) ; ... LD (FDCCFG),DE ; SAVE CFG PTR LD IY,(FDCCFG) ; AND INIT A WORKING COPY + LD A,(IY+CFG_MODE) ; GET MODE BITMAP BYTE + LD (FDCBM),A ; SAVE IT TO ACTIVE WORKING COPY ; LD DE,(FDCLBL) ; GET LABEL POINTER CALL WRITESTR ; AND DISPLAY IT @@ -285,6 +281,7 @@ FDCTBL: ; LABEL CONFIG DATA .DW STR_N8, CFG_N8 .DW STR_RCSMC, CFG_RCSMC .DW STR_RCWDC, CFG_RCWDC + .DW STR_SMZ80, CFG_SMZ80 FDCCNT .EQU ($-FDCTBL)/4 ; FD CONTROLLER COUNT ; ; FDC LABEL STRINGS @@ -297,6 +294,7 @@ STR_DIDE .TEXT "D-IDE$" STR_N8 .TEXT "N8$" STR_RCSMC .TEXT "RC-SMC$" STR_RCWDC .TEXT "RC-WDC$" +STR_SMZ80 .TEXT "SMZ80$" ; ; FDC CONFIGURATION BLOCKS ; @@ -308,9 +306,28 @@ CFG_DCR .EQU 4 CFG_DACK .EQU 5 CFG_TC .EQU 6 CFG_DMA .EQU 7 +CFG_MODE .EQU 8 ; CFG_DIO: + .DB 036H ; FDC MAIN STATUS REGISTER + .DB 037H ; FDC DATA PORT + .DB 038H ; DATA INPUT REGISTER + .DB 03AH ; DIGITAL OUTPUT REGISTER (LATCH) + .DB 0FFH ; DCR + .DB 0FFH ; DACK + .DB 0FFH ; TERMINAL COUNT (W/ DACK) + .DB 03CH ; PSEUDO DMA DATA PORT + .DB _DIO ; MODE= CFG_DIO3: + .DB 036H ; FDC MAIN STATUS REGISTER + .DB 037H ; FDC DATA PORT + .DB 038H ; DATA INPUT REGISTER + .DB 03AH ; DIGITAL OUTPUT REGISTER (LATCH) + .DB 0FFH ; DCR + .DB 0FFH ; DACK + .DB 0FFH ; TERMINAL COUNT (W/ DACK) + .DB 03CH ; PSEUDO DMA DATA PORT + .DB _DIO3 ; MODE= CFG_ZETA: .DB 036H ; FDC MAIN STATUS REGISTER .DB 037H ; FDC DATA PORT @@ -320,6 +337,7 @@ CFG_ZETA: .DB 0FFH ; DACK .DB 0FFH ; TERMINAL COUNT (W/ DACK) .DB 03CH ; PSEUDO DMA DATA PORT + .DB _ZETA ; MODE= ; CFG_ZETA2: .DB 030H ; FDC MAIN STATUS REGISTER @@ -330,6 +348,7 @@ CFG_ZETA2: .DB 0FFH ; DACK .DB 038H ; TERMINAL COUNT (W/ DACK) .DB 0FFH ; NOT USED BY ZETA SBC V2 + .DB _PCAT ; MODE= ; CFG_DIDE: .DB 02AH ; FDC MAIN STATUS REGISTER @@ -340,6 +359,7 @@ CFG_DIDE: .DB 03CH ; DACK .DB 03DH ; TERMINAL COUNT (W/ DACK) .DB 0FFH ; NOT USED BY DIDE + .DB _PCAT ; MODE= ; CFG_N8: .DB 08CH ; FDC MAIN STATUS REGISTER @@ -350,6 +370,7 @@ CFG_N8: .DB 090H ; DACK .DB 093H ; TERMINAL COUNT (W/ DACK) .DB 0FFH ; NOT USED BY N8 + .DB _PCAT ; MODE= ; CFG_RCSMC: .DB 050H ; FDC MAIN STATUS REGISTER @@ -360,6 +381,7 @@ CFG_RCSMC: .DB 0FFH ; DACK .DB 0FFH ; TERMINAL COUNT (W/ DACK) .DB 0FFH ; PSEUDO DMA DATA PORT + .DB _RCSMC ; MODE= ; CFG_RCWDC: .DB 050H ; FDC MAIN STATUS REGISTER @@ -370,6 +392,18 @@ CFG_RCWDC: .DB 0FFH ; DACK .DB 058H ; TERMINAL COUNT (W/ DACK) .DB 0FFH ; PSEUDO DMA DATA PORT + .DB _PCAT ; MODE= +; +CFG_SMZ80: + .DB 044H ; FDC MAIN STATUS REGISTER + .DB 045H ; FDC DATA PORT + .DB 0FFH ; DATA INPUT REGISTER + .DB 042H ; DIGITAL OUTPUT REGISTER (LATCH) + .DB 047H ; DCR + .DB 0FFH ; DACK + .DB 0FFH ; TERMINAL COUNT (W/ DACK) + .DB 0FFH ; PSEUDO DMA DATA PORT + .DB _PCAT ; MODE= ; FDCID .DB 0 ; FDC IDENTIFIER (0 INDEXED) FDCBM .DB 0 ; FDC ID BITMAP @@ -388,6 +422,7 @@ FSS_MENU: .TEXT " (6) N8 Onboard FDC\r\n" .TEXT " (7) RC2014 SMC (SMB)\r\n" .TEXT " (8) RC2014 WDC (SMB)\r\n" + .TEXT " (9) SmallZ80 Expansion\r\n" .TEXT "=== OPTION ===> $\r\n" ; ;=============================================================================== @@ -1464,7 +1499,8 @@ MD_MAP: .DB %00000001 ; DIDE POLL .DB %00000001 ; N8 POLL .DB %00000001 ; RCSMC POLL - .DB %00000001 ; RCWDC POLL +; .DB %00000001 ; RCWDC POLL + .DB %00000001 ; SMZ80 POLL ; ; MEDIA DESCRIPTION BLOCK ; @@ -1810,7 +1846,7 @@ FM_DRAW: AND _ZETA | _DIO3 JR NZ,FM_DRAW0B LD A,(HL) - AND _DIDE | _N8 | _ZETA2 | _RCWDC + AND _PCAT JR NZ,FM_DRAW0C LD A,(HL) AND _RCSMC @@ -1825,7 +1861,7 @@ FM_DRAW0B: ; ZETA, DIO3 LD A,(FST_DOR) AND 00000010B JR FM_DRAW1 -FM_DRAW0C: ; DIDE, N8, ZETA2, RCWDC +FM_DRAW0C: ; DIDE, N8, ZETA2, RCWDC, SMZ80 LD A,(FST_DOR) AND 11110000B JR FM_DRAW1 @@ -1963,7 +1999,7 @@ FM_MOTOR: AND _ZETA | _DIO3 JR NZ,FM_MOTOR0B LD A,(HL) - AND _DIDE | _N8 | _ZETA2 | _RCWDC + AND _PCAT JR NZ,FM_MOTOR0C LD A,(HL) AND _RCSMC @@ -1978,7 +2014,7 @@ FM_MOTOR0B: ; ZETA, DIO3 LD A,(FST_DOR) AND 00000010B JR FM_MOTOR1 -FM_MOTOR0C: ; DIDE, N8, ZETA2, RCWDC +FM_MOTOR0C: ; DIDE, N8, ZETA2, RCWDC, SMZ80 LD A,(FST_DOR) AND 11110000B JR FM_MOTOR1 @@ -2515,7 +2551,9 @@ FC_SETUPIO: LD (DE),A INC DE - LD A,(FCD_EOT) + ; V5.3, USE EOT=R TO R/W ONLY ONE SECTOR + ;LD A,(FCD_EOT) + LD A,(FCD_R) LD (DE),A INC DE @@ -2703,7 +2741,7 @@ FC_INIT: AND _ZETA | _DIO3 JR NZ,FC_INIT2 LD A,(HL) - AND _DIDE | _N8 | _ZETA2 | _RCWDC + AND _PCAT JR NZ,FC_INIT3 LD A,(HL) AND _RCSMC @@ -2715,7 +2753,7 @@ FC_INIT1: ; DIO FC_INIT2: ; ZETA, DIO3 LD A,(FCD_DORB) JR FC_INIT5 -FC_INIT3: ; DIDE, N8, ZETA2, RCWDC +FC_INIT3: ; DIDE, N8, ZETA2, RCWDC, SMZ80 LD A,(FCD_DORC) JR FC_INIT5 FC_INIT4: ; WDSMC @@ -2747,7 +2785,7 @@ FC_RESETFDC: AND _ZETA | _DIO3 | _RCSMC JR NZ,FC_RESETFDC1 LD A,(HL) - AND _DIDE | _N8 | _ZETA2 | _RCWDC + AND _PCAT JR NZ,FC_RESETFDC2 RET FC_RESETFDC1: ; ZETA, DIO3, RCSMC @@ -2759,7 +2797,7 @@ FC_RESETFDC1: ; ZETA, DIO3, RCSMC POP AF OUT (C),A JR FC_RESETFDC3 -FC_RESETFDC2: ; DIDE, N8, ZETA2, RCWDC +FC_RESETFDC2: ; DIDE, N8, ZETA2, RCWDC, SMZ80 LD A,0 OUT (C),A LD A,(FST_DOR) @@ -2774,22 +2812,23 @@ FC_RESETFDC3: ; PULSE TERMCT TO TERMINATE ANY ACTIVE EXECUTION PHASE ; FC_PULSETC: - LD A,(FDCBM) - AND _DIDE | _N8 | _ZETA2 | _RCWDC - JR NZ,FC_PULSETC1 - ; NOT DIDE, N8, ZETA2 - LD C,(IY+CFG_DOR) - LD A,(FST_DOR) - SET 0,A - OUT (C),A - RES 0,A - OUT (C),A - JR FC_PULSETC2 -FC_PULSETC1: ; DIDE, N8, ZETA2, RCWDC - LD C,(IY+CFG_TC) - IN A,(C) - JR FC_PULSETC2 -FC_PULSETC2: + ; V5.3, USE EOT=R TO R/W ONLY ONE SECTOR + ;LD A,(FDCBM) + ;AND _PCAT + ;JR NZ,FC_PULSETC1 + ;; NOT DIDE, N8, ZETA2, RCSMC, SMZ80 + ;LD C,(IY+CFG_DOR) + ;LD A,(FST_DOR) + ;SET 0,A + ;OUT (C),A + ;RES 0,A + ;OUT (C),A + ;JR FC_PULSETC2 +;FC_PULSETC1: ; DIDE, N8, ZETA2, RCWDC, SMZ80 + ;LD C,(IY+CFG_TC) + ;IN A,(C) + ;JR FC_PULSETC2 +;FC_PULSETC2: RET ; ; SET FST_DOR FOR MOTOR CONTROL ON @@ -2803,7 +2842,7 @@ FC_MOTORON: AND _ZETA | _DIO3 JR NZ,FC_MOTORON2 LD A,(HL) - AND _DIDE | _N8 | _ZETA2 | _RCWDC + AND _PCAT JR NZ,FC_MOTORON3 LD A,(HL) AND _RCSMC @@ -2817,7 +2856,7 @@ FC_MOTORON2: ; ZETA, DIO3 LD HL,FST_DOR ; POINT TO FDC_DOR SET 1,(HL) JR FC_MOTORON5 -FC_MOTORON3: ; DIDE, N8, ZETA2, RCWDC +FC_MOTORON3: ; DIDE, N8, ZETA2, RCWDC, SMZ80 LD HL,FST_DOR ; POINT TO FDC_DOR LD A,(HL) ; START WITH CURRENT DOR AND 11111100B ; GET RID OF ANY ACTIVE DS BITS @@ -2849,7 +2888,7 @@ FC_MOTORON5: CALL FC_SETDOR ; OUTPUT TO CONTROLLER CALL LDELAY ; WAIT 1/2 SEC ON MOTOR START FOR SPIN-UP LD A,(FDCBM) - AND _DIDE | _N8 | _ZETA2 | _RCWDC + AND _PCAT RET Z LD A,(FCD_DCR) LD C,(IY+CFG_DCR) @@ -2867,7 +2906,7 @@ FC_MOTOROFF: AND _ZETA | _DIO3 JR NZ,FC_MOTOROFF2 LD A,(HL) - AND _DIDE | _N8 | _ZETA2 | _RCWDC + AND _PCAT JR NZ,FC_MOTOROFF3 LD A,(HL) AND _RCSMC @@ -2881,7 +2920,7 @@ FC_MOTOROFF2: ; ZETA, DIO3 LD HL,FST_DOR ; POINT TO FDC_DOR RES 1,(HL) JR FC_MOTOROFF5 -FC_MOTOROFF3: ; DIDE, N8, ZETA2, RCWDC +FC_MOTOROFF3: ; DIDE, N8, ZETA2, RCWDC, SMZ80 LD HL,FST_DOR ; POINT TO FDC_DOR LD A,DORC_INIT LD (HL),A @@ -3120,8 +3159,10 @@ FOP_EVALST1: JP FOP_EXIT FOP_ENDCYL: - LD A,FRC_ENDCYL - JP FOP_SETFST + ; V5.3, USE EOT=R TO R/W ONLY ONE SECTOR + ;LD A,FRC_ENDCYL + ;JP FOP_SETFST + JP FOP_EXIT FOP_DATAERR: LD A,FRC_DATAERR @@ -3745,7 +3786,7 @@ DORB_BR500 .EQU 10100000B ; 500KBPS ; DORB_INIT .EQU DORB_BR250 ; -; *** DIDE/N8/ZETA2/RCWDC *** +; *** DIDE/N8/ZETA2/RCWDC/SMZ80 *** ; DORC_INIT .EQU 00001100B ; SOFT RESET INACTIVE, DMA ENABLED ; diff --git a/Source/Apps/FDU/FDU.txt b/Source/Apps/FDU/FDU.txt index 6387c066..b591b7c3 100644 --- a/Source/Apps/FDU/FDU.txt +++ b/Source/Apps/FDU/FDU.txt @@ -1,9 +1,9 @@ ================================================================ -Floppy Disk Utility (FDU) v5.1 for RetroBrew Computers -Disk IO / Zeta / Dual-IDE / N8 +Floppy Disk Utility (FDU) v5.3 for RetroBrew Computers +Disk IO / Zeta / Dual-IDE / N8 / RC2014 / SmallZ80 ================================================================ -Updated December 16, 2017 +Updated September 5, 2018 by Wayne Warthen (wwarthen@gmail.com) Application to test the hardware functionality of the Floppy @@ -74,6 +74,9 @@ supported: - Zeta 2 - N8 - Mark IV + - RC2014 w/ SMC + - RC2014 w/ WDC + - SmallZ80 You must be using either a RomWBW or UBA based OS version. @@ -85,13 +88,15 @@ You must have one of the following floppy disk controllers: - Zeta SBC onboard FDC - Zeta 2 SBC onboard FDC - N8 SBC onboard FDC + - RC2014 Scott Baker SMC-based Floppy Module + - RC2014 Scott Baker WDC-based Floppy Module Finally, you will need a floppy drive connected via an appropriate cable: Disk IO - no twist in cable, drive unit 0/1 must be selected by jumper on drive -DISK IO 3, Zeta, Zeta 2 - cable with twist, unit 0 after twist, unit 1 before twist -DIDE, N8 - cable with twist, unit 0 before twist, unit 1 after twist +DISK IO 3, Zeta, Zeta 2, RC2014 - cable with twist, unit 0 after twist, unit 1 before twist +DIDE, N8, Mark IV, SmallZ80 - cable with twist, unit 0 before twist, unit 1 after twist Note that FDU does not utilize your systems ROM or OS to access the floppy system. FDU interacts directly with @@ -138,6 +143,16 @@ P5 (bd ID): 1-2, 3-4 (for $20-$3F port range) There are no specific N8 jumper settings, but the default I/O range starting at $80 is assumed in the published code. +The RC2014 Scott Baker SMC-based floppy module should be jumpered +for I/O base address 0x50 (SV1: 11-12), JP1 (TS) shorted, +JP2 (/FAULT) shorted, JP3 (MINI): 2-3, JP4 (/DC/RDY): 2-3. + +The RC2014 Scott Baker WDC-based floppy module should be jumpered +for I/O base address 0x50 (SV1: 11-12), JP1 (/DACK): 1-2, +JP2 (TC): 2-3. + +SmallZ80 does not have any relevant jumper settings. The +hardwired I/O ranges are assumed in the code. Modes of Operation ------------------ @@ -481,3 +496,12 @@ WW 1/8/2018: v5.2 Added support for RC2014 hardware: - Scott Baker SMC 9266 FDC module - Scott Baker WDC 37C65 FDC module + +WW 9/5/2018: v5.3 + - Removed use of pulsing TC to end R/W operations after one sector and + instead set EOT = R (sector number) so that after desired sector is + read, R/W stops with end of cylinder error which is a documented + method for controling number of sectors R/W. This specific termination + condition is no longer considered an error, but a successful end of + operation. + - Added support for SmallZ80