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Preliminary SyQuest Driver

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This commit is contained in:
Wayne Warthen
2023-06-01 16:13:26 -07:00
parent 1c411f5552
commit b7e865dbf1
25 changed files with 1500 additions and 75 deletions
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2
Source/HBIOS/cfg_dyno.asm
View File

@@ -256,6 +256,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

11
Source/HBIOS/cfg_master.asm
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@@ -320,17 +320,24 @@ LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPAMODE .EQU PPAMODE_SPP ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

7
Source/HBIOS/cfg_mbc.asm
View File

@@ -255,6 +255,13 @@ IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_mk4.asm
View File

@@ -258,6 +258,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_n8.asm
View File

@@ -251,6 +251,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

7
Source/HBIOS/cfg_rcz180.asm
View File

@@ -277,6 +277,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

7
Source/HBIOS/cfg_rcz280.asm
View File

@@ -281,6 +281,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

7
Source/HBIOS/cfg_rcz80.asm
View File

@@ -275,6 +275,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_rph.asm
View File

@@ -240,6 +240,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_sbc.asm
View File

@@ -239,6 +239,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

7
Source/HBIOS/cfg_scz180.asm
View File

@@ -271,6 +271,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_z80retro.asm
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@@ -210,6 +210,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_zeta.asm
View File

@@ -181,6 +181,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_zeta2.asm
View File

@@ -192,6 +192,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

13
Source/HBIOS/hbios.asm
View File

@@ -3245,6 +3245,9 @@ HB_INITTBL:
#IF (IMMENABLE)
.DW IMM_INIT
#ENDIF
#IF (SYQENABLE)
.DW SYQ_INIT
#ENDIF
#IF (PRPENABLE)
.DW PRP_INIT
#ENDIF
@@ -6372,6 +6375,15 @@ SIZ_IMM .EQU $ - ORG_IMM
.ECHO " bytes.\n"
#ENDIF
;
#IF (SYQENABLE)
ORG_SYQ .EQU $
#INCLUDE "syq.asm"
SIZ_SYQ .EQU $ - ORG_SYQ
.ECHO "SYQ occupies "
.ECHO SIZ_SYQ
.ECHO " bytes.\n"
#ENDIF
;
#IF (TERMENABLE)
ORG_TERM .EQU $
#INCLUDE "term.asm"
@@ -7158,6 +7170,7 @@ PS_DDPPPSD .TEXT "PPPSD$"
PS_DDHDSK .TEXT "HDSK$"
PS_DDPPA .TEXT "PPA$"
PS_DDIMM .TEXT "IMM$"
PS_DDSYQ .TEXT "SYQ$"
;
; DISK TYPE STRINGS
;

1
Source/HBIOS/hbios.inc
View File

@@ -323,6 +323,7 @@ DIODEV_PPPSD .EQU $80
DIODEV_HDSK .EQU $90
DIODEV_PPA .EQU $A0
DIODEV_IMM .EQU $B0
DIODEV_SYQ .EQU $C0
;
; RTC DEVICE IDS
;

137
Source/HBIOS/imm.asm
View File

@@ -78,7 +78,7 @@
; - THIS DRIVER IS FOR THE ZIP DRIVE IMM INTERFACE. IT WILL SIMPLY
; FAIL TO EVEN RECOGNIZE A ZIP DRIVE WITH THE OLDER PPA INTERFACE.
; THERE DOES NOT SEEM TO BE A WAY TO VISUALLY DETERMINE IF A ZIP
; DRIVE IS IMM OR PPA. SIGH.
; DRIVE IS PPA OR IMM. SIGH.
;
; - THERE ARE SOME HARD CODED TIMEOUT LOOPS IN THE CODE. THEY ARE
; WORKING OK ON A 7 MHZ Z80. THEY ARE LIKELY TO NEED TWEAKING ON
@@ -130,6 +130,11 @@ IMM_IOBASE .EQU 3 ; IO BASE ADDRESS (BYTE)
IMM_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
IMM_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
;
; MACROS
;
#DEFINE IMM_WCTL(VAL) LD A,VAL \ CALL IMM_WRITECTRL
#DEFINE IMM_WDATA(VAL) LD A,VAL \ CALL IMM_WRITEDATA
;
;=============================================================================
; INITIALIZATION ENTRY POINT
;=============================================================================
@@ -289,7 +294,7 @@ IMM_READ:
;
;
IMM_WRITE:
CALL HB_DSKREAD ; HOOK DISK WRITE CONTROLLER
CALL HB_DSKWRITE ; HOOK DISK WRITE CONTROLLER
LD A,SCSI_CMD_WRITE ; SETUP SCSI WRITE
LD (IMM_CMD_RW),A ; AND SAVE IT IN SCSI CMD
JP IMM_IO ; DO THE I/O
@@ -445,6 +450,10 @@ IMM_WRITECTRL:
#IF (IMMMODE == IMMMODE_MG014
XOR $0B | $80 ; HIGH BIT IS MG014 LED
#ENDIF
;#IF (IMMMODE == IMMMODE_SPP
; AND %00001111
; OR %11000000
;#ENDIF
LD C,(IY+IMM_IOBASE) ; GET BASE IO ADDRESS
INC C ; BUMP TO CONTROL PORT
INC C
@@ -503,28 +512,28 @@ IMM_READSTATUS5:
;
IMM_CPP:
PUSH AF
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$AA \ CALL IMM_WRITEDATA
LD A,$55 \ CALL IMM_WRITEDATA
LD A,$00 \ CALL IMM_WRITEDATA
LD A,$FF \ CALL IMM_WRITEDATA
IMM_WCTL($0C)
IMM_WDATA($AA)
IMM_WDATA($55)
IMM_WDATA($00)
IMM_WDATA($FF)
CALL IMM_READSTATUS
AND $B8
LD (IMM_S1),A
LD A,$87 \ CALL IMM_WRITEDATA
IMM_WDATA($87)
CALL IMM_READSTATUS
AND $B8
LD (IMM_S2),A
LD A,$78 \ CALL IMM_WRITEDATA
IMM_WDATA($78)
CALL IMM_READSTATUS
AND $38
LD (IMM_S3),A
POP AF
CALL IMM_WRITEDATA
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$0D \ CALL IMM_WRITECTRL
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$FF \ CALL IMM_WRITEDATA
IMM_WCTL($0C)
IMM_WCTL($0D)
IMM_WCTL($0C)
IMM_WDATA($FF)
;
; CONNECT: S1=$B8 S2=$18 S3=$30
; DISCONNECT: S1=$B8 S2=$18 S3=$38
@@ -567,23 +576,23 @@ IMM_DISCONNECT:
CALL IMM_CPP
;
; TURNS OFF MG014 LED
LD A,$8C \ CALL IMM_WRITECTRL
IMM_WCTL($8C)
;
RET
;
; INITIATE A SCSI BUS RESET.
;
IMM_RESETPULSE:
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$40 \ CALL IMM_WRITEDATA
IMM_WCTL($04)
IMM_WDATA($40)
CALL DELAY ; 16 US, IDEALLY, 1 US
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$0D \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
IMM_WCTL($0D)
CALL DELAY ; 48 US, IDEALLY, 50 US
CALL DELAY
CALL DELAY
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
IMM_WCTL($04)
RET
;
; SCSI SELECT PROCESS
@@ -592,7 +601,7 @@ IMM_SELECT:
#IF (IMMTRACE >= 3)
PRTS("\r\nSELECT: $")
#ENDIF
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
;
LD HL,500 ; TIMEOUT COUNTER
;
@@ -607,12 +616,12 @@ IMM_SELECT1:
JR IMM_SELECT1
;
IMM_SELECT2:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
; PLACE HOST AND TARGET BIT ON DATA BUS
LD A,$80 | (1 << IMM_TGT)
CALL IMM_WRITEDATA
CALL DELAY ; CONFIRM DELAY TIME?
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
;
#IF (IMMTRACE >= 3)
CALL IMM_READSTATUS
@@ -620,7 +629,7 @@ IMM_SELECT2:
CALL PRTHEXBYTE
#ENDIF
;
LD A,$0D \ CALL IMM_WRITECTRL
IMM_WCTL($0D)
;
#IF (IMMTRACE >= 3)
CALL IMM_READSTATUS
@@ -645,7 +654,7 @@ IMM_SELECT3:
JR IMM_SELECT3
;
IMM_SELECT4:
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
;
XOR A
RET
@@ -675,7 +684,7 @@ IMM_SENDCMD:
;
INC HL ; BACK TO FIRST CMD BYTE
IMM_SENDCMD1:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
LD A,(HL) ; LOAD CMD BYTE
;
#IF (IMMTRACE >= 3)
@@ -686,8 +695,8 @@ IMM_SENDCMD1:
CALL IMM_WRITEDATA ; PUT IT ON THE BUS
INC HL ; BUMP TO NEXT BYTE
DEC B ; DEC LOOP COUNTER
LD A,$05
CALL IMM_WRITECTRL \ LD A,(HL) ; LOAD CMD BYTE
IMM_WCTL($05)
LD A,(HL) ; LOAD CMD BYTE
;
#IF (IMMTRACE >= 3)
CALL PC_SPACE
@@ -696,11 +705,11 @@ IMM_SENDCMD1:
;
CALL IMM_WRITEDATA ; PUT IT ON THE BUS
INC HL ; BUMP TO NEXT BYTE
LD A,$00 \ CALL IMM_WRITECTRL
IMM_WCTL($00)
DJNZ IMM_SENDCMD1 ; LOOP TILL DONE
;
IMM_SENDCMD2:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
;
RET
;
@@ -718,11 +727,11 @@ IMM_WAITLOOP:
;
IMM_WAIT:
LD HL,500 ; GOOD VALUE???
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
CALL IMM_WAITLOOP
JP Z,IMM_CMD_TIMEOUT ; HANDLE TIMEOUT
PUSH AF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
POP AF
AND $B8
RET ; RETURN W/ RESULT IN A
@@ -731,7 +740,7 @@ IMM_WAIT:
;
IMM_LONGWAIT:
LD B,3 ; VALUE???
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
IMM_LONGWAIT1:
LD HL,0
CALL IMM_WAITLOOP
@@ -741,7 +750,7 @@ IMM_LONGWAIT1:
;
IMM_LONGWAIT2:
PUSH AF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
;
#IF 0
CALL PC_GT
@@ -761,19 +770,19 @@ IMM_NEGOTIATE:
#IF (IMMTRACE >= 3)
PRTS("\r\nNEGO: $")
#ENDIF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
CALL DELAY ; 16 US, IDEALLY 5 US
LD A,$00 \ CALL IMM_WRITEDATA
IMM_WDATA($00)
LD DE,7 ; 112 US, IDEALLY 100 US
CALL VDELAY
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
CALL DELAY ; 16 US, IDEALLY 5 US
CALL IMM_READSTATUS
PUSH AF ; SAVE RESULT
CALL DELAY ; 16 US, IDEALLY 5 US
LD A,$07 \ CALL IMM_WRITECTRL
IMM_WCTL($07)
CALL DELAY ; 16 US, IDEALLY 5 US
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
;
POP AF
;
@@ -799,7 +808,7 @@ IMM_NEGOTIATE:
;
IMM_GETBYTE:
CALL IMM_WAIT
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
CALL IMM_READSTATUS
AND $F0
RRCA
@@ -807,13 +816,13 @@ IMM_GETBYTE:
RRCA
RRCA
PUSH AF
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
CALL IMM_READSTATUS
AND $F0
POP HL
OR H
PUSH AF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
POP AF
RET
;
@@ -844,8 +853,8 @@ IMM_GETDATA1:
POP HL ; RESTORE BYTE COUNTER
CP $98 ; CHECK FOR READ PHASE
JR NZ,IMM_GETDATA2 ; IF NOT, ASSUME WE ARE DONE
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_WCTL($06)
CALL IMM_READSTATUS ; GET FIRST NIBBLE
AND $F0 ; ISOLATE BITS
RRCA ; AND SHIFT TO LOW NIBBLE
@@ -853,7 +862,7 @@ IMM_GETDATA1:
RRCA
RRCA
PUSH AF ; SAVE WORKING VALUE
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
CALL IMM_READSTATUS ; GET SECOND NIBBLE
AND $F0 ; ISOLATE BITS
POP BC ; RECOVER LOW NIBBLE
@@ -861,8 +870,8 @@ IMM_GETDATA1:
LD (DE),A ; AND SAVE THE FULL BYTE VALUE
INC DE ; NEXT BUFFER POS
INC HL ; INCREMENT BYTES COUNTER
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_WCTL($0C)
JR IMM_GETDATA1 ; LOOP TILL DONE
;
IMM_GETDATA2:
@@ -884,9 +893,9 @@ IMM_GETDATALEN:
PRTS(" BYTES$")
#ENDIF
;
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_GETDATALEN1:
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
CALL IMM_READSTATUS ; GET FIRST NIBBLE
AND $F0 ; ISOLATE BITS
RRCA ; MOVE TO LOW NIBBLE
@@ -894,7 +903,7 @@ IMM_GETDATALEN1:
RRCA
RRCA
PUSH AF ; SAVE WORKING VALUE
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
CALL IMM_READSTATUS ; GET SECOND NIBBLE
AND $F0 ; ISOLATE BITS
POP BC ; RECOVER FIRST NIBBLE
@@ -902,11 +911,11 @@ IMM_GETDATALEN1:
LD (DE),A ; SAVE FINAL BYTE VALUE
INC DE ; NEXT BUFFER POS
DEC HL ; DEC LOOP COUNTER
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
LD A,H ; CHECK LOOP COUNTER
OR L
JR NZ,IMM_GETDATALEN1 ; LOOP IF NOT DONE
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
RET
;
; PUT A CHUNK OF DATA TO THE SCSI BUS. THIS IS SPECIFICALLY FOR
@@ -935,21 +944,21 @@ IMM_PUTDATA1:
POP HL ; RESTORE BYTE COUNTER
CP $88 ; CHECK FOR WRITE PHASE
JR NZ,IMM_PUTDATA2 ; IF NOT, ASSUME WE ARE DONE
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
LD A,(DE) ; GET NEXT BYTE TO WRITE (FIRST OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; BUMP TO NEXT BUF POS
INC HL ; INCREMENT COUNTER
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
LD A,(DE) ; GET NEXT BYTE TO WRITE (SECOND OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; BUMP TO NEXT BUF POS
INC HL ; INCREMENT COUNTER
LD A,$00 \ CALL IMM_WRITECTRL
IMM_WCTL($00)
JR IMM_PUTDATA1 ; LOOP TILL DONE
;
IMM_PUTDATA2:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
;
#IF (IMMTRACE >= 3)
CALL PC_SPACE
@@ -968,22 +977,22 @@ IMM_PUTDATALEN:
PRTS(" BYTES$")
#ENDIF
;
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_PUTDATALEN1:
LD A,(DE) ; GET NEXT BYTE (FIRST OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; INCREMENT BUF POS
DEC HL ; DEC LOOP COUNTER
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
LD A,(DE) ; GET NEXT BYTE (SECOND OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; INCREMENT BUF POS
DEC HL ; DEC LOOP COUNTER
LD A,$00 \ CALL IMM_WRITECTRL
IMM_WCTL($00)
LD A,H ; CHECK LOOP COUNTER
OR L
JR NZ,IMM_PUTDATALEN1 ; LOOP TILL DONE
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
RET
;
; READ SCSI COMMAND STATUS
@@ -1018,10 +1027,10 @@ IMM_GETSTATUS:
; TERMINATE A BULD READ OPERATION
;
IMM_ENDREAD:
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$0E \ CALL IMM_WRITECTRL
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_WCTL($0C)
IMM_WCTL($0E)
IMM_WCTL($04)
RET
;
; THIS IS THE MAIN SCSI ENGINE. BASICALLY, IT SELECTS THE DEVICE

17
Source/HBIOS/ppa.asm
View File

@@ -71,14 +71,16 @@
;
; TODO:
;
; - CURRENTLY HAS ONLY DETECTION LOGIC. NEED TO WRITE THE REST!!!
;
; - OPTIMIZE READ/WRITE LOOPS
;
; NOTES:
;
; - THIS DRIVER IS FOR THE ZIP DRIVE PPA INTERFACE. IT WILL SIMPLY
; FAIL TO EVEN RECOGNIZE A ZIP DRIVE WITH THE OLDER PPA INTERFACE.
; FAIL TO EVEN RECOGNIZE A ZIP DRIVE WITH THE NEWER IMM INTERFACE.
; THERE DOES NOT SEEM TO BE A WAY TO VISUALLY DETERMINE IF A ZIP
; DRIVE IS PPA OR PPA. SIGH.
; DRIVE IS PPA OR IMM. SIGH.
;
; - THERE ARE SOME HARD CODED TIMEOUT LOOPS IN THE CODE. THEY ARE
; WORKING OK ON A 7 MHZ Z80. THEY ARE LIKELY TO NEED TWEAKING ON
@@ -130,6 +132,11 @@ PPA_IOBASE .EQU 3 ; IO BASE ADDRESS (BYTE)
PPA_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
PPA_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
;
; MACROS
;
#DEFINE PPA_WCTL(VAL) LD A,VAL \ CALL PPA_WRITECTRL
#DEFINE PPA_WDATA(VAL) LD A,VAL \ CALL PPA_WRITEDATA
;
;=============================================================================
; INITIALIZATION ENTRY POINT
;=============================================================================
@@ -303,7 +310,7 @@ PPA_READ:
;
;
PPA_WRITE:
CALL HB_DSKREAD ; HOOK DISK WRITE CONTROLLER
CALL HB_DSKWRITE ; HOOK DISK WRITE CONTROLLER
LD A,SCSI_CMD_WRITE ; SETUP SCSI WRITE
LD (PPA_CMD_RW),A ; AND SAVE IT IN SCSI CMD
JP PPA_IO ; DO THE I/O
@@ -463,7 +470,7 @@ PPA_WAITDONE1:
DEC HL
LD A,H
OR L
JP Z,IMM_CMD_TIMEOUT ; TIMEOUT
;JP Z,PPA_CMD_TIMEOUT ; TIMEOUT
JR PPA_WAITDONE1
;
; OUTPUT BYTE IN A TO THE DATA PORT
@@ -772,7 +779,7 @@ PPA_PRTPREFIX:
PUSH AF
CALL NEWLINE
PRTS("PPA$")
LD A,(IY+IMM_DEV) ; GET CURRENT DEVICE NUM
LD A,(IY+PPA_DEV) ; GET CURRENT DEVICE NUM
CALL PRTDECB
CALL PC_COLON
POP AF

6
Source/HBIOS/std.asm
View File

@@ -260,6 +260,12 @@ IMMMODE_NONE .EQU 0 ; NONE
IMMMODE_SPP .EQU 1 ; IBM PC STANDARD PAR PORT (SPP)
IMMMODE_MG014 .EQU 2 ; RCBUS MG014 STYLE INTERFACE
;
; SYQ DRIVER MODE SELECTIONS
;
SYQMODE_NONE .EQU 0 ; NONE
SYQMODE_SPP .EQU 1 ; IBM PC STANDARD PAR PORT (SPP)
SYQMODE_MG014 .EQU 2 ; RCBUS MG014 STYLE INTERFACE
;
; GDC MONITOR SELECTIONS
;
GDCMON_NONE .EQU 0

1327
Source/HBIOS/syq.asm Normal file
View File

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