MirrorRepos
/
RomWBW
mirror of https://github.com/wwarthen/RomWBW.git
1
0
Fork 1
Code Issues Projects Releases Wiki Activity
Browse Source

Preliminary SyQuest Driver

pull/351/head v3.3.0-dev.18
Wayne Warthen 3 years ago
parent
1c411f5552
commit
b7e865dbf1
25 changed files with 1500 additions and 75 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Unified View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 2
      Source/Apps/assign.asm
  2. 4
      Source/CBIOS/cbios.asm
  3. 2
      Source/CPM3/boot.z80
  4. 2
      Source/HBIOS/cfg_dyno.asm
  5. 11
      Source/HBIOS/cfg_master.asm
  6. 7
      Source/HBIOS/cfg_mbc.asm
  7. 2
      Source/HBIOS/cfg_mk4.asm
  8. 2
      Source/HBIOS/cfg_n8.asm
  9. 7
      Source/HBIOS/cfg_rcz180.asm
  10. 7
      Source/HBIOS/cfg_rcz280.asm
  11. 7
      Source/HBIOS/cfg_rcz80.asm
  12. 2
      Source/HBIOS/cfg_rph.asm
  13. 2
      Source/HBIOS/cfg_sbc.asm
  14. 7
      Source/HBIOS/cfg_scz180.asm
  15. 2
      Source/HBIOS/cfg_z80retro.asm
  16. 2
      Source/HBIOS/cfg_zeta.asm
  17. 2
      Source/HBIOS/cfg_zeta2.asm
  18. 13
      Source/HBIOS/hbios.asm
  19. 1
      Source/HBIOS/hbios.inc
  20. 137
      Source/HBIOS/imm.asm
  21. 17
      Source/HBIOS/ppa.asm
  22. 6
      Source/HBIOS/std.asm
  23. 1327
      Source/HBIOS/syq.asm
  24. 2
      Source/ver.inc
  25. 2
      Source/ver.lib

2
Source/Apps/assign.asm
View File

@ -1920,7 +1920,7 @@ dev08 .db "PPPSD",0
dev09 .db "HDSK",0 dev09 .db "HDSK",0
dev10 .db "PPA",0 dev10 .db "PPA",0
dev11 .db "IMM",0 dev11 .db "IMM",0
dev12 .equ devunk
dev12 .db "SYQ",0
dev13 .equ devunk dev13 .equ devunk
dev14 .equ devunk dev14 .equ devunk
dev15 .equ devunk dev15 .equ devunk

4
Source/CBIOS/cbios.asm
View File

@ -2934,6 +2934,8 @@ DRV_INIT3A:
JR Z,DRV_INIT3B ; IF SO, SKIP MEDIA CHECK JR Z,DRV_INIT3B ; IF SO, SKIP MEDIA CHECK
CP DIODEV_IMM ; IMM (ZIP DRIVE) IS REMOVABLE CP DIODEV_IMM ; IMM (ZIP DRIVE) IS REMOVABLE
JR Z,DRV_INIT3B ; IF SO, SKIP MEDIA CHECK JR Z,DRV_INIT3B ; IF SO, SKIP MEDIA CHECK
CP DIODEV_SYQ ; IMM (ZIP DRIVE) IS REMOVABLE
JR Z,DRV_INIT3B ; IF SO, SKIP MEDIA CHECK
; CHECK FOR ACTIVE AND RETURN IF NOT ; CHECK FOR ACTIVE AND RETURN IF NOT
PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER) PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER)
@ -3401,7 +3403,7 @@ DEV08 .DB "PPPSD$"
DEV09 .DB "HDSK$" DEV09 .DB "HDSK$"
DEV10 .DB "PPA$" DEV10 .DB "PPA$"
DEV11 .DB "IMM$" DEV11 .DB "IMM$"
DEV12 .EQU DEVUNK
DEV12 .DB "SYQ$"
DEV13 .EQU DEVUNK DEV13 .EQU DEVUNK
DEV14 .EQU DEVUNK DEV14 .EQU DEVUNK
DEV15 .EQU DEVUNK DEV15 .EQU DEVUNK

2
Source/CPM3/boot.z80
View File

@ -186,6 +186,8 @@ dinit3a:
jr z,dinit3b ; if so, skip media check jr z,dinit3b ; if so, skip media check
cp 0B0h ; imm (zip drive) is removable cp 0B0h ; imm (zip drive) is removable
jr z,dinit3b ; if so, skip media check jr z,dinit3b ; if so, skip media check
cp 0C0h ; syq (syquest drive) is removable
jr z,dinit3b ; if so, skip media check
; check for active and return if not ; check for active and return if not
push de ; save de (hard disk volume counter) push de ; save de (hard disk volume counter)

2
Source/HBIOS/cfg_dyno.asm
View File

@ -256,6 +256,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

11
Source/HBIOS/cfg_master.asm
View File

@ -320,17 +320,24 @@ LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM) PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2) PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPAMODE .EQU PPAMODE_SPP ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2) IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

7
Source/HBIOS/cfg_mbc.asm
View File

@ -255,6 +255,13 @@ IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_mk4.asm
View File

@ -258,6 +258,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_n8.asm
View File

@ -251,6 +251,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

7
Source/HBIOS/cfg_rcz180.asm
View File

@ -277,6 +277,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

7
Source/HBIOS/cfg_rcz280.asm
View File

@ -281,6 +281,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

7
Source/HBIOS/cfg_rcz80.asm
View File

@ -275,6 +275,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_rph.asm
View File

@ -240,6 +240,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_sbc.asm
View File

@ -239,6 +239,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

7
Source/HBIOS/cfg_scz180.asm
View File

@ -271,6 +271,13 @@ IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_z80retro.asm
View File

@ -210,6 +210,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_zeta.asm
View File

@ -181,6 +181,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_zeta2.asm
View File

@ -192,6 +192,8 @@ PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
; ;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
; ;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

13
Source/HBIOS/hbios.asm
View File

@ -3245,6 +3245,9 @@ HB_INITTBL:
#IF (IMMENABLE) #IF (IMMENABLE)
.DW IMM_INIT .DW IMM_INIT
#ENDIF #ENDIF
#IF (SYQENABLE)
.DW SYQ_INIT
#ENDIF
#IF (PRPENABLE) #IF (PRPENABLE)
.DW PRP_INIT .DW PRP_INIT
#ENDIF #ENDIF
@ -6372,6 +6375,15 @@ SIZ_IMM .EQU $ - ORG_IMM
.ECHO " bytes.\n" .ECHO " bytes.\n"
#ENDIF #ENDIF
; ;
#IF (SYQENABLE)
ORG_SYQ .EQU $
#INCLUDE "syq.asm"
SIZ_SYQ .EQU $ - ORG_SYQ
.ECHO "SYQ occupies "
.ECHO SIZ_SYQ
.ECHO " bytes.\n"
#ENDIF
;
#IF (TERMENABLE) #IF (TERMENABLE)
ORG_TERM .EQU $ ORG_TERM .EQU $
#INCLUDE "term.asm" #INCLUDE "term.asm"
@ -7158,6 +7170,7 @@ PS_DDPPPSD .TEXT "PPPSD$"
PS_DDHDSK .TEXT "HDSK$" PS_DDHDSK .TEXT "HDSK$"
PS_DDPPA .TEXT "PPA$" PS_DDPPA .TEXT "PPA$"
PS_DDIMM .TEXT "IMM$" PS_DDIMM .TEXT "IMM$"
PS_DDSYQ .TEXT "SYQ$"
; ;
; DISK TYPE STRINGS ; DISK TYPE STRINGS
; ;

1
Source/HBIOS/hbios.inc
View File

@ -323,6 +323,7 @@ DIODEV_PPPSD .EQU $80
DIODEV_HDSK .EQU $90 DIODEV_HDSK .EQU $90
DIODEV_PPA .EQU $A0 DIODEV_PPA .EQU $A0
DIODEV_IMM .EQU $B0 DIODEV_IMM .EQU $B0
DIODEV_SYQ .EQU $C0
; ;
; RTC DEVICE IDS ; RTC DEVICE IDS
; ;

137
Source/HBIOS/imm.asm
View File

@ -78,7 +78,7 @@
; - THIS DRIVER IS FOR THE ZIP DRIVE IMM INTERFACE. IT WILL SIMPLY ; - THIS DRIVER IS FOR THE ZIP DRIVE IMM INTERFACE. IT WILL SIMPLY
; FAIL TO EVEN RECOGNIZE A ZIP DRIVE WITH THE OLDER PPA INTERFACE. ; FAIL TO EVEN RECOGNIZE A ZIP DRIVE WITH THE OLDER PPA INTERFACE.
; THERE DOES NOT SEEM TO BE A WAY TO VISUALLY DETERMINE IF A ZIP ; THERE DOES NOT SEEM TO BE A WAY TO VISUALLY DETERMINE IF A ZIP
; DRIVE IS IMM OR PPA. SIGH.
; DRIVE IS PPA OR IMM. SIGH.
; ;
; - THERE ARE SOME HARD CODED TIMEOUT LOOPS IN THE CODE. THEY ARE ; - THERE ARE SOME HARD CODED TIMEOUT LOOPS IN THE CODE. THEY ARE
; WORKING OK ON A 7 MHZ Z80. THEY ARE LIKELY TO NEED TWEAKING ON ; WORKING OK ON A 7 MHZ Z80. THEY ARE LIKELY TO NEED TWEAKING ON
@ -130,6 +130,11 @@ IMM_IOBASE .EQU 3 ; IO BASE ADDRESS (BYTE)
IMM_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD) IMM_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
IMM_LBA .EQU 8 ; OFFSET OF LBA (DWORD) IMM_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
; ;
; MACROS
;
#DEFINE IMM_WCTL(VAL) LD A,VAL \ CALL IMM_WRITECTRL
#DEFINE IMM_WDATA(VAL) LD A,VAL \ CALL IMM_WRITEDATA
;
;============================================================================= ;=============================================================================
; INITIALIZATION ENTRY POINT ; INITIALIZATION ENTRY POINT
;============================================================================= ;=============================================================================
@ -289,7 +294,7 @@ IMM_READ:
; ;
; ;
IMM_WRITE: IMM_WRITE:
CALL HB_DSKREAD ; HOOK DISK WRITE CONTROLLER
CALL HB_DSKWRITE ; HOOK DISK WRITE CONTROLLER
LD A,SCSI_CMD_WRITE ; SETUP SCSI WRITE LD A,SCSI_CMD_WRITE ; SETUP SCSI WRITE
LD (IMM_CMD_RW),A ; AND SAVE IT IN SCSI CMD LD (IMM_CMD_RW),A ; AND SAVE IT IN SCSI CMD
JP IMM_IO ; DO THE I/O JP IMM_IO ; DO THE I/O
@ -445,6 +450,10 @@ IMM_WRITECTRL:
#IF (IMMMODE == IMMMODE_MG014 #IF (IMMMODE == IMMMODE_MG014
XOR $0B | $80 ; HIGH BIT IS MG014 LED XOR $0B | $80 ; HIGH BIT IS MG014 LED
#ENDIF #ENDIF
;#IF (IMMMODE == IMMMODE_SPP
; AND %00001111
; OR %11000000
;#ENDIF
LD C,(IY+IMM_IOBASE) ; GET BASE IO ADDRESS LD C,(IY+IMM_IOBASE) ; GET BASE IO ADDRESS
INC C ; BUMP TO CONTROL PORT INC C ; BUMP TO CONTROL PORT
INC C INC C
@ -503,28 +512,28 @@ IMM_READSTATUS5:
; ;
IMM_CPP: IMM_CPP:
PUSH AF PUSH AF
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$AA \ CALL IMM_WRITEDATA
LD A,$55 \ CALL IMM_WRITEDATA
LD A,$00 \ CALL IMM_WRITEDATA
LD A,$FF \ CALL IMM_WRITEDATA
IMM_WCTL($0C)
IMM_WDATA($AA)
IMM_WDATA($55)
IMM_WDATA($00)
IMM_WDATA($FF)
CALL IMM_READSTATUS CALL IMM_READSTATUS
AND $B8 AND $B8
LD (IMM_S1),A LD (IMM_S1),A
LD A,$87 \ CALL IMM_WRITEDATA
IMM_WDATA($87)
CALL IMM_READSTATUS CALL IMM_READSTATUS
AND $B8 AND $B8
LD (IMM_S2),A LD (IMM_S2),A
LD A,$78 \ CALL IMM_WRITEDATA
IMM_WDATA($78)
CALL IMM_READSTATUS CALL IMM_READSTATUS
AND $38 AND $38
LD (IMM_S3),A LD (IMM_S3),A
POP AF POP AF
CALL IMM_WRITEDATA CALL IMM_WRITEDATA
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$0D \ CALL IMM_WRITECTRL
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$FF \ CALL IMM_WRITEDATA
IMM_WCTL($0C)
IMM_WCTL($0D)
IMM_WCTL($0C)
IMM_WDATA($FF)
; ;
; CONNECT: S1=$B8 S2=$18 S3=$30 ; CONNECT: S1=$B8 S2=$18 S3=$30
; DISCONNECT: S1=$B8 S2=$18 S3=$38 ; DISCONNECT: S1=$B8 S2=$18 S3=$38
@ -567,23 +576,23 @@ IMM_DISCONNECT:
CALL IMM_CPP CALL IMM_CPP
; ;
; TURNS OFF MG014 LED ; TURNS OFF MG014 LED
LD A,$8C \ CALL IMM_WRITECTRL
IMM_WCTL($8C)
; ;
RET RET
; ;
; INITIATE A SCSI BUS RESET. ; INITIATE A SCSI BUS RESET.
; ;
IMM_RESETPULSE: IMM_RESETPULSE:
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$40 \ CALL IMM_WRITEDATA
IMM_WCTL($04)
IMM_WDATA($40)
CALL DELAY ; 16 US, IDEALLY, 1 US CALL DELAY ; 16 US, IDEALLY, 1 US
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$0D \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
IMM_WCTL($0D)
CALL DELAY ; 48 US, IDEALLY, 50 US CALL DELAY ; 48 US, IDEALLY, 50 US
CALL DELAY CALL DELAY
CALL DELAY CALL DELAY
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
IMM_WCTL($04)
RET RET
; ;
; SCSI SELECT PROCESS ; SCSI SELECT PROCESS
@ -592,7 +601,7 @@ IMM_SELECT:
#IF (IMMTRACE >= 3) #IF (IMMTRACE >= 3)
PRTS("\r\nSELECT: $") PRTS("\r\nSELECT: $")
#ENDIF #ENDIF
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
; ;
LD HL,500 ; TIMEOUT COUNTER LD HL,500 ; TIMEOUT COUNTER
; ;
@ -607,12 +616,12 @@ IMM_SELECT1:
JR IMM_SELECT1 JR IMM_SELECT1
; ;
IMM_SELECT2: IMM_SELECT2:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
; PLACE HOST AND TARGET BIT ON DATA BUS ; PLACE HOST AND TARGET BIT ON DATA BUS
LD A,$80 | (1 << IMM_TGT) LD A,$80 | (1 << IMM_TGT)
CALL IMM_WRITEDATA CALL IMM_WRITEDATA
CALL DELAY ; CONFIRM DELAY TIME? CALL DELAY ; CONFIRM DELAY TIME?
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
; ;
#IF (IMMTRACE >= 3) #IF (IMMTRACE >= 3)
CALL IMM_READSTATUS CALL IMM_READSTATUS
@ -620,7 +629,7 @@ IMM_SELECT2:
CALL PRTHEXBYTE CALL PRTHEXBYTE
#ENDIF #ENDIF
; ;
LD A,$0D \ CALL IMM_WRITECTRL
IMM_WCTL($0D)
; ;
#IF (IMMTRACE >= 3) #IF (IMMTRACE >= 3)
CALL IMM_READSTATUS CALL IMM_READSTATUS
@ -645,7 +654,7 @@ IMM_SELECT3:
JR IMM_SELECT3 JR IMM_SELECT3
; ;
IMM_SELECT4: IMM_SELECT4:
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
; ;
XOR A XOR A
RET RET
@ -675,7 +684,7 @@ IMM_SENDCMD:
; ;
INC HL ; BACK TO FIRST CMD BYTE INC HL ; BACK TO FIRST CMD BYTE
IMM_SENDCMD1: IMM_SENDCMD1:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
LD A,(HL) ; LOAD CMD BYTE LD A,(HL) ; LOAD CMD BYTE
; ;
#IF (IMMTRACE >= 3) #IF (IMMTRACE >= 3)
@ -686,8 +695,8 @@ IMM_SENDCMD1:
CALL IMM_WRITEDATA ; PUT IT ON THE BUS CALL IMM_WRITEDATA ; PUT IT ON THE BUS
INC HL ; BUMP TO NEXT BYTE INC HL ; BUMP TO NEXT BYTE
DEC B ; DEC LOOP COUNTER DEC B ; DEC LOOP COUNTER
LD A,$05
CALL IMM_WRITECTRL \ LD A,(HL) ; LOAD CMD BYTE
IMM_WCTL($05)
LD A,(HL) ; LOAD CMD BYTE
; ;
#IF (IMMTRACE >= 3) #IF (IMMTRACE >= 3)
CALL PC_SPACE CALL PC_SPACE
@ -696,11 +705,11 @@ IMM_SENDCMD1:
; ;
CALL IMM_WRITEDATA ; PUT IT ON THE BUS CALL IMM_WRITEDATA ; PUT IT ON THE BUS
INC HL ; BUMP TO NEXT BYTE INC HL ; BUMP TO NEXT BYTE
LD A,$00 \ CALL IMM_WRITECTRL
IMM_WCTL($00)
DJNZ IMM_SENDCMD1 ; LOOP TILL DONE DJNZ IMM_SENDCMD1 ; LOOP TILL DONE
; ;
IMM_SENDCMD2: IMM_SENDCMD2:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
; ;
RET RET
; ;
@ -718,11 +727,11 @@ IMM_WAITLOOP:
; ;
IMM_WAIT: IMM_WAIT:
LD HL,500 ; GOOD VALUE??? LD HL,500 ; GOOD VALUE???
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
CALL IMM_WAITLOOP CALL IMM_WAITLOOP
JP Z,IMM_CMD_TIMEOUT ; HANDLE TIMEOUT JP Z,IMM_CMD_TIMEOUT ; HANDLE TIMEOUT
PUSH AF PUSH AF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
POP AF POP AF
AND $B8 AND $B8
RET ; RETURN W/ RESULT IN A RET ; RETURN W/ RESULT IN A
@ -731,7 +740,7 @@ IMM_WAIT:
; ;
IMM_LONGWAIT: IMM_LONGWAIT:
LD B,3 ; VALUE??? LD B,3 ; VALUE???
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
IMM_LONGWAIT1: IMM_LONGWAIT1:
LD HL,0 LD HL,0
CALL IMM_WAITLOOP CALL IMM_WAITLOOP
@ -741,7 +750,7 @@ IMM_LONGWAIT1:
; ;
IMM_LONGWAIT2: IMM_LONGWAIT2:
PUSH AF PUSH AF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
; ;
#IF 0 #IF 0
CALL PC_GT CALL PC_GT
@ -761,19 +770,19 @@ IMM_NEGOTIATE:
#IF (IMMTRACE >= 3) #IF (IMMTRACE >= 3)
PRTS("\r\nNEGO: $") PRTS("\r\nNEGO: $")
#ENDIF #ENDIF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
CALL DELAY ; 16 US, IDEALLY 5 US CALL DELAY ; 16 US, IDEALLY 5 US
LD A,$00 \ CALL IMM_WRITEDATA
IMM_WDATA($00)
LD DE,7 ; 112 US, IDEALLY 100 US LD DE,7 ; 112 US, IDEALLY 100 US
CALL VDELAY CALL VDELAY
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
CALL DELAY ; 16 US, IDEALLY 5 US CALL DELAY ; 16 US, IDEALLY 5 US
CALL IMM_READSTATUS CALL IMM_READSTATUS
PUSH AF ; SAVE RESULT PUSH AF ; SAVE RESULT
CALL DELAY ; 16 US, IDEALLY 5 US CALL DELAY ; 16 US, IDEALLY 5 US
LD A,$07 \ CALL IMM_WRITECTRL
IMM_WCTL($07)
CALL DELAY ; 16 US, IDEALLY 5 US CALL DELAY ; 16 US, IDEALLY 5 US
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
; ;
POP AF POP AF
; ;
@ -799,7 +808,7 @@ IMM_NEGOTIATE:
; ;
IMM_GETBYTE: IMM_GETBYTE:
CALL IMM_WAIT CALL IMM_WAIT
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
CALL IMM_READSTATUS CALL IMM_READSTATUS
AND $F0 AND $F0
RRCA RRCA
@ -807,13 +816,13 @@ IMM_GETBYTE:
RRCA RRCA
RRCA RRCA
PUSH AF PUSH AF
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
CALL IMM_READSTATUS CALL IMM_READSTATUS
AND $F0 AND $F0
POP HL POP HL
OR H OR H
PUSH AF PUSH AF
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
POP AF POP AF
RET RET
; ;
@ -844,8 +853,8 @@ IMM_GETDATA1:
POP HL ; RESTORE BYTE COUNTER POP HL ; RESTORE BYTE COUNTER
CP $98 ; CHECK FOR READ PHASE CP $98 ; CHECK FOR READ PHASE
JR NZ,IMM_GETDATA2 ; IF NOT, ASSUME WE ARE DONE JR NZ,IMM_GETDATA2 ; IF NOT, ASSUME WE ARE DONE
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_WCTL($06)
CALL IMM_READSTATUS ; GET FIRST NIBBLE CALL IMM_READSTATUS ; GET FIRST NIBBLE
AND $F0 ; ISOLATE BITS AND $F0 ; ISOLATE BITS
RRCA ; AND SHIFT TO LOW NIBBLE RRCA ; AND SHIFT TO LOW NIBBLE
@ -853,7 +862,7 @@ IMM_GETDATA1:
RRCA RRCA
RRCA RRCA
PUSH AF ; SAVE WORKING VALUE PUSH AF ; SAVE WORKING VALUE
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
CALL IMM_READSTATUS ; GET SECOND NIBBLE CALL IMM_READSTATUS ; GET SECOND NIBBLE
AND $F0 ; ISOLATE BITS AND $F0 ; ISOLATE BITS
POP BC ; RECOVER LOW NIBBLE POP BC ; RECOVER LOW NIBBLE
@ -861,8 +870,8 @@ IMM_GETDATA1:
LD (DE),A ; AND SAVE THE FULL BYTE VALUE LD (DE),A ; AND SAVE THE FULL BYTE VALUE
INC DE ; NEXT BUFFER POS INC DE ; NEXT BUFFER POS
INC HL ; INCREMENT BYTES COUNTER INC HL ; INCREMENT BYTES COUNTER
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_WCTL($0C)
JR IMM_GETDATA1 ; LOOP TILL DONE JR IMM_GETDATA1 ; LOOP TILL DONE
; ;
IMM_GETDATA2: IMM_GETDATA2:
@ -884,9 +893,9 @@ IMM_GETDATALEN:
PRTS(" BYTES$") PRTS(" BYTES$")
#ENDIF #ENDIF
; ;
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_GETDATALEN1: IMM_GETDATALEN1:
LD A,$06 \ CALL IMM_WRITECTRL
IMM_WCTL($06)
CALL IMM_READSTATUS ; GET FIRST NIBBLE CALL IMM_READSTATUS ; GET FIRST NIBBLE
AND $F0 ; ISOLATE BITS AND $F0 ; ISOLATE BITS
RRCA ; MOVE TO LOW NIBBLE RRCA ; MOVE TO LOW NIBBLE
@ -894,7 +903,7 @@ IMM_GETDATALEN1:
RRCA RRCA
RRCA RRCA
PUSH AF ; SAVE WORKING VALUE PUSH AF ; SAVE WORKING VALUE
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
CALL IMM_READSTATUS ; GET SECOND NIBBLE CALL IMM_READSTATUS ; GET SECOND NIBBLE
AND $F0 ; ISOLATE BITS AND $F0 ; ISOLATE BITS
POP BC ; RECOVER FIRST NIBBLE POP BC ; RECOVER FIRST NIBBLE
@ -902,11 +911,11 @@ IMM_GETDATALEN1:
LD (DE),A ; SAVE FINAL BYTE VALUE LD (DE),A ; SAVE FINAL BYTE VALUE
INC DE ; NEXT BUFFER POS INC DE ; NEXT BUFFER POS
DEC HL ; DEC LOOP COUNTER DEC HL ; DEC LOOP COUNTER
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
LD A,H ; CHECK LOOP COUNTER LD A,H ; CHECK LOOP COUNTER
OR L OR L
JR NZ,IMM_GETDATALEN1 ; LOOP IF NOT DONE JR NZ,IMM_GETDATALEN1 ; LOOP IF NOT DONE
LD A,$0C \ CALL IMM_WRITECTRL
IMM_WCTL($0C)
RET RET
; ;
; PUT A CHUNK OF DATA TO THE SCSI BUS. THIS IS SPECIFICALLY FOR ; PUT A CHUNK OF DATA TO THE SCSI BUS. THIS IS SPECIFICALLY FOR
@ -935,21 +944,21 @@ IMM_PUTDATA1:
POP HL ; RESTORE BYTE COUNTER POP HL ; RESTORE BYTE COUNTER
CP $88 ; CHECK FOR WRITE PHASE CP $88 ; CHECK FOR WRITE PHASE
JR NZ,IMM_PUTDATA2 ; IF NOT, ASSUME WE ARE DONE JR NZ,IMM_PUTDATA2 ; IF NOT, ASSUME WE ARE DONE
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
LD A,(DE) ; GET NEXT BYTE TO WRITE (FIRST OF PAIR) LD A,(DE) ; GET NEXT BYTE TO WRITE (FIRST OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; BUMP TO NEXT BUF POS INC DE ; BUMP TO NEXT BUF POS
INC HL ; INCREMENT COUNTER INC HL ; INCREMENT COUNTER
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
LD A,(DE) ; GET NEXT BYTE TO WRITE (SECOND OF PAIR) LD A,(DE) ; GET NEXT BYTE TO WRITE (SECOND OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; BUMP TO NEXT BUF POS INC DE ; BUMP TO NEXT BUF POS
INC HL ; INCREMENT COUNTER INC HL ; INCREMENT COUNTER
LD A,$00 \ CALL IMM_WRITECTRL
IMM_WCTL($00)
JR IMM_PUTDATA1 ; LOOP TILL DONE JR IMM_PUTDATA1 ; LOOP TILL DONE
; ;
IMM_PUTDATA2: IMM_PUTDATA2:
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
; ;
#IF (IMMTRACE >= 3) #IF (IMMTRACE >= 3)
CALL PC_SPACE CALL PC_SPACE
@ -968,22 +977,22 @@ IMM_PUTDATALEN:
PRTS(" BYTES$") PRTS(" BYTES$")
#ENDIF #ENDIF
; ;
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_PUTDATALEN1: IMM_PUTDATALEN1:
LD A,(DE) ; GET NEXT BYTE (FIRST OF PAIR) LD A,(DE) ; GET NEXT BYTE (FIRST OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; INCREMENT BUF POS INC DE ; INCREMENT BUF POS
DEC HL ; DEC LOOP COUNTER DEC HL ; DEC LOOP COUNTER
LD A,$05 \ CALL IMM_WRITECTRL
IMM_WCTL($05)
LD A,(DE) ; GET NEXT BYTE (SECOND OF PAIR) LD A,(DE) ; GET NEXT BYTE (SECOND OF PAIR)
CALL IMM_WRITEDATA ; PUT ON BUS CALL IMM_WRITEDATA ; PUT ON BUS
INC DE ; INCREMENT BUF POS INC DE ; INCREMENT BUF POS
DEC HL ; DEC LOOP COUNTER DEC HL ; DEC LOOP COUNTER
LD A,$00 \ CALL IMM_WRITECTRL
IMM_WCTL($00)
LD A,H ; CHECK LOOP COUNTER LD A,H ; CHECK LOOP COUNTER
OR L OR L
JR NZ,IMM_PUTDATALEN1 ; LOOP TILL DONE JR NZ,IMM_PUTDATALEN1 ; LOOP TILL DONE
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
RET RET
; ;
; READ SCSI COMMAND STATUS ; READ SCSI COMMAND STATUS
@ -1018,10 +1027,10 @@ IMM_GETSTATUS:
; TERMINATE A BULD READ OPERATION ; TERMINATE A BULD READ OPERATION
; ;
IMM_ENDREAD: IMM_ENDREAD:
LD A,$04 \ CALL IMM_WRITECTRL
LD A,$0C \ CALL IMM_WRITECTRL
LD A,$0E \ CALL IMM_WRITECTRL
LD A,$04 \ CALL IMM_WRITECTRL
IMM_WCTL($04)
IMM_WCTL($0C)
IMM_WCTL($0E)
IMM_WCTL($04)
RET RET
; ;
; THIS IS THE MAIN SCSI ENGINE. BASICALLY, IT SELECTS THE DEVICE ; THIS IS THE MAIN SCSI ENGINE. BASICALLY, IT SELECTS THE DEVICE

17
Source/HBIOS/ppa.asm
View File

@ -71,14 +71,16 @@
; ;
; TODO: ; TODO:
; ;
; - CURRENTLY HAS ONLY DETECTION LOGIC. NEED TO WRITE THE REST!!!
;
; - OPTIMIZE READ/WRITE LOOPS ; - OPTIMIZE READ/WRITE LOOPS
; ;
; NOTES: ; NOTES:
; ;
; - THIS DRIVER IS FOR THE ZIP DRIVE PPA INTERFACE. IT WILL SIMPLY ; - THIS DRIVER IS FOR THE ZIP DRIVE PPA INTERFACE. IT WILL SIMPLY
; FAIL TO EVEN RECOGNIZE A ZIP DRIVE WITH THE OLDER PPA INTERFACE.
; FAIL TO EVEN RECOGNIZE A ZIP DRIVE WITH THE NEWER IMM INTERFACE.
; THERE DOES NOT SEEM TO BE A WAY TO VISUALLY DETERMINE IF A ZIP ; THERE DOES NOT SEEM TO BE A WAY TO VISUALLY DETERMINE IF A ZIP
; DRIVE IS PPA OR PPA. SIGH.
; DRIVE IS PPA OR IMM. SIGH.
; ;
; - THERE ARE SOME HARD CODED TIMEOUT LOOPS IN THE CODE. THEY ARE ; - THERE ARE SOME HARD CODED TIMEOUT LOOPS IN THE CODE. THEY ARE
; WORKING OK ON A 7 MHZ Z80. THEY ARE LIKELY TO NEED TWEAKING ON ; WORKING OK ON A 7 MHZ Z80. THEY ARE LIKELY TO NEED TWEAKING ON
@ -130,6 +132,11 @@ PPA_IOBASE .EQU 3 ; IO BASE ADDRESS (BYTE)
PPA_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD) PPA_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
PPA_LBA .EQU 8 ; OFFSET OF LBA (DWORD) PPA_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
; ;
; MACROS
;
#DEFINE PPA_WCTL(VAL) LD A,VAL \ CALL PPA_WRITECTRL
#DEFINE PPA_WDATA(VAL) LD A,VAL \ CALL PPA_WRITEDATA
;
;============================================================================= ;=============================================================================
; INITIALIZATION ENTRY POINT ; INITIALIZATION ENTRY POINT
;============================================================================= ;=============================================================================
@ -303,7 +310,7 @@ PPA_READ:
; ;
; ;
PPA_WRITE: PPA_WRITE:
CALL HB_DSKREAD ; HOOK DISK WRITE CONTROLLER
CALL HB_DSKWRITE ; HOOK DISK WRITE CONTROLLER
LD A,SCSI_CMD_WRITE ; SETUP SCSI WRITE LD A,SCSI_CMD_WRITE ; SETUP SCSI WRITE
LD (PPA_CMD_RW),A ; AND SAVE IT IN SCSI CMD LD (PPA_CMD_RW),A ; AND SAVE IT IN SCSI CMD
JP PPA_IO ; DO THE I/O JP PPA_IO ; DO THE I/O
@ -463,7 +470,7 @@ PPA_WAITDONE1:
DEC HL DEC HL
LD A,H LD A,H
OR L OR L
JP Z,IMM_CMD_TIMEOUT ; TIMEOUT
;JP Z,PPA_CMD_TIMEOUT ; TIMEOUT
JR PPA_WAITDONE1 JR PPA_WAITDONE1
; ;
; OUTPUT BYTE IN A TO THE DATA PORT ; OUTPUT BYTE IN A TO THE DATA PORT
@ -772,7 +779,7 @@ PPA_PRTPREFIX:
PUSH AF PUSH AF
CALL NEWLINE CALL NEWLINE
PRTS("PPA$") PRTS("PPA$")
LD A,(IY+IMM_DEV) ; GET CURRENT DEVICE NUM
LD A,(IY+PPA_DEV) ; GET CURRENT DEVICE NUM
CALL PRTDECB CALL PRTDECB
CALL PC_COLON CALL PC_COLON
POP AF POP AF

6
Source/HBIOS/std.asm
View File

@ -260,6 +260,12 @@ IMMMODE_NONE .EQU 0 ; NONE
IMMMODE_SPP .EQU 1 ; IBM PC STANDARD PAR PORT (SPP) IMMMODE_SPP .EQU 1 ; IBM PC STANDARD PAR PORT (SPP)
IMMMODE_MG014 .EQU 2 ; RCBUS MG014 STYLE INTERFACE IMMMODE_MG014 .EQU 2 ; RCBUS MG014 STYLE INTERFACE
; ;
; SYQ DRIVER MODE SELECTIONS
;
SYQMODE_NONE .EQU 0 ; NONE
SYQMODE_SPP .EQU 1 ; IBM PC STANDARD PAR PORT (SPP)
SYQMODE_MG014 .EQU 2 ; RCBUS MG014 STYLE INTERFACE
;
; GDC MONITOR SELECTIONS ; GDC MONITOR SELECTIONS
; ;
GDCMON_NONE .EQU 0 GDCMON_NONE .EQU 0

1327
Source/HBIOS/syq.asm
View File

File diff suppressed because it is too large

2
Source/ver.inc
View File

@ -2,7 +2,7 @@
#DEFINE RMN 3 #DEFINE RMN 3
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.3.0-dev.17"
#DEFINE BIOSVER "3.3.0-dev.18"
#define rmj RMJ #define rmj RMJ
#define rmn RMN #define rmn RMN
#define rup RUP #define rup RUP

2
Source/ver.lib
View File

@ -3,5 +3,5 @@ rmn equ 3
rup equ 0 rup equ 0
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.3.0-dev.17"
db "3.3.0-dev.18"
endm endm

Write Preview
Loading…
Cancel
Save