MirrorRepos/RomWBW
1
0
Fork 1
mirror of https://github.com/wwarthen/RomWBW.git synced 2026-02-06 14:11:48 -06:00
Code Issues Projects Releases Wiki Activity

Support S100 Propeller Console

Browse Source
This commit is contained in:
Wayne Warthen
2023-09-07 18:16:25 -07:00
parent e69caf5059
commit c391fd6d56
23 changed files with 184 additions and 43 deletions
Download Patch File Download Diff File Expand all files Collapse all files

31
Source/Apps/Test/I2C/srom.asm
View File

@@ -7,9 +7,7 @@
; PCF8584 controller.
;
; WBW 2023-09-05: Initial release
;
; TODO:
; - Fix page read loop end game
; WBW 2023-09-07: Code clean up
;
;=======================================================================
;
@@ -732,11 +730,7 @@ rom_write:
ld a,(romadr) ; load ROM I2C adress
rlca ; move to top 7 bits
res 0,a ; clear low bit for write
push de
push hl
call pcf_start ; generate start
pop hl
pop de
jr nz,rom_write_z ; if error, skip write
;
; Send ROM address
@@ -815,11 +809,7 @@ rom_read:
ld a,(romadr) ; load ROM I2C adress
rlca ; move to top 7 bits
res 0,a ; clear low bit for write
push de
push hl
call pcf_start ; generate start
pop hl
pop de
jr nz,rom_read_z ; if error, skip write
;
rom_read2:
@@ -837,11 +827,7 @@ rom_read2:
ld a,(romadr) ; load ROM I2C address
rlca ; move to top 7 bits
set 0,a ; set low bit for read
push de ; save buffer pointer
push hl ; save buffer length
call pcf_repstart ; generate repeat start
pop hl ; restore buffer length
pop de ; restore buffer pointer
jr nz,rom_read_z ; if error, bail out
;
; Read data into buffer
@@ -934,7 +920,7 @@ pcf_start:
;pop de
;
; Wait for I2C bus clear
ld l,a ; save start byte to L
ld b,a ; move start byte to B
call pcf_waitbb ; wait while bus busy
cp $FF ; timeout?
jp z,err_timeout ; timeout error return
@@ -942,10 +928,10 @@ pcf_start:
; Set start byte w/ slave address in S0
ld a,(pcf_dat) ; data port
ld c,a ; ... into C
ld a,l ; value to A
;ld a,b
;call prtsp
;call prthex
out (c),a ; send start byte
out (c),b ; send start byte
;
; Initiate start operation
inc c ; ctl port
@@ -966,7 +952,7 @@ pcf_repstart:
;pop de
;
; Send repeat start command
ld l,a ; save start byte to L
ld b,a ; move start byte to B
ld a,(pcf_ctl) ; control port
ld c,a ; ... into C
ld a,pcf_op_repstart ; command
@@ -975,10 +961,10 @@ pcf_repstart:
; Set start byte w/ slave address in S0
ld a,(pcf_dat) ; data port
ld c,a ; ... into C
ld a,l ; value to A
;ld a,b
;call prtsp
;call prthex
out (c),a ; send start byte
out (c),b ; send start byte
;
xor a ; signal success
ret ; done
@@ -1101,9 +1087,6 @@ pcf_read2:
ld c,a ; ... into C
ld a,$40 ; prep for neg ack
out (c),a ; send it
;
; FIX: Final data byte should not be read until AFTER
; stop condition!!!
;
; Get final data byte
ld a,(pcf_dat) ; data port

9
Source/HBIOS/Config/S100_std.asm
View File

@@ -27,18 +27,17 @@
#include "cfg_s100.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z180_MEMWAIT .SET 1 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 2 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SCONENABLE .SET TRUE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

1
Source/HBIOS/cfg_duo.asm
View File

@@ -167,6 +167,7 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_dyno.asm
View File

@@ -179,6 +179,7 @@ TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_master.asm
View File

@@ -236,6 +236,7 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_mbc.asm
View File

@@ -164,6 +164,7 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_mk4.asm
View File

@@ -175,6 +175,7 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_n8.asm
View File

@@ -177,6 +177,7 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_rcz180.asm
View File

@@ -185,6 +185,7 @@ TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_rcz280.asm
View File

@@ -189,6 +189,7 @@ TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_rcz80.asm
View File

@@ -183,6 +183,7 @@ TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_rph.asm
View File

@@ -166,6 +166,7 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

9
Source/HBIOS/cfg_s100.asm
View File

@@ -46,8 +46,8 @@ MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
;
Z180_BASE .EQU $C0 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
Z180_CLKDIV .EQU 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .EQU 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z180_MEMWAIT .EQU 1 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .EQU 2 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z180_TIMER .EQU TRUE ; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
;
RTCIO .EQU $0C ; RTC LATCH REGISTER ADR
@@ -125,7 +125,7 @@ DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
@@ -148,7 +148,7 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -179,6 +179,7 @@ TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_sbc.asm
View File

@@ -164,6 +164,7 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_scz180.asm
View File

@@ -179,6 +179,7 @@ TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_z80retro.asm
View File

@@ -166,6 +166,7 @@ TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_zeta.asm
View File

@@ -136,6 +136,7 @@ TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

1
Source/HBIOS/cfg_zeta2.asm
View File

@@ -147,6 +147,7 @@ TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK

32
Source/HBIOS/hbios.asm
View File

@@ -1112,13 +1112,7 @@ Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 n
DI ; NO INTERRUPTS
IM 1 ; INTERRUPT MODE 1
;
#IF ((PLATFORM == PLT_DUO) & FALSE)
; WAIT A WHILE
LD B,0
DJNZ $
#ENDIF
;
#IF ((PLATFORM == PLT_DUO) & FALSE)
#IF ((PLATFORM == PLT_DUO) & TRUE)
; WAIT A WHILE
LD HL,0
BOOTWAIT:
@@ -2847,6 +2841,12 @@ HB_WDZ:
BIT 6,A ; BIT 6 HAS CONFIG JUMPER STATE
JR Z,INITSYS3 ; Z=SHORTED, BYPASS CONSOLE SWITCH
#ENDIF
;
#IF (PLATFORM == PLT_S100)
IN A,($75) ; GET IO BYTE
AND %00000001 ; ISOLATE CONSOLE BIT
JR NZ,INITSYS3 ; NOT SET, BYPASS CONSOLE SWITCH
#ENDIF
;
LD A,(CB_CRTDEV) ; GET CRT DISPLAY DEVICE
LD (HB_NEWCON),A ; AND QUEUE TO SWITCH
@@ -3196,6 +3196,9 @@ HB_PCINITTBL:
#IF (TMSENABLE)
.DW TMS_PREINIT
#ENDIF
#IF (SCONENABLE)
.DW SCON_PREINIT
#ENDIF
HB_PCINITTBLLEN .EQU (($ - HB_PCINITTBL) / 2)
;==================================================================================================
@@ -3300,6 +3303,9 @@ HB_INITTBL:
#IF (TMSENABLE)
.DW TMS_INIT
#ENDIF
#IF (SCONENABLE)
.DW SCON_INIT
#ENDIF
#IF (VRCENABLE)
.DW VRC_INIT
#ENDIF
@@ -6361,12 +6367,21 @@ SIZ_VDU .EQU $ - ORG_VDU
#IF (TMSENABLE)
ORG_TMS .EQU $
#INCLUDE "tms.asm"
SIZ_TMS .EQU $ - ORG_TMS
SIZ_TMS .EQU $ - ORG_TMS
.ECHO "TMS occupies "
.ECHO SIZ_TMS
.ECHO " bytes.\n"
#ENDIF
;
#IF (SCONENABLE)
ORG_SCON .EQU $
#INCLUDE "scon.asm"
SIZ_SCON .EQU $ - ORG_SCON
.ECHO "SCON occupies "
.ECHO SIZ_SCON
.ECHO " bytes.\n"
#ENDIF
;
#IF (GDCENABLE)
ORG_GDC .EQU $
#INCLUDE "gdc.asm"
@@ -7420,6 +7435,7 @@ PS_SDZ2U .TEXT "Z2U$"
PS_SDLPT .TEXT "LPT$"
PS_SDESPCON .TEXT "ESPCON$"
PS_SDESPSER .TEXT "ESPSER$"
PS_SDSCON .TEXT "SCON$"
;
; CHARACTER SUB TYPE STRINGS
;

1
Source/HBIOS/hbios.inc
View File

@@ -315,6 +315,7 @@ CIODEV_Z2U .EQU $A0
CIODEV_LPT .EQU $B0
CIODEV_ESPCON .EQU $C0
CIODEV_ESPSER .EQU $D0
CIODEV_SCON .EQU $E0
;
; SUB TYPES OF CHAR DEVICES
;

126
Source/HBIOS/scon.asm Normal file
View File

@@ -0,0 +1,126 @@
;
;==================================================================================================
; S100 PROPELLER CONSOLE DRIVER
;==================================================================================================
;
; TODO:
;
SCON_IOBASE .EQU $00
;
SCON_STATUS .EQU SCON_IOBASE
SCON_DATA .EQU SCON_IOBASE + 1
;
SCON_KBDRDY .EQU %00000010
SCON_DSPRDY .EQU %00000100
;
SCON_COLS .EQU 80
SCON_ROWS .EQU 40
;
;
;
SCON_PREINIT:
XOR A
RET
;
;
;
SCON_INIT:
CALL NEWLINE
PRTS("SCON:$")
;
; DISPLAY CONSOLE DIMENSIONS
CALL PC_SPACE
LD A,SCON_COLS
CALL PRTDECB
LD A,'X'
CALL COUT
LD A,SCON_ROWS
CALL PRTDECB
CALL PRTSTRD
.TEXT " TEXT (ANSI)$"
;
; ADD OURSELVES TO CIO DISPATCH TABLE
;
LD D,0 ; PHYSICAL UNIT IS ZERO
LD E,CIODEV_SCON ; DEVICE TYPE
LD BC,SCON_FNTBL ; BC := FUNCTION TABLE ADDRESS
CALL CIO_ADDENT ; ADD ENTRY, A := UNIT ASSIGNED
LD (HCB + HCB_CRTDEV),A ; SET OURSELVES AS THE CRT DEVICE
;
XOR A ; SIGNAL SUCCESS
RET
;
; DRIVER FUNCTION TABLE
;
SCON_FNTBL:
.DW SCON_IN
.DW SCON_OUT
.DW SCON_IST
.DW SCON_OST
.DW SCON_INITDEV
.DW SCON_QUERY
.DW SCON_DEVICE
#IF (($ - SCON_FNTBL) != (CIO_FNCNT * 2))
.ECHO "*** INVALID SCON FUNCTION TABLE ***\n"
#ENDIF
;
;
;
SCON_IN:
CALL SCON_IST ; CHECK FOR CHAR PENDING
JR Z,SCON_IN ; WAIT FOR IT IF NECESSARY
IN0 A,(SCON_DATA) ; READ THE CHAR FROM PROPIO
LD E,A
RET
;
;
;
SCON_IST:
IN0 A,(SCON_STATUS) ; READ LINE STATUS REGISTER
AND SCON_KBDRDY ; ISOLATE KBDRDY
JP Z,CIO_IDLE ; RETURN VIA IDLE PROCESSING
OR $FF ; SET A=$FF TO SIGNAL READY
RET ; RETURN
;
;
;
SCON_OUT:
CALL SCON_OST ; CHECK FOR OUTPUT READY
JR Z,SCON_OUT ; WAIT IF NECESSARY
LD A,E ; RECOVER THE CHAR TO WRITE
OUT0 (SCON_DATA),A ; WRITE THE CHAR TO PROPIO
RET
;
;
;
SCON_OST:
IN0 A,(SCON_STATUS) ; READ LINE STATUS REGISTER
AND SCON_DSPRDY ; ISOLATE DSPRDY
JP Z,CIO_IDLE ; RETURN VIA IDLE PROCESSING
OR $FF ; SET A=$FF TO SIGNAL READY
RET ; RETURN
;
;
;
SCON_INITDEV:
SYSCHKERR(ERR_NOTIMPL)
RET
;
;
;
SCON_QUERY:
LD DE,0
LD HL,0
XOR A
RET
;
;
;
SCON_DEVICE:
LD D,CIODEV_SCON ; D := DEVICE TYPE
LD E,0 ; E := DEVICE NUM, ALWAYS 0
LD C,$BF ; C := DEVICE TYPE, 0xBF IS PROP TERM
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,SCON_IOBASE ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET

2
Source/ver.inc
View File

@@ -2,7 +2,7 @@
#DEFINE RMN 3
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.3.0-dev.49"
#DEFINE BIOSVER "3.3.0-dev.50"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib
View File

@@ -3,5 +3,5 @@ rmn equ 3
rup equ 0
rtp equ 0
biosver macro
db "3.3.0-dev.49"
db "3.3.0-dev.50"
endm