mirror of https://github.com/wwarthen/RomWBW.git
wayne
13 years ago
11 changed files with 14 additions and 198 deletions
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ROM Page 0 |
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---------- |
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Loc Org Size File Contents |
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0000 0000 0100 pgzero Page Zero |
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0100 0100 0100 bootrom ROM Bootstrap |
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0200 0100 0200 syscfg System Configuration |
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0400 8400 0C00 loader Loader |
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1000 1000 3000 romfill Filler (for future use?) |
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4000 C000 1000 dbgmon Debug Monitor |
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5000 D000 0800 <ccp> Command Processor (CCP, ZCPR, etc.) |
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5800 D800 0E00 <dos> Disk Operating System (BDOS, ZSDOS, etc.) |
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6600 E600 1900 cbios CP/M BIOS |
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7F00 FF00 0100 hbfill Filler for HBIOS Proxy (HiMem Stub) |
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---- |
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8000H = 32768 |
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ROM Page 1 |
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---------- |
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Loc Org Size File Contents |
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0000 0000 0100 pgzero Page Zero |
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0100 0100 0100 bootrom Reserved (unused, 'bootrom' used as filler) |
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0200 0200 0200 syscfg System Configuration |
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0400 0400 0C00 loader Reserved (unused, 'loader' used as filler) |
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1000 1000 7000 bnk1 Bank 1 BIOS Extension |
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---- |
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8000H = 32768 |
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COM File Image |
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-------------- |
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Loc Org Size File Contents |
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0100 0100 0100 bootapp Application Bootstrap |
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0200 0200 0200 syscfg System Configuration |
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0400 8400 0C00 loader Loader |
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1000 1000 7000 bnk1 Bank 1 BIOS Extension |
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8000 C000 1000 dbgmon Debug Monitor |
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9000 D000 0800 <ccp> Command Processor (CCP, ZCPR, etc.) |
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9800 D800 0E00 <dos> Disk Operating System (BDOS, ZSDOS, etc.) |
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A600 E600 1900 cbios CP/M BIOS |
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---- |
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BF00H - 0100H = BE00H = 48640 |
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RAM Page 0 |
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---------- |
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Loc Org Size Contents |
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0000 0000 0100 Page Zero |
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0100 0100 7F00 TPA |
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---- |
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8000H = 32768 |
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RAM Page 1 |
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---------- |
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Loc Org Size Contents |
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0000 0000 0100 Page Zero |
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0100 0100 0100 Reserved (unused) |
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0200 0200 0200 System Configuration (dynamic) |
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0400 0400 0C00 Command processor cache area |
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1000 1000 7000 Bank 1 BIOS Extension |
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---- |
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8000H = 32768 |
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RAM Page N |
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---------- |
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Loc Org Size Contents |
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8000 8000 TPA |
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C000 C000 1000 TPA/Debug Monitor |
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D000 D000 0800 Command Processor |
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D800 D800 0E00 Disk Operating System |
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E600 E600 1900 CP/M CBIOS |
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FF00 FF00 0100 HBIOS Proxy (HiMem Stub) |
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---- |
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10000H - 8000H = 8000H = 32768 |
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General Startup Strategy |
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------------------------ |
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A two phase boot strategy is employed. This is necessary |
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because at cold start, the CPU is executing code in lower |
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memory which is the same area that is bank switched. |
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Phase 1 of booting copies phase 2 code to upper memory |
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and jumps to it to continue the boot process. |
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Phase 2 of booting manages the setup of the RAM page |
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banks as needed. In the case of a hardware startup, |
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phase 2 just copies the code from ROM page 1 into RAM |
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page 1 and executes the loader. In the case of an |
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application startup (.com file used to load a new |
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copy of the system), phase 2 copies the first 32KB |
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of the application memory space into RAM page 1 |
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and executes the loader. |
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See 'bootrom.asm' for the implementation of the ROM |
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(hardware) startup. See 'bootapp' for the implementation |
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of the application based startup. |
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General Design Strategy |
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----------------------- |
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The design goal is to locate as much of the hardware |
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dependent code as possible out of normal 64KB CP/M |
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address space and into a bank switched area of memory. |
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As calls are made to HBIOS, the lower 32KB of memory |
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is switched to 'bank 1' which contains all of the |
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driver code. The operating system is unaware this |
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has occurred. As control is returned to the Operating |
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System, the lower 32KB of memory is switched back to |
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normal 'bank 0'. |
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HBIOS implements a small 'shim' (proxy) that lives in the |
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upper page (256 bytes) of RAM. This shim is responsible |
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for handling the HBIOS call invocations. It is the |
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target of 'RST 08' and will simply switch in RAM |
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bank 1 into lower RAM forward the call to the lower |
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memory, then switch lower memory back to RAM bank 0 |
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on return. |
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In the case of CP/M and ZSDOS, CBIOS is built to |
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utilize HBIOS for most of the work. CBIOS contains |
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the required CP/M data structures such as DPH and DPB |
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and is responsible for translating and forwarding work |
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to HBIOS as needed. |
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Notes |
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----- |
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1. Size of ROM disk and RAM disk will necessarily be |
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decreased by 32KB each. User will need to make sure |
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that RAM disk is reformatted (CLRDIR). |
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@ -1,4 +0,0 @@ |
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HBIOS FUNCTION CALLS |
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==================== |
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HBIOS function calls are now documented in "RomWBW Architecture.pdf". Please refer to this document. |
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@ -1,47 +0,0 @@ |
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******************************************** |
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*** This file is deprecated as ov v2.X *** |
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*** Please see BankedBIOS.txt *** |
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******************************************** |
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7 6 5 4 3 2 1 0 ONLY APPLICABLE TO THE LOWER MEMORY PAGE 00000h-$7FFF |
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^ ^ ^ ^ ^ ^ ^ ^ |
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: : : : : : : +--> A15 RAM/ROM ADDRESS LINE DEFAULT IS 0 |
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: : : : : : +----> A16 RAM/ROM ADDRESS LINE DEFAULT IS 0 |
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: : : : : +------> A17 RAM/ROM ADDRESS LINE DEFAULT IS 0 |
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: : : : +--------> A18 RAM/ROM ADDRESS LINE DEFAULT IS 0 |
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: : : +-----------> A19 ROM ONLY ADDRESS LINE DEFAULT IS 0 |
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: : +-------------> |
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: +---------------> |
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+-----------------> ROM SELECT (0=ROM, 1=RAM) DEFAULT IS 0 |
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RAM: |
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ADDRESS COMPONENT SIZE PAGE COMMENTS |
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----------- --------- ----- ------ ---------------------------------------------- |
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00000-07FFF TPA 08000 0 Normally mapped to lower 32K of CPU address space |
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08000-77FFF RAMDSK 70000 1-E 448KB RAM Disk |
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78000-78FFF TPA/DBGMON 01000 F Pinned to upper 32K of CPU address space |
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79000-7CFFF TPA 04000 " |
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7D000-7D7FF TPA/CCP 00800 " |
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7D800-7E5FF BDOS 00E00 " |
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7E600-7FFFF CBIOS 01A00 " (includes DATA) |
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ROM: |
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ADDRESS COMPONENT SIZE PAGE COMMENTS |
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----------- --------- ----- ------ ---------------------------------------------- |
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00000-000FF PAGE ZERO 00100 |
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00100-01FFF LOADER 01F00 0 |
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02000-027FF CCP 00800 |
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02800-035FF BDOS 00E00 |
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03600-04FFF CBIOS 01A00 includes DATA |
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05000-05FFF DBGMON 01000 |
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06000-07FFF ROM EXT 02000 vdu driver, etc. |
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08000-FFFFF ROMDSK F8000 1-1E 960KB ROM Disk |
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