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Miscellaneous Fixes

- SDCNT was not properly implemented in all cases
- ParPortProp debug formatting fix
pull/199/head
Wayne Warthen 5 years ago
parent
commit
c4a0548e76
  1. 2
      Source/HBIOS/cfg_rcz180.asm
  2. 2
      Source/HBIOS/cfg_rcz280.asm
  3. 2
      Source/HBIOS/cfg_rcz80.asm
  4. 25
      Source/HBIOS/sd.asm
  5. 1
      Source/Prop/Spin/ParPortProp.spin
  6. 1
      Source/Prop/Spin/Parallax Serial Terminal.spin
  7. 2
      Source/ver.inc
  8. 2
      Source/ver.lib

2
Source/HBIOS/cfg_rcz180.asm

@ -200,7 +200,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT] SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011

2
Source/HBIOS/cfg_rcz280.asm

@ -216,7 +216,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT] SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011

2
Source/HBIOS/cfg_rcz80.asm

@ -205,7 +205,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT] SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011

25
Source/HBIOS/sd.asm

@ -115,8 +115,10 @@
; ;
SD_NOPULLUP .EQU TRUE ; ASSUME NO PULLUP SD_NOPULLUP .EQU TRUE ; ASSUME NO PULLUP
; ;
SD_DEVCNT .EQU SDCNT ; SET SD_DEVCNT TO SDCNT CONFIG VAR
;
#IF (SDMODE == SDMODE_JUHA) ; JUHA MINI-BOARD #IF (SDMODE == SDMODE_JUHA) ; JUHA MINI-BOARD
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
SD_OPRMSK .EQU %10000111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT SD_OPRMSK .EQU %10000111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
@ -131,7 +133,7 @@ RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
#ENDIF #ENDIF
; ;
#IF (SDMODE == SDMODE_N8) ; UNMODIFIED N8-2511 #IF (SDMODE == SDMODE_N8) ; UNMODIFIED N8-2511
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
SD_OPRMSK .EQU %01000111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT SD_OPRMSK .EQU %01000111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
@ -146,7 +148,7 @@ RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
#ENDIF #ENDIF
; ;
#IF (SDMODE == SDMODE_CSIO) ; N8-2312 #IF (SDMODE == SDMODE_CSIO) ; N8-2312
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
SD_OPRMSK .EQU %00000100 ; MASK FOR BITS WE OWN IN RTC LATCH PORT SD_OPRMSK .EQU %00000100 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
@ -159,7 +161,7 @@ RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
#ENDIF #ENDIF
; ;
#IF (SDMODE == SDMODE_PPI) ; PPISD #IF (SDMODE == SDMODE_PPI) ; PPISD
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_PPIBASE .EQU PPIBASE ; BASE IO PORT FOR PPI SD_PPIBASE .EQU PPIBASE ; BASE IO PORT FOR PPI
SD_PPIB .EQU PPIBASE + 1 ; PPI PORT B (INPUT: DOUT) SD_PPIB .EQU PPIBASE + 1 ; PPI PORT B (INPUT: DOUT)
SD_PPIC .EQU PPIBASE + 2 ; PPI PORT C (OUTPUT: CS, CLK, DIN) SD_PPIC .EQU PPIBASE + 2 ; PPI PORT C (OUTPUT: CS, CLK, DIN)
@ -175,7 +177,7 @@ SD_IOBASE .EQU SD_PPIBASE ; IOBASE
#ENDIF #ENDIF
; ;
#IF (SDMODE == SDMODE_UART) #IF (SDMODE == SDMODE_UART)
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU SIO_MCR ; UART MCR PORT (OUTPUT: CS, CLK, DIN) SD_OPRREG .EQU SIO_MCR ; UART MCR PORT (OUTPUT: CS, CLK, DIN)
SD_OPRDEF .EQU %00001100 ; QUIESCENT STATE SD_OPRDEF .EQU %00001100 ; QUIESCENT STATE
SD_OPRMSK .EQU %00101101 ; MASK FOR BITS WE OWN IN RTC LATCH PORT SD_OPRMSK .EQU %00101101 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
@ -188,7 +190,7 @@ SD_IOBASE .EQU UARTIOB ; IOBASE
#ENDIF #ENDIF
; ;
#IF (SDMODE == SDMODE_DSD) ; DUAL SD #IF (SDMODE == SDMODE_DSD) ; DUAL SD
SD_DEVCNT .EQU SDCNT ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 2 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU $08 ; DEDICATED OPERATIONS REGISTER SD_OPRREG .EQU $08 ; DEDICATED OPERATIONS REGISTER
SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
SD_INPREG .EQU SD_OPRREG ; INPUT REGISTER IS OPRREG SD_INPREG .EQU SD_OPRREG ; INPUT REGISTER IS OPRREG
@ -202,7 +204,7 @@ SD_IOBASE .EQU SD_OPRREG ; IOBASE
#ENDIF #ENDIF
; ;
#IF (SDMODE == SDMODE_MK4) ; MARK IV (CSIO STYLE INTERFACE) #IF (SDMODE == SDMODE_MK4) ; MARK IV (CSIO STYLE INTERFACE)
SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU $89 ; DEDICATED MK4 SDCARD REGISTER SD_OPRREG .EQU $89 ; DEDICATED MK4 SDCARD REGISTER
SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
SD_CS0 .EQU %00000100 ; SELECT ACTIVE SD_CS0 .EQU %00000100 ; SELECT ACTIVE
@ -212,7 +214,7 @@ SD_IOBASE .EQU SD_OPRREG ; IOBASE
#ENDIF #ENDIF
; ;
#IF (SDMODE == SDMODE_SC) ; SC #IF (SDMODE == SDMODE_SC) ; SC
SD_DEVCNT .EQU SDCNT ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 2 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
SD_OPRDEF .EQU %00001100 ; QUIESCENT STATE (/CS1 & /CS2 DEASSERTED) SD_OPRDEF .EQU %00001100 ; QUIESCENT STATE (/CS1 & /CS2 DEASSERTED)
SD_OPRMSK .EQU %00001100 ; MASK FOR BITS WE OWN IN RTC LATCH PORT SD_OPRMSK .EQU %00001100 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
@ -232,7 +234,7 @@ RTCDEF .SET SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
; ARE ASSUMED TO BE CONNECTED TO SD CARDS. ; ARE ASSUMED TO BE CONNECTED TO SD CARDS.
; ;
SD_BASE .EQU $5C ; Module base address SD_BASE .EQU $5C ; Module base address
SD_DEVCNT .EQU 2 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_DEVMAX .EQU 2 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_WRTR .EQU SD_BASE + 0 ; Write data and transfer SD_WRTR .EQU SD_BASE + 0 ; Write data and transfer
SD_RDTR .EQU SD_BASE + 1 ; Read data and transfer SD_RDTR .EQU SD_BASE + 1 ; Read data and transfer
SD_RDNTR .EQU SD_BASE + 0 ; Read data and NO transfer SD_RDNTR .EQU SD_BASE + 0 ; Read data and NO transfer
@ -261,6 +263,11 @@ SD_CS1 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
SD_IOBASE .EQU SD_BASE ; IOBASE SD_IOBASE .EQU SD_BASE ; IOBASE
#ENDIF #ENDIF
; ;
#IF (SD_DEVCNT > SD_DEVMAX)
.ECHO "*** ERROR: SDCNT EXCEEDS MAXIMUM SUPPORTED BY INTERFACE!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
; SD CARD COMMANDS ; SD CARD COMMANDS
; ;
SD_CMD_GO_IDLE_STATE .EQU $40 + 0 ; $40, CMD0 -> R1 SD_CMD_GO_IDLE_STATE .EQU $40 + 0 ; $40, CMD0 -> R1

1
Source/Prop/Spin/ParPortProp.spin

@ -441,6 +441,7 @@ PRI KeyboardStatus
dbg.Hex(ByteVal, 2) dbg.Hex(ByteVal, 2)
dbg.Str(string(" <done>")) dbg.Str(string(" <done>"))
dbg.NewLine
ExecFunction(FUNC_PUTBYTE) ExecFunction(FUNC_PUTBYTE)

1
Source/Prop/Spin/Parallax Serial Terminal.spin

@ -273,6 +273,7 @@ PUB NewLine
{{Send cursor to new line (carriage return plus line feed).}} {{Send cursor to new line (carriage return plus line feed).}}
Char(NL) Char(NL)
Char(LF)
PUB LineFeed PUB LineFeed
{{Send cursor down to next line.}} {{Send cursor down to next line.}}

2
Source/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 1 #DEFINE RMN 1
#DEFINE RUP 1 #DEFINE RUP 1
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.72"
#DEFINE BIOSVER "3.1.1-pre.73"

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 1
rup equ 1 rup equ 1
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.1.1-pre.72"
db "3.1.1-pre.73"
endm endm

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