diff --git a/Source/Apps/XM125/xmdm125.asm b/Source/Apps/XM125/xmdm125.asm
index 83393755..b2931990 100644
--- a/Source/Apps/XM125/xmdm125.asm
+++ b/Source/Apps/XM125/xmdm125.asm
@@ -70,7 +70,7 @@ STX	EQU	02H	; 'Start of header' for 1024 byte blocks
 ;
 ; Conditional equates - change to suit your system, then assemble
 ;
-MHZ	EQU	4	; Clock speed, use integer (2,4,5,8, etc.)
+MHZ	EQU	10	; Clock speed, use integer (2,4,5,8, etc.)
 CPM3	EQU	NO	; Yes, if operating in CP/M v3.0 environment
 STOPBIT	EQU	NO	; No, if using 1 stop bit, yes if using 2
 BYEBDOS	EQU	NO	; Yes, if using BYE338-up, BYE501-up, or NUBYE
@@ -817,6 +817,7 @@ BADROP:	POP	PSW		; Restore stack
 ALLSET:	CALL	GETCHR
 	CALL	GETCHR
 	CALL	MINIT
+	STA	CPUMHZ		; WBW: Update CPU speed from MINIT in A
 ;
 ; Jump to appropriate function
 ;
@@ -3458,7 +3459,11 @@ RECVDG:	CALL	GETCHR
 	CALL	GETCHR
 ;
 RECV:	PUSH	D		; Save 'DE' regs.
-	MVI	E,MHZ		; Get the clock speed
+;WBW BEGIN: Use dynamic CPU speed
+;	MVI	E,MHZ		; Get the clock speed
+	LDA	CPUMHZ		; Get the clock speed
+	MOV	E,A		; Put speed in E
+;WBW END
 	XRA	A		; Clear the 'A' reg.
 ;
 MSLOOP:	ADD	B		; Number of seconds
@@ -3546,14 +3551,27 @@ CARCK2:	LDA	OPTSAV		; Get option
 ; Delay - 100 millisecond delay.
 ;
 DELAY:	PUSH	B		; Save 'BC'
-	LXI	B,MHZ*4167	; Value for 100 ms. delay
-;
+; WBW BEGIN: Use dynamic CPU speed
+; Loop below is 105TS on Z80 and 96TS on Z180
+; Approx 1024 iter per 100ms per MHz
+; Loop time below extended to accommodate CPU speeds up to 64MHz
+;	LXI	B,MHZ*4167	; Value for 100 ms. delay
+; Init BC w/ CPU MHz * 1024
+	LDA	CPUMHZ		; CPU MHz to A
+	RLC			; * 2
+	RLC			; * 2, A now has MHz * 4
+	MOV	B,A		; Use as high byte
+	MVI	C,0		; Zero low byte, BC now has MHz * 1024
+; WBW END
 DELAY2:	DCX	B		; Update count
 	MOV	A,B		; Get MSP byte
 	ORA	C		; Count = zero?
 	JNZ	DELAY2		; If not, continue
+	CALL	DELAY3		; WBW: Extend loop time
+	CALL	DELAY3		; WBW: Extend loop time
+	CALL	DELAY3		; WBW: Extend loop time
 	POP	B		; Restore 'BC'
-	RET			; Return to CARCK1
+DELAY3:	RET			; Return to CARCK1
 ;
 ;-----------------------------------------------------------------------
 ;
@@ -3933,9 +3951,16 @@ INPUT:	PUSH	H		; Save current values
 	PUSH	D
 	PUSH	B
 ;
-INPUT1:	LXI	D,1200		; Outer loop count (about 2 minutes)
+; WBW BEGIN: Use dynamic CPU speed
+;INPUT1:	LXI	D,1200		; Outer loop count (about 2 minutes)
+;;
+;INPUT2:	LXI	B,MHZ*100	; Roughly 100 ms.
+INPUT1:	LXI	D,468		; Outer loop count (about 2 minutes)
 ;
-INPUT2:	LXI	B,MHZ*100	; Roughly 100 ms.
+INPUT2:	LDA	CPUMHZ		; CPU MHz to A
+	MOV	B,A		; Put in B
+	MVI	C,0		; Zero C, BC is now CPU MHz * 256, ~256ms
+; WBW END
 ;
 INPUT3:	PUSH	D		; Save the outer delay count
 	PUSH	B		; Save the inner delay count
@@ -5614,6 +5639,7 @@ MSGFLG:	DB	0		; Message upload flag
 SAVEHL:	DW	0		; Saves TBUF command line address
 TOTERR:	DW	0		; Total errors for transmission attempt
 VRECNO:	DW	0		; Virtual record # in 128 byte records
+CPUMHZ:	DW	MHZ		; WBW: CPU speed in MHz, *word value*
 ;
 EOFLG:	DB	0		; 'EOF' flag (1=yes)
 EOFCTR:	DB	0		; EOF send counter
diff --git a/Source/Apps/XM125/xmhb.180 b/Source/Apps/XM125/xmhb.180
index 9581c3b6..189ab276 100644
--- a/Source/Apps/XM125/xmhb.180
+++ b/Source/Apps/XM125/xmhb.180
@@ -65,8 +65,10 @@ MINIT:
 	MLT	DE
 	BIT	2,E		; bit 2 wil be set if mlt happend
 	LD	HL,U_JPTBL	; assume Z80 (UART)
+	LD	A,10		; assume 10MHz CPU in case of Z80
 	JR	Z,MINIT2	; yes, Z80, do vector copy
 	LD	HL,A_JPTBL	; otherwise Z180 (ASCI)
+	LD	A,20		; assume 20MHz CPU in case of Z180
 ;
 MINIT2:
 	; Copy real vectors into active jump table
@@ -74,7 +76,37 @@ MINIT2:
 	LD	BC,7 * 3	; copy 7 3-byte entries
 	LDIR
 ;
-	RET			; no initialization required
+	; Check for UNA (UBIOS)
+	LD	A,(0FFFDH)	; fixed location of UNA API vector
+	CP	0C3H		; jp instruction?
+	JR	NZ,MINIT3	; if not, not UNA
+	LD	HL,(0FFFEH)	; get jp address
+	LD	A,(HL)		; get byte at target address
+	CP	0FDH		; first byte of UNA push ix instruction
+	JR	NZ,MINIT3	; if not, not UNA
+	INC	HL		; point to next byte
+	LD	A,(HL)		; get next byte
+	CP	0E5H		; second byte of UNA push ix instruction
+	JR	NZ,MINIT3	; if not, not UNA
+;
+	; Get CPU speed from UNA
+	LD	C,0F8H		; UNA BIOS Get PHI function
+	RST	08		; Returns speed in Hz in DE:HL
+	LD	A,E		; Hack to get approx speed in MHz
+	SRL	A		; ... by dividing by 1,048,576
+	SRL	A		; ...
+	SRL	A		; ...
+	SRL	A		; ...
+	INC	A		; Fix up for value truncation
+	RET			; done
+;
+MINIT3:
+	; Not UNA, use HBIOS for CPU speed lookup
+	LD	B,0F8H		; HBIOS SYSGET function 0xF8
+	LD	C,0F0H		; CPUINFO subfunction 0xF0
+	RST	08		; do it, L := CPU speed in MHz
+	LD	A,L		; move it to A
+	RET			; done
 ;
 ;-----------------------------------------------------------------------
 ;