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MBC / DUO IM2 template

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Template for setting up interrupts using the IM2 pin header on MBC and DUO platforms.
This commit is contained in:
b1ackmai1er
2023-08-22 13:16:42 +08:00
parent 6d736996fd
commit c62af3df33
21 changed files with 28 additions and 66 deletions
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2
Source/HBIOS/Config/DUO_std.asm
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@@ -44,5 +44,3 @@ MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;UARTCFG .SET UARTCFG | SER_RTS
;
HWTENABLE .SET FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

4
Source/HBIOS/Config/MBC_std.asm
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@@ -58,7 +58,3 @@ CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PS2KENABLE .SET FALSE ; PS2 KEYBOARD ON IM2 INTERRUPT CIRCUIT
PS2PORT .SET $E2 ; PS2 KEYBOARD PORT
HWTENABLE .SET FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_duo.asm
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@@ -300,5 +300,3 @@ DMAMODE .EQU DMAMODE_DUO ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_dyno.asm
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@@ -286,5 +286,3 @@ DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_master.asm
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@@ -374,5 +374,3 @@ DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

4
Source/HBIOS/cfg_mbc.asm
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@@ -298,7 +298,3 @@ DMAMODE .EQU DMAMODE_MBC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
PS2KENABLE .EQU FALSE ; PS2 KEYBOARD ON IM2 INTERRUPT CIRCUIT
PS2PORT .EQU $E2 ; PS2 KEYBOARD PORT
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_mk4.asm
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@@ -295,5 +295,3 @@ DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_n8.asm
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@@ -288,5 +288,3 @@ DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_rcz180.asm
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@@ -312,5 +312,3 @@ DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .SET FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_rcz280.asm
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@@ -316,5 +316,3 @@ DMAMODE .EQU DMAMODE_Z280 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .SET FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_rcz80.asm
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@@ -310,5 +310,3 @@ DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_rph.asm
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@@ -277,5 +277,3 @@ DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_s100.asm
View File

@@ -306,5 +306,3 @@ DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_sbc.asm
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@@ -276,5 +276,3 @@ DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_scz180.asm
View File

@@ -306,5 +306,3 @@ DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_una.asm
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@@ -36,5 +36,3 @@ ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
RTCIO .EQU $70 ; RTC LATCH REGISTER ADR
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_z80retro.asm
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@@ -237,5 +237,3 @@ DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_zeta.asm
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@@ -208,5 +208,3 @@ DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

2
Source/HBIOS/cfg_zeta2.asm
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@@ -219,5 +219,3 @@ DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
;
HWTENABLE .EQU FALSE ; HARDWARE TIMER ON IM2 INTERRUPT CIRCUIT

44
Source/HBIOS/hbios.asm
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@@ -2153,30 +2153,34 @@ HB_CPU3:
;
#ENDIF
;
#IF (HWTENABLE & (INTMODE == 2)) ; HARDWARE TIMER TICK
#IF (PLATFORM == PLT_MBC)
LD HL,HB_TIMINT
LD (IVT(INT_IM2PH7)),HL ; IVT ENTRY FOR TIMER
#ENDIF
#IF (PLATFORM == PLT_DUO)
LD HL,HB_TIMINT
LD (IVT(INT_IM2PH0)),HL ; IVT ENTRY FOR TIMER
#ENDIF
#ENDIF
; TEMPLATE FOR SETTING UP INTERRUPTS USING THE MBC/DUODYNE IM2 INTERRUPT
; PIN HEADERS. UPDATE HB_DUMMYx TO POINT TO THE INTERRUPT ROUTINE.
; IN STD.ASM ALLOCATE THE EQUIVALENT INT_IM2PHx INTERRUPT TABLE ENTRY NUMBER.
;
; PS2 KEYBOARD INTERRUPT
;
; #IF (PS2KENABLE & !(CVDUENABLE | VGAENABLE) | GDCENABLE | (TMSENABLE & ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC))))
; LD HL,HB_DUMMY0
; LD (IVT(INT_IM2PH0)),HL
;
; #IF (INTMODE == 2)
; LD HL,KBD_INT
; LD (IVT(INT_IM2PH1)),HL ; IVT ENTRY FOR KEYBOARD
; #ENDIF
; LD HL,HB_DUMMY1
; LD (IVT(INT_IM2PH1)),HL
;
; #ENDIF
; LD HL,HB_DUMMY2
; LD (IVT(INT_IM2PH2)),HL
;
; LD HL,HB_DUMMY3
; LD (IVT(INT_IM2PH3)),HL
;
; LD HL,HB_DUMMY4
; LD (IVT(INT_IM2PH4)),HL
;
; LD HL,HB_DUMMY5
; LD (IVT(INT_IM2PH5)),HL
;
; LD HL,HB_DUMMY6
; LD (IVT(INT_IM2PH6)),HL
;
; LD HL,HB_DUMMY7
; LD (IVT(INT_IM2PH7)),HL
;
#IF (KIOENABLE)
CALL KIO_PREINIT

8
Source/HBIOS/std.asm
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@@ -764,13 +764,13 @@ INT_SIO1 .EQU 14 ; ZILOG SIO 1, CHANNEL A & B
; MBC IM2 PINHEADER INTERRUPTS
;
;INT_IM2PH0 .EQU 0
INT_IM2PH1 .EQU 1 ; PS2 KEYBOARD
;INT_IM2PH1 .EQU 1
;INT_IM2PH2 .EQU 2
;INT_IM2PH3 .EQU 3
;INT_IM2PH4 .EQU 4
;INT_IM2PH5 .EQU 5
;INT_IM2PH6 .EQU 6
INT_IM2PH7 .EQU 7 ; HARDWARE TIMER TICK
;INT_IM2PH7 .EQU 7
;
; MBC Z80 INTERRUPTS
;
@@ -799,14 +799,14 @@ INT_CTC0D .EQU 15 ; ZILOG CTC 0, CHANNEL D
; DUO IM2 PINHEADER INTERRUPTS
INT_IM2PH0 .EQU 0 ; HARDWARE TIMER TICK
;INT_IM2PH0 .EQU 0
;INT_IM2PH1 .EQU 1
;INT_IM2PH2 .EQU 2
;INT_IM2PH3 .EQU 3
;INT_IM2PH4 .EQU 4
;INT_IM2PH5 .EQU 5
;INT_IM2PH6 .EQU 6
INT_IM2PH7 .EQU 7 ; PCF I2C
;INT_IM2PH7 .EQU 7
;
; DUO Z80 IM2 INTERRUPTS
;