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@ -20,6 +20,8 @@ |
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; |
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UART_DEBUG .EQU FALSE |
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; |
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UART_BUFSZ .EQU 32 ; RECEIVE RING BUFFER SIZE |
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; |
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UART_NONE .EQU 0 ; UNKNOWN OR NOT PRESENT |
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UART_8250 .EQU 1 |
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UART_16450 .EQU 2 |
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@ -43,9 +45,13 @@ UART_SCR .EQU 7 ; SCRATCH REGISTER (READ/WRITE) |
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UART_DLL .EQU 0 ; DLAB=1: DIVISOR LATCH (LS) (READ/WRITE) |
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UART_DLM .EQU 1 ; DLAB=1: DIVISOR LATCH (MS) (READ/WRITE) |
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UART_EFR .EQU 2 ; LCR=$BF: ENHANCED FEATURE REG (READ/WRITE) |
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;; |
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;UART_FIFO .EQU 0 ; FIFO ENABLE BIT |
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;UART_AFC .EQU 1 ; AUTO FLOW CONTROL ENABLE BIT |
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; |
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; THESE BITS ARE SET IN THE UART TYPE BYTE TO FURTHER |
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; IDENTIFY THE FEATURES OF THE CHIP |
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; |
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UART_INTACT .EQU 7 ; INT RCV ACTIVE BIT |
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UART_FIFOACT .EQU 6 ; FIFO ACTIVE BIT |
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UART_AFCACT .EQU 5 ; AUTO FLOW CONTROL ACTIVE BIT |
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; |
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UARTSBASE .EQU $68 |
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UARTCBASE .EQU $80 |
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@ -86,7 +92,7 @@ UART_PREINIT0: |
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POP DE ; GET ENTRY ADDRESS BACK, BUT PUT IN DE |
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POP BC ; RESTORE LOOP CONTROL |
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; |
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LD A,(IY + 1) ; GET THE UART TYPE DETECTED |
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LD A,(IY+1) ; GET THE UART TYPE DETECTED |
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OR A ; SET FLAGS |
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JR Z,UART_PREINIT2 ; SKIP IT IF NOTHING FOUND |
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; |
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@ -98,6 +104,29 @@ UART_PREINIT0: |
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UART_PREINIT2: |
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INC C ; NEXT PHYSICAL UNIT |
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DJNZ UART_PREINIT0 ; LOOP UNTIL DONE |
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; |
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#IF ((UARTINTS) & (INTMODE > 0)) |
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; *** FIXME *** WE SHOULD CHECK TO SEE IF ANY UNITS ARE ACTUALLY |
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; USING INT RCV. IF NOT, WE SHOULD NOT HOOK IM1!!! |
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; |
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; SETUP INT VECTORS AS APPROPRIATE |
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LD A,(UART_DEV) ; GET DEVICE COUNT |
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OR A ; SET FLAGS |
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JR Z,UART_PREINIT3 ; IF ZERO, NO UART DEVICES, ABORT |
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; |
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#IF (INTMODE == 1) |
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; ADD IM1 INT CALL LIST ENTRY |
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LD HL,UART_INT ; GET INT VECTOR |
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CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST |
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#ENDIF |
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; |
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#IF ((INTMODE == 2) | (INTMODE == 3)) |
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; *** FIXME *** IMPLEMENT THIS!!! |
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#ENDIF |
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; |
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#ENDIF |
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; |
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UART_PREINIT3: |
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XOR A ; SIGNAL SUCCESS |
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RET ; AND RETURN |
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; |
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@ -106,19 +135,19 @@ UART_PREINIT2: |
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UART_INITUNIT: |
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; DETECT THE UART TYPE |
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CALL UART_DETECT ; DETERMINE UART TYPE |
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LD (IY + 1),A ; ALSO SAVE IN CONFIG TABLE |
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LD (IY+1),A ; AND SAVE IN CONFIG TABLE |
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OR A ; SET FLAGS |
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RET Z ; ABORT IF NOTHING THERE |
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; |
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; UPDATE WORKING UART DEVICE NUM |
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LD HL,UART_DEV ; POINT TO CURRENT UART DEVICE NUM |
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LD A,(HL) ; PUT IN ACCUM |
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INC (HL) ; INCREMENT IT (FOR NEXT LOOP) |
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LD (IY),A ; UDPATE UNIT NUM |
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; |
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; SET DEFAULT CONFIG |
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LD DE,-1 ; LEAVE CONFIG ALONE |
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JP UART_INITDEV ; IMPLEMENT IT AND RETURN |
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JP UART_INITDEVX ; IMPLEMENT IT AND RETURN |
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; |
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; |
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; |
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@ -137,10 +166,10 @@ UART_INIT1: |
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PUSH HL ; COPY CFG DATA PTR |
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POP IY ; ... TO IY |
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LD A,(IY + 1) ; GET UART TYPE |
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LD A,(IY+1) ; GET UART TYPE |
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OR A ; SET FLAGS |
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CALL NZ,UART_PRTCFG ; PRINT IF NOT ZERO |
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POP BC ; RESTORE LOOP CONTROL |
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INC C ; NEXT UNIT |
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DJNZ UART_INIT1 ; LOOP TILL DONE |
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@ -148,6 +177,116 @@ UART_INIT1: |
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XOR A ; SIGNAL SUCCESS |
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RET ; DONE |
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; |
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; RECEIVE INTERRUPT HANDLER |
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; |
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#IF ((UARTINTS) & (INTMODE > 0)) |
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; |
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; IM1 ENTRY POINT |
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; |
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; POLL ALL DEVICES THAT MIGHT ENABLE INTERRUPT DRIVEN |
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; RECEIVE. HANDLE FIRST INTERRUPT ENCOUNTERED (IF ANY). |
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; MOST BOARDS REQUIRE UARTS THAT WILL HAVE AFC. THE |
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; ONLY BOARDS THAT MAY NOT ARE THE SBC AND THE CAS. |
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; |
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; THIS COULD BE IMPROVED BY DYNAMICALLY SETTING UP THE |
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; POLLING CHAIN WHEN DEVICES ARE INITIALIZED SUCH THAT |
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; ONLY DEVICES ACTUALLY USING INTS ARE POLLED HERE. |
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; |
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UART_INT: |
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; |
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#IF (UARTSBC) |
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LD IY,UART_CFG_SBC |
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CALL UART_INTRCV |
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RET NZ |
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#ENDIF |
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; |
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#IF (UARTCAS) |
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LD IY,UART_CFG_CAS |
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CALL UART_INTRCV |
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RET NZ |
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#ENDIF |
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; |
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XOR A ; CLEAR ACCUM (INT NOT HANDLED) |
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RET ; DONE |
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; |
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; HANDLE INT FOR A SPECIFIC CHANNEL |
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; BASED ON UNIT CFG POINTED TO BY IY |
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; |
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UART_INTRCV: |
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; ARE INTERRUPTS IN USE ON THIS DEVICE? |
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LD A,(IY+1) ; GET UART TYPE |
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AND %10000000 ; ISOLATE INT RCV BIT |
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RET Z ; INTS NOT SUPPORTED |
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; CHECK TO SEE IF SOMETHING IS ACTUALLY THERE |
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LD C,(IY+3) ; STATUS PORT TO C |
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IN A,(C) ; GET LSR |
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AND $01 ; ISOLATE RECEIVE READY BIT |
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RET Z ; NOTHING AVAILABLE ON CURRENT CHANNEL |
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; |
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UART_INTRCV1: |
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; RECEIVE CHARACTER INTO BUFFER |
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LD C,(IY+2) ; DATA PORT TO C |
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IN A,(C) ; READ PORT |
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LD B,A ; SAVE BYTE READ |
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LD L,(IY+6) ; SET HL TO |
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LD H,(IY+7) ; ... START OF BUFFER STRUCT |
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LD A,(HL) ; GET COUNT |
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CP UART_BUFSZ ; COMPARE TO BUFFER SIZE |
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JR Z,UART_INTRCV4 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED |
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INC A ; INCREMENT THE COUNT |
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LD (HL),A ; AND SAVE IT |
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; *** FIXME *** THE FOLLOWING SHOULD ONLY BE DONE IF RTS FLOW CONTROL IS ON!!! |
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; SOMETHING LIKE THIS MAY WORK... |
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;BIT 5,(IY+5) |
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;JR Z,UART_INTRCV2 |
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CP UART_BUFSZ / 2 ; BUFFER GETTING FULL? |
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JR NZ,UART_INTRCV2 ; IF NOT, BYPASS CLEARING RTS |
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LD C,(IY+3) ; LSR PORT TO C |
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DEC C ; POINT TO MCR PORT |
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IN A,(C) ; GET MCR VALUE |
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AND ~%00000010 ; CLEAR RTS |
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OUT (C),A ; AND SAVE IT |
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; |
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UART_INTRCV2: |
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INC HL ; HL NOW HAS ADR OF HEAD PTR |
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PUSH HL ; SAVE ADR OF HEAD PTR |
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LD A,(HL) ; DEREFERENCE HL |
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INC HL |
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LD H,(HL) |
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LD L,A ; HL IS NOW ACTUAL HEAD PTR |
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LD (HL),B ; SAVE CHARACTER RECEIVED IN BUFFER AT HEAD |
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INC HL ; BUMP HEAD POINTER |
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POP DE ; RECOVER ADR OF HEAD PTR |
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LD A,L ; GET LOW BYTE OF HEAD PTR |
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SUB UART_BUFSZ+4 ; SUBTRACT SIZE OF BUFFER AND POINTER |
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CP E ; IF EQUAL TO START, HEAD PTR IS PAST BUF END |
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JR NZ,UART_INTRCV3 ; IF NOT, BYPASS |
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LD H,D ; SET HL TO |
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LD L,E ; ... HEAD PTR ADR |
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INC HL ; BUMP PAST HEAD PTR |
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INC HL |
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INC HL |
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INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START |
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UART_INTRCV3: |
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EX DE,HL ; DE := HEAD PTR VAL, HL := ADR OF HEAD PTR |
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LD (HL),E ; SAVE UPDATED HEAD PTR |
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INC HL |
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LD (HL),D |
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; CHECK FOR MORE PENDING... |
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LD C,(IY+3) ; STATUS PORT TO C |
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IN A,(C) ; GET LSR |
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AND $01 ; ISOLATE RECEIVE READY BIT |
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JR NZ,UART_INTRCV1 ; IF SET, DO SOME MORE |
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UART_INTRCV4: |
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OR $FF ; NZ SET TO INDICATE INT HANDLED |
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RET |
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; |
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#ENDIF |
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; |
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; DRIVER FUNCTION TABLE |
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; |
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UART_FNTBL: |
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@ -167,17 +306,81 @@ UART_FNTBL: |
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UART_IN: |
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CALL UART_IST ; RECEIVED CHAR READY? |
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JR Z,UART_IN ; LOOP IF NOT |
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LD C,(IY + 2) ; C := BASE UART PORT (WHICH IS ALSO RBR REG) |
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#IF ((UARTINTS) & (INTMODE > 0)) |
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BIT UART_INTACT,(IY+1) ; INT RCV BIT |
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JR Z,UART_IN1 ; NORMAL INPUT IF NOT SET |
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JR UART_INTIN ; INT RCV INPUT |
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#ENDIF |
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; |
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UART_IN1: |
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LD C,(IY+2) ; C := BASE UART PORT (WHICH IS ALSO RBR REG) |
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IN E,(C) ; CHAR READ TO E |
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XOR A ; SIGNAL SUCCESS |
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RET ; AND DONE |
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; |
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#IF ((UARTINTS) & (INTMODE > 0)) |
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; |
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UART_INTIN: |
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HB_DI ; AVOID COLLISION WITH INT HANDLER |
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LD L,(IY+6) ; SET HL TO |
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LD H,(IY+7) ; ... START OF BUFFER STRUCT |
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LD A,(HL) ; GET COUNT |
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DEC A ; DECREMENT COUNT |
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LD (HL),A ; SAVE UPDATED COUNT |
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; *** FIXME *** THE FOLLOWING SHOULD ONLY BE DONE IF RTS FLOW CONTROL IS ON!!! |
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; SOMETHING LIKE THIS MAY WORK... |
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;BIT 5,(IY+5) |
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;JR Z,UART_INTIN1 |
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CP UART_BUFSZ / 4 ; BUFFER LOW THRESHOLD |
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JR NZ,UART_INTIN1 ; IF NOT, BYPASS SETTING RTS |
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LD C,(IY+3) ; LSR PORT TO C |
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DEC C ; POINT TO MCR PORT |
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IN A,(C) ; GET MCR VALUE |
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OR %00000010 ; SET RTS |
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OUT (C),A ; AND SAVE IT |
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; |
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UART_INTIN1: |
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INC HL |
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INC HL |
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INC HL ; HL NOW HAS ADR OF TAIL PTR |
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PUSH HL ; SAVE ADR OF TAIL PTR |
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LD A,(HL) ; DEREFERENCE HL |
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INC HL |
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LD H,(HL) |
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LD L,A ; HL IS NOW ACTUAL TAIL PTR |
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LD C,(HL) ; C := CHAR TO BE RETURNED |
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INC HL ; BUMP TAIL PTR |
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POP DE ; RECOVER ADR OF TAIL PTR |
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LD A,L ; GET LOW BYTE OF TAIL PTR |
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SUB UART_BUFSZ+2 ; SUBTRACT SIZE OF BUFFER AND POINTER |
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CP E ; IF EQUAL TO START, TAIL PTR IS PAST BUF END |
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JR NZ,UART_INTIN2 ; IF NOT, BYPASS |
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LD H,D ; SET HL TO |
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LD L,E ; ... TAIL PTR ADR |
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INC HL ; BUMP PAST TAIL PTR |
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INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START |
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UART_INTIN2: |
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EX DE,HL ; DE := TAIL PTR VAL, HL := ADR OF TAIL PTR |
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LD (HL),E ; SAVE UPDATED TAIL PTR |
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INC HL |
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LD (HL),D |
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LD E,C ; MOVE CHAR TO RETURN TO E |
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HB_EI ; INTERRUPTS OK AGAIN |
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XOR A ; SIGNAL SUCCESS |
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RET ; AND DONE |
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; |
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#ENDIF |
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; |
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; |
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; |
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UART_OUT: |
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CALL UART_OST ; READY FOR CHAR? |
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JR Z,UART_OUT ; LOOP IF NOT |
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LD C,(IY + 2) ; C := BASE UART PORT (WHICH IS ALSO THR REG) |
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LD C,(IY+2) ; C := BASE UART PORT (WHICH IS ALSO THR REG) |
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OUT (C),E ; SEND CHAR FROM E |
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XOR A ; SIGNAL SUCCESS |
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RET |
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@ -185,7 +388,14 @@ UART_OUT: |
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; |
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; |
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UART_IST: |
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LD C,(IY + 3) ; C := LINE STATUS REG (LSR) |
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#IF ((UARTINTS) & (INTMODE > 0)) |
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BIT UART_INTACT,(IY+1) ; INT RCV BIT |
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JR Z,UART_IST1 ; NORMAL INPUT IF NOT SET |
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JR UART_INTIST ; ELSE INT RCV |
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#ENDIF |
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; |
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UART_IST1: |
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LD C,(IY+3) ; C := LINE STATUS REG (LSR) |
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IN A,(C) ; GET STATUS |
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AND $01 ; ISOLATE BIT 0 (RECEIVE DATA READY) |
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JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING |
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@ -193,10 +403,22 @@ UART_IST: |
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INC A ; ACCUM := 1 TO SIGNAL 1 CHAR WAITING |
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RET ; DONE |
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; |
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#IF ((UARTINTS) & (INTMODE > 0)) |
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; |
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UART_INTIST: |
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LD L,(IY+6) ; GET ADDRESS |
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LD H,(IY+7) ; ... OF RECEIVE BUFFER |
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LD A,(HL) ; BUFFER UTILIZATION COUNT |
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OR A ; SET FLAGS |
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JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING |
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RET |
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; |
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#ENDIF |
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; |
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; |
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; |
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UART_OST: |
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|
LD C,(IY + 3) ; C := LINE STATUS REG (LSR) |
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|
LD C,(IY+3) ; C := LINE STATUS REG (LSR) |
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|
IN A,(C) ; GET STATUS |
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|
AND $20 ; ISOLATE BIT 5 () |
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|
JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING |
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@ -206,7 +428,18 @@ UART_OST: |
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; |
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; |
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; |
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; |
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; NOTE THAT THERE ARE TWO ENTRY POINTS. INITDEV WILL DISABLE/ENABLE INTS |
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; AND INITDEVX WILL NOT. THIS IS DONE SO THAT THE PREINIT ROUTINE ABOVE |
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; CAN AVOID ENABLING/DISABLING INTS. |
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; |
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UART_INITDEV: |
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HB_DI ; DISABLE INTS |
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CALL UART_INITDEVX ; DO THE WORK |
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HB_EI ; INTS BACK ON |
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RET ; DONE |
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; |
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UART_INITDEVX: |
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|
; TEST FOR -1 WHICH MEANS USE CURRENT CONFIG (JUST REINIT) |
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|
LD A,D ; TEST DE FOR |
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|
AND E ; ... VALUE OF -1 |
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@ -214,8 +447,8 @@ UART_INITDEV: |
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|
JR NZ,UART_INITDEV1 ; IF DE == -1, REINIT CURRENT CONFIG |
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; |
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|
; LOAD EXISTING CONFIG TO REINIT |
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|
LD E,(IY + 4) ; LOW BYTE |
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|
LD D,(IY + 5) ; HIGH BYTE |
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LD E,(IY+4) ; LOW BYTE |
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|
LD D,(IY+5) ; HIGH BYTE |
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|
; |
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UART_INITDEV1: |
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|
; DETERMINE DIVISOR |
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|
@ -225,8 +458,8 @@ UART_INITDEV1: |
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|
RET NZ ; ABORT IF COMPDIV FAILS! |
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|
; |
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|
; GOT A DIVISOR, COMMIT NEW CONFIG |
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|
LD (IY + 4),E ; SAVE LOW WORD |
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LD (IY + 5),D ; SAVE HI WORD |
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|
|
LD (IY+4),E ; SAVE LOW WORD |
|
|
|
LD (IY+5),D ; SAVE HI WORD |
|
|
|
; |
|
|
|
; START OF ACTUAL UART CONFIGURATION |
|
|
|
LD A,80H ; DLAB IS BIT 7 OF LCR |
|
|
|
@ -245,6 +478,20 @@ UART_INITDEV1: |
|
|
|
; |
|
|
|
XOR A ; DLAB OFF NOW |
|
|
|
UART_OUTP(UART_LCR) ; DO IT |
|
|
|
; |
|
|
|
XOR A ; IER VALUE FOR NO INTS |
|
|
|
; |
|
|
|
#IF ((UARTINTS) & (INTMODE > 0)) |
|
|
|
; |
|
|
|
BIT UART_INTACT,(IY+1) ; CHECK INT RCV BIT |
|
|
|
JR Z,UART_INITDEV1A ; SKIP IF NOT SET |
|
|
|
INC A ; DATA RCVD INT BIT OF IER |
|
|
|
; |
|
|
|
UART_INITDEV1A: |
|
|
|
; |
|
|
|
#ENDIF |
|
|
|
; |
|
|
|
UART_OUTP(UART_IER) ; SETUP IER REGISTER |
|
|
|
; |
|
|
|
; SETUP FCR, BIT 5 IS KEPT ON EVEN THOUGH IT IS PROBABLY |
|
|
|
; IRRELEVANT BECAUSE IT ONLY APPLIES TO 750 AND DLAB IS |
|
|
|
@ -253,18 +500,29 @@ UART_INITDEV1: |
|
|
|
UART_OUTP(UART_FCR) ; DO IT |
|
|
|
; |
|
|
|
; SETUP LCR FROM SECOND CONFIG BYTE |
|
|
|
LD A,(IY + 4) ; GET CONFIG BYTE |
|
|
|
LD A,(IY+4) ; GET CONFIG BYTE |
|
|
|
AND ~$C0 ; ISOLATE PARITY, STOP/DATA BITS |
|
|
|
UART_OUTP(UART_LCR) ; SAVE IT |
|
|
|
; |
|
|
|
; SETUP MCR FROM FIRST CONFIG BYTE |
|
|
|
LD A,(IY + 5) ; GET CONFIG BYTE |
|
|
|
LD A,(IY+5) ; GET CONFIG BYTE |
|
|
|
AND ~$1F ; REMOVE ENCODED BAUD RATE BITS |
|
|
|
OR $03 ; FORCE RTS & DTR |
|
|
|
UART_OUTP(UART_MCR) ; SAVE IT |
|
|
|
; |
|
|
|
; THE MCR REGISTER AFE BIT WILL NORMALLY BE SET/RESET BY THE |
|
|
|
; VALUE OF THE CONFIG BYTE. HOWEVER, IF THE CHIP IS NOT AFC CAPABLE |
|
|
|
; WE ARE PROBABLY USING INT RCV FOR FLOW CONTROL. ALTHOUGH THE |
|
|
|
; CHIP PROBABLY IGNORES THE AFE BIT, WE FORCE CLEAR IT ANYWAY. IT WOULD |
|
|
|
; BE BAD IF AFC AND INT RCV ARE ACTIVE AT THE SAME TIME. |
|
|
|
BIT UART_AFCACT,(IY+1) ; IS AFC SUPPOSED TO BE ON? |
|
|
|
JR NZ,UART_INITDEV1B ; IF SO, AFE BIT IS OK BASED ON CONFIG BYTE |
|
|
|
RES 5,A ; ELSE FORCE IT OFF |
|
|
|
; |
|
|
|
UART_INITDEV1B: |
|
|
|
UART_OUTP(UART_MCR) ; SAVE MCR VALUE |
|
|
|
; |
|
|
|
; TEST FOR EFR CAPABLE CHIPS |
|
|
|
LD A,(IY + 1) ; GET UART TYPE |
|
|
|
LD A,(IY+1) ; GET UART TYPE |
|
|
|
CP UART_16650 ; 16650? |
|
|
|
JR Z,UART_INITDEV2 ; USE EFR REGISTER |
|
|
|
CP UART_16850 ; 16850? |
|
|
|
@ -277,7 +535,7 @@ UART_INITDEV2: |
|
|
|
PUSH AF ; SAVE IT |
|
|
|
LD A,$BF ; VALUE TO ACCESS EFR |
|
|
|
UART_OUTP(UART_LCR) ; SET VALUE IN LCR |
|
|
|
LD A,(IY + 5) ; GET CONFIG BYTE |
|
|
|
LD A,(IY+5) ; GET CONFIG BYTE |
|
|
|
BIT 5,A ; AFC REQUESTED? |
|
|
|
LD A,$C0 ; ASSUME AFC ON |
|
|
|
JR NZ,UART_INITDEV3 ; YES, IMPLEMENT IT |
|
|
|
@ -289,11 +547,42 @@ UART_INITDEV3: |
|
|
|
UART_OUTP(UART_LCR) ; AND PUT IT BACK |
|
|
|
; |
|
|
|
UART_INITDEV4: |
|
|
|
; |
|
|
|
#IF ((UARTINTS) & (INTMODE > 0)) |
|
|
|
; |
|
|
|
LD A,(IY+7) ; MSB OF BUFFER |
|
|
|
OR A ; SET FLAGS |
|
|
|
JR Z,UART_INITDEV5 ; BYPASS IF NO BUFFER |
|
|
|
; RESET THE RECEIVE BUFFER |
|
|
|
LD E,(IY+6) |
|
|
|
LD D,(IY+7) ; DE := _CNT |
|
|
|
XOR A ; A := 0 |
|
|
|
LD (DE),A ; _CNT = 0 |
|
|
|
INC DE ; DE := ADR OF _HD |
|
|
|
PUSH DE ; SAVE IT |
|
|
|
INC DE |
|
|
|
INC DE |
|
|
|
INC DE |
|
|
|
INC DE ; DE := ADR OF _BUF |
|
|
|
POP HL ; HL := ADR OF _HD |
|
|
|
LD (HL),E |
|
|
|
INC HL |
|
|
|
LD (HL),D ; _HD := _BUF |
|
|
|
INC HL |
|
|
|
LD (HL),E |
|
|
|
INC HL |
|
|
|
LD (HL),D ; _TL := _BUF |
|
|
|
; |
|
|
|
UART_INITDEV5: |
|
|
|
; |
|
|
|
#ENDIF |
|
|
|
; |
|
|
|
; |
|
|
|
#IF (UART_DEBUG) |
|
|
|
PRTS(" [$") |
|
|
|
|
|
|
|
; DEBUG: DUMP UART TYPE |
|
|
|
LD A,(IY + 1) |
|
|
|
LD A,(IY+1) |
|
|
|
CALL PRTHEXBYTE |
|
|
|
|
|
|
|
; DEBUG: DUMP IIR |
|
|
|
@ -334,25 +623,68 @@ UART_INITDEV4: |
|
|
|
; |
|
|
|
; |
|
|
|
UART_QUERY: |
|
|
|
LD E,(IY + 4) ; FIRST CONFIG BYTE TO E |
|
|
|
LD D,(IY + 5) ; SECOND CONFIG BYTE TO D |
|
|
|
LD E,(IY+4) ; FIRST CONFIG BYTE TO E |
|
|
|
LD D,(IY+5) ; SECOND CONFIG BYTE TO D |
|
|
|
XOR A ; SIGNAL SUCCESS |
|
|
|
RET ; DONE |
|
|
|
; |
|
|
|
; |
|
|
|
; |
|
|
|
UART_DEVICE: |
|
|
|
LD D,CIODEV_UART ; D := DEVICE TYPE |
|
|
|
LD E,(IY) ; E := PHYSICAL UNIT |
|
|
|
LD C,$00 ; C := DEVICE TYPE, 0x00 IS RS-232 |
|
|
|
LD H,0 ; H := 0, DRIVER HAS NO MODES |
|
|
|
LD L,(IY+2) ; L := BASE I/O ADDRESS |
|
|
|
XOR A ; SIGNAL SUCCESS |
|
|
|
LD D,CIODEV_UART ; D := DEVICE TYPE |
|
|
|
LD E,(IY) ; E := PHYSICAL UNIT |
|
|
|
LD C,$00 ; C := DEVICE TYPE, 0x00 IS RS-232 |
|
|
|
LD H,(IY+1) ; H := UART TYPE BYTE |
|
|
|
LD L,(IY+2) ; L := BASE I/O ADDRESS |
|
|
|
XOR A ; SIGNAL SUCCESS |
|
|
|
RET |
|
|
|
; |
|
|
|
; UART DETECTION ROUTINE |
|
|
|
; |
|
|
|
UART_DETECT: |
|
|
|
CALL UART_CHIP ; DETECT CHIP VARIANT |
|
|
|
RET Z ; DONE IF NO CHIP |
|
|
|
|
|
|
|
;LD A,UART_16550A ; *DEBUG* |
|
|
|
|
|
|
|
LD C,A ; PUT CHIP VARIANT IN C |
|
|
|
; |
|
|
|
; *** FIXME *** THIS NEEDS TO CHANGE WHEN INTMODE 2/3 IS IMPLEMENTED. AT THIS |
|
|
|
; POINT, WE ONLY SET THE INT RCV FEATURE BIT FOR IM1 BECAUSE THAT IS ALL |
|
|
|
; THAT IS IMPLEMENTED. |
|
|
|
; |
|
|
|
;#IF ((UARTINTS) & (INTMODE > 0)) |
|
|
|
#IF ((UARTINTS) & (INTMODE == 1)) |
|
|
|
; |
|
|
|
; CHECK TO SEE IF INT RCV WANTED ON THIS DEVICE |
|
|
|
PUSH AF ; SAVE CHIP ID |
|
|
|
CP UART_16550C ; 16550C OR LATER? |
|
|
|
JR NC,UART_DETECT1 ; NO INTS, USE AFC INSTEAD |
|
|
|
LD A,(IY+7) ; MSB OF RING BUFFER |
|
|
|
OR A ; SET FLAGS |
|
|
|
JR Z,UART_DETECT1 ; NO BUFFER, NO INTS ALLOWED |
|
|
|
SET UART_INTACT,C ; SET INT RCV BIT |
|
|
|
; |
|
|
|
UART_DETECT1: |
|
|
|
POP AF ; RESTORE CHIP ID |
|
|
|
; |
|
|
|
#ENDIF |
|
|
|
; |
|
|
|
CP UART_16550 ; 16550 OR GREATER? |
|
|
|
JR C,UART_DETECT2 ; NO MORE FEATURES |
|
|
|
SET UART_FIFOACT,C ; RECORD FIFO FEATURE |
|
|
|
CP UART_16550C ; 16550C OR GREATER? |
|
|
|
JR C,UART_DETECT2 ; NO MORE FEATURES |
|
|
|
SET UART_AFCACT,C ; RECORD AFC FEATURE |
|
|
|
; |
|
|
|
UART_DETECT2: |
|
|
|
LD A,C ; RETURN RESULT IN A |
|
|
|
CALL PRTHEXBYTE |
|
|
|
RET |
|
|
|
; |
|
|
|
; DETERMINE TEH UART CHIP VARIANT AND RETURN IN A |
|
|
|
; |
|
|
|
UART_CHIP: |
|
|
|
; |
|
|
|
; SEE IF UART IS THERE BY CHECKING DLAB FUNCTIONALITY |
|
|
|
XOR A ; ZERO ACCUM |
|
|
|
@ -363,26 +695,26 @@ UART_DETECT: |
|
|
|
UART_OUTP(UART_DLM) ; OUTPUT TO DLM |
|
|
|
UART_INP(UART_DLM) ; READ IT BACK |
|
|
|
CP $5A ; CHECK FOR TEST VALUE |
|
|
|
JP NZ,UART_DETECT_NONE ; NOPE, UNKNOWN UART OR NOT PRESENT |
|
|
|
JP NZ,UART_CHIP_NONE ; NOPE, UNKNOWN UART OR NOT PRESENT |
|
|
|
XOR A ; DLAB BIT OFF |
|
|
|
UART_OUTP(UART_LCR) ; OUTPUT TO LCR (DLAB REGS NOW INACTIVE) |
|
|
|
UART_INP(UART_IER) ; READ IER |
|
|
|
CP $5A ; CHECK FOR TEST VALUE |
|
|
|
JP Z,UART_DETECT_NONE ; IF STILL $5A, UNKNOWN OR NOT PRESENT |
|
|
|
JP Z,UART_CHIP_NONE ; IF STILL $5A, UNKNOWN OR NOT PRESENT |
|
|
|
; |
|
|
|
; TEST FOR FUNCTIONAL SCRATCH REG, IF NOT, WE HAVE AN 8250 |
|
|
|
LD A,$5A ; LOAD TEST VALUE |
|
|
|
UART_OUTP(UART_SCR) ; PUT IT IN SCRATCH REGISTER |
|
|
|
UART_INP(UART_SCR) ; READ IT BACK |
|
|
|
CP $5A ; CHECK IT |
|
|
|
JR NZ,UART_DETECT_8250 ; STUPID 8250 |
|
|
|
JR NZ,UART_CHIP_8250 ; STUPID 8250 |
|
|
|
; |
|
|
|
; TEST FOR EFR REGISTER WHICH IMPLIES 16650/850 |
|
|
|
LD A,$BF ; VALUE TO ENABLE EFR |
|
|
|
UART_OUTP(UART_LCR) ; WRITE IT TO LCR |
|
|
|
UART_INP(UART_SCR) ; READ SCRATCH REGISTER |
|
|
|
CP $5A ; SPR STILL THERE? |
|
|
|
JR NZ,UART_DETECT1 ; NOPE, HIDDEN, MUST BE 16650/850 |
|
|
|
JR NZ,UART_CHIP1 ; NOPE, HIDDEN, MUST BE 16650/850 |
|
|
|
; |
|
|
|
; RESET LCR TO DEFAULT (DLAB OFF) |
|
|
|
;LD A,$80 ; DLAB BIT ON |
|
|
|
@ -394,22 +726,21 @@ UART_DETECT: |
|
|
|
UART_OUTP(UART_FCR) ; PUT IT IN FCR |
|
|
|
UART_INP(UART_IIR) ; READ BACK FROM IIR |
|
|
|
BIT 6,A ; BIT 6 IS FIFO ENABLE, LO BIT |
|
|
|
JR Z,UART_DETECT_16450 ; IF NOT SET, MUST BE 16450 |
|
|
|
JR Z,UART_CHIP_16450 ; IF NOT SET, MUST BE 16450 |
|
|
|
BIT 7,A ; BIT 7 IS FIFO ENABLE, HI BIT |
|
|
|
JR Z,UART_DETECT_16550 ; IF NOT SET, MUST BE 16550 |
|
|
|
JR Z,UART_CHIP_16550 ; IF NOT SET, MUST BE 16550 |
|
|
|
BIT 5,A ; BIT 5 IS 64 BYTE FIFO |
|
|
|
JR Z,UART_DETECT2 ; IF NOT SET, MUST BE 16550A/C |
|
|
|
JR UART_DETECT_16750 ; ONLY THING LEFT IS 16750 |
|
|
|
JR Z,UART_CHIP2 ; IF NOT SET, MUST BE 16550A/C |
|
|
|
JR UART_CHIP_16750 ; ONLY THING LEFT IS 16750 |
|
|
|
; |
|
|
|
UART_DETECT1: ; PICK BETWEEN 16650/850 |
|
|
|
UART_CHIP1: ; PICK BETWEEN 16650/850 |
|
|
|
; RESET LCR TO DEFAULT (DLAB OFF) |
|
|
|
XOR A ; DLAB BIT OFF |
|
|
|
UART_OUTP(UART_LCR) ; RESET LCR |
|
|
|
; NOT SURE HOW TO DIFFERENTIATE 16650 FROM 16850 YET |
|
|
|
JR UART_DETECT_16650 ; ASSUME 16650 |
|
|
|
RET |
|
|
|
JR UART_CHIP_16650 ; ASSUME 16650 |
|
|
|
; |
|
|
|
UART_DETECT2: ; PICK BETWEEN 16550A/C |
|
|
|
UART_CHIP2: ; PICK BETWEEN 16550A/C |
|
|
|
; SET AFC BIT IN FCR |
|
|
|
LD A,$20 ; SET AFC BIT, MCR:5 |
|
|
|
UART_OUTP(UART_MCR) ; WRITE NEW FCR VALUE |
|
|
|
@ -417,45 +748,45 @@ UART_DETECT2: ; PICK BETWEEN 16550A/C |
|
|
|
; READ IT BACK, IF SET, WE HAVE 16550C |
|
|
|
UART_INP(UART_MCR) ; READ BACK MCR |
|
|
|
BIT 5,A ; CHECK AFC BIT |
|
|
|
JR Z,UART_DETECT_16550A ; NOT SET, SO 16550A |
|
|
|
JR UART_DETECT_16550C ; IS SET, SO 16550C |
|
|
|
JR Z,UART_CHIP_16550A ; NOT SET, SO 16550A |
|
|
|
JR UART_CHIP_16550C ; IS SET, SO 16550C |
|
|
|
; |
|
|
|
UART_DETECT_NONE: |
|
|
|
LD A,(IY + 2) ; BASE IO PORT |
|
|
|
UART_CHIP_NONE: |
|
|
|
LD A,(IY+2) ; BASE IO PORT |
|
|
|
CP UARTSBASE ; IS THIS PRIMARY SBC PORT? |
|
|
|
JR Z,UART_DETECT_8250 ; SPECIAL CASE FOR PRIMARY UART! |
|
|
|
JR Z,UART_CHIP_8250 ; SPECIAL CASE FOR PRIMARY UART! |
|
|
|
LD A,UART_NONE ; IF SO, TREAT AS 8250 NO MATTER WHAT |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_8250: |
|
|
|
UART_CHIP_8250: |
|
|
|
LD A,UART_8250 |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_16450: |
|
|
|
UART_CHIP_16450: |
|
|
|
LD A,UART_16450 |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_16550: |
|
|
|
UART_CHIP_16550: |
|
|
|
LD A,UART_16550 |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_16550A: |
|
|
|
UART_CHIP_16550A: |
|
|
|
LD A,UART_16550A |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_16550C: |
|
|
|
UART_CHIP_16550C: |
|
|
|
LD A,UART_16550C |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_16650: |
|
|
|
UART_CHIP_16650: |
|
|
|
LD A,UART_16650 |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_16750: |
|
|
|
UART_CHIP_16750: |
|
|
|
LD A,UART_16750 |
|
|
|
RET |
|
|
|
; |
|
|
|
UART_DETECT_16850: |
|
|
|
UART_CHIP_16850: |
|
|
|
LD A,UART_16850 |
|
|
|
RET |
|
|
|
; |
|
|
|
@ -492,12 +823,13 @@ UART_PRTCFG: |
|
|
|
LD A,(IY) ; DEVICE NUM |
|
|
|
CALL PRTDECB ; PRINT DEVICE NUM |
|
|
|
PRTS(": IO=0x$") ; FORMATTING |
|
|
|
LD A,(IY + 2) ; GET BASE PORT |
|
|
|
LD A,(IY+2) ; GET BASE PORT |
|
|
|
CALL PRTHEXBYTE ; PRINT BASE PORT |
|
|
|
|
|
|
|
; PRINT THE UART TYPE |
|
|
|
CALL PC_SPACE ; FORMATTING |
|
|
|
LD A,(IY + 1) ; GET UART TYPE BYTE |
|
|
|
LD A,(IY+1) ; GET UART TYPE BYTE |
|
|
|
AND $0F ; LOW BITS ONLY |
|
|
|
RLCA ; MAKE IT A WORD OFFSET |
|
|
|
LD HL,UART_TYPE_MAP ; POINT HL TO TYPE MAP TABLE |
|
|
|
CALL ADDHLA ; HL := ENTRY |
|
|
|
@ -507,25 +839,31 @@ UART_PRTCFG: |
|
|
|
CALL WRITESTR ; PRINT IT |
|
|
|
; |
|
|
|
; ALL DONE IF NO UART WAS DETECTED |
|
|
|
LD A,(IY + 1) ; GET UART TYPE BYTE |
|
|
|
LD A,(IY+1) ; GET UART TYPE BYTE |
|
|
|
OR A ; SET FLAGS |
|
|
|
RET Z ; IF ZERO, NOT PRESENT |
|
|
|
; |
|
|
|
PRTS(" MODE=$") ; FORMATTING |
|
|
|
LD E,(IY + 4) ; LOAD CONFIG |
|
|
|
LD D,(IY + 5) ; ... WORD TO DE |
|
|
|
LD E,(IY+4) ; LOAD CONFIG |
|
|
|
LD D,(IY+5) ; ... WORD TO DE |
|
|
|
CALL PS_PRTSC0 ; PRINT CONFIG |
|
|
|
; |
|
|
|
; ; PRINT FEATURES ENABLED |
|
|
|
; LD A,(UART_FEAT) |
|
|
|
; BIT UART_FIFO,A |
|
|
|
; JR Z,UART_INITUNIT2 |
|
|
|
; PRTS(" FIFO$") |
|
|
|
;UART_INITUNIT2: |
|
|
|
; BIT UART_AFC,A |
|
|
|
; JR Z,UART_INITUNIT3 |
|
|
|
; PRTS(" AFC$") |
|
|
|
;UART_INITUNIT3: |
|
|
|
; PRINT FEATURES ENABLED |
|
|
|
BIT UART_INTACT,(IY+1) ; GET INT RCV BIT |
|
|
|
JR Z,UART_PRTCFG1 |
|
|
|
PRTS(" INT$") |
|
|
|
; |
|
|
|
UART_PRTCFG1: |
|
|
|
BIT UART_FIFOACT,(IY+1) ; GET FIFO BIT |
|
|
|
JR Z,UART_PRTCFG2 |
|
|
|
PRTS(" FIFO$") |
|
|
|
; |
|
|
|
UART_PRTCFG2: |
|
|
|
BIT UART_AFCACT,(IY+1) ; GET AFC BIT |
|
|
|
JR Z,UART_PRTCFG3 |
|
|
|
PRTS(" AFC$") |
|
|
|
; |
|
|
|
UART_PRTCFG3: |
|
|
|
; |
|
|
|
XOR A |
|
|
|
RET |
|
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@ -537,7 +875,7 @@ UART_PRTCFG: |
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UART_INP_IMP: |
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EX (SP),HL ; SWAP HL AND TOS |
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PUSH BC ; PRESERVE BC |
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LD A,(IY + 2) ; GET UART IO BASE PORT |
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LD A,(IY+2) ; GET UART IO BASE PORT |
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OR (HL) ; OR IN REGISTER ID BITS |
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LD C,A ; C := PORT |
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IN A,(C) ; READ PORT INTO A |
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@ -552,7 +890,7 @@ UART_OUTP_IMP: |
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EX (SP),HL ; SWAP HL AND TOS |
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PUSH BC ; PRESERVE BC |
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LD B,A ; PUT VALUE TO WRITE IN B |
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LD A,(IY + 2) ; GET UART IO BASE PORT |
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LD A,(IY+2) ; GET UART IO BASE PORT |
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OR (HL) ; OR IN REGISTER ID BITS |
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LD C,A ; C := PORT |
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OUT (C),B ; WRITE VALUE TO PORT |
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@ -594,31 +932,34 @@ UART_DEV .DB 0 ; DEVICE NUM USED DURING INIT |
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; |
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UART_CFG: |
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#IF (UARTSBC) |
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UART_CFG_SBC: |
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; SBC/ZETA ONBOARD SERIAL PORT |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UARTSBASE ; IO PORT BASE (RBR, THR) |
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.DB UARTSBASE + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW UARTSBC_RCVBUF ; POINTER TO RCV BUFFER STRUCT |
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#ENDIF |
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#IF (UARTCAS) |
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UART_CFG_CAS: |
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; CASSETTE INTERFACE SERIAL PORT |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UARTCBASE ; IO PORT BASE (RBR, THR) |
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.DB UARTCBASE + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCASSPD ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW UARTCAS_RCVBUF ; POINTER TO RCV BUFFER STRUCT |
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#ENDIF |
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#IF (UARTMFP) |
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UART_CFG_MFP: |
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; MF/PIC SERIAL PORT |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UARTMBASE ; IO PORT BASE (RBR, THR) |
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.DB UARTMBASE + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW 0 ; SHOULD NEVER NEED INT HANDLER |
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#ENDIF |
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#IF (UART4) |
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; 4UART SERIAL PORT A |
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@ -627,28 +968,28 @@ UART_CFG: |
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.DB UART4BASE+0 ; IO PORT BASE (RBR, THR) |
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.DB UART4BASE+0 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW 0 ; SHOULD NEVER NEED INT HANDLER |
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; 4UART SERIAL PORT B |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART4BASE+8 ; IO PORT BASE (RBR, THR) |
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.DB UART4BASE+8 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW 0 ; SHOULD NEVER NEED INT HANDLER |
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; 4UART SERIAL PORT C |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART4BASE+16 ; IO PORT BASE (RBR, THR) |
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.DB UART4BASE+16 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW 0 ; SHOULD NEVER NEED INT HANDLER |
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; 4UART SERIAL PORT D |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART4BASE+24 ; IO PORT BASE (RBR, THR) |
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.DB UART4BASE+24 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW 0 ; SHOULD NEVER NEED INT HANDLER |
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#ENDIF |
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#IF (UARTRC) |
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; UARTRC SERIAL PORT A |
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@ -657,14 +998,47 @@ UART_CFG: |
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.DB UARTRBASE ; IO PORT BASE (RBR, THR) |
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.DB UARTRBASE + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW 0 ; SHOULD NEVER NEED INT HANDLER |
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; UARTRC SERIAL PORT B |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UARTRBASE+8 ; IO PORT BASE (RBR, THR) |
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.DB UARTRBASE+8 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UARTCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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.DW 0 ; SHOULD NEVER NEED INT HANDLER |
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#ENDIF |
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; |
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UART_CNT .EQU ($ - UART_CFG) / 8 |
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; |
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#IF ((!UARTINTS) | (INTMODE == 0)) |
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; |
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UARTSBC_RCVBUF .EQU 0 |
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UARTCAS_RCVBUF .EQU 0 |
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; |
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#ELSE |
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; |
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; UART SBC RECEIVE BUFFER |
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; |
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#IF (UARTSBC) |
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; |
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UARTSBC_RCVBUF: |
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UARTSBC_CNT .DB 0 ; CHARACTERS IN RING BUFFER |
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UARTSBC_HD .DW UARTSBC_BUF ; BUFFER HEAD POINTER |
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UARTSBC_TL .DW UARTSBC_BUF ; BUFFER TAIL POINTER |
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UARTSBC_BUF .FILL UART_BUFSZ,0 ; RECEIVE RING BUFFER |
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; |
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#ENDIF |
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; |
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; UART CASSETTE RECEIVE BUFFER |
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; |
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#IF (UARTCAS) |
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; |
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UARTCAS_RCVBUF: |
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UARTCAS_CNT .DB 0 ; CHARACTERS IN RING BUFFER |
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UARTCAS_HD .DW UARTCAS_BUF ; BUFFER HEAD POINTER |
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UARTCAS_TL .DW UARTCAS_BUF ; BUFFER TAIL POINTER |
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UARTCAS_BUF .FILL UART_BUFSZ,0 ; RECEIVE RING BUFFER |
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; |
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#ENDIF |
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; |
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#ENDIF |
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b1ackmai1er
4 years ago
GitHub