Merge pull request #33 from wwarthen/master

Resync

Doc/ChangeLog.txt

@@ -27,6 +27,7 @@ Version 2.9.2
 - PMS: Add sound support to NASCOM BASIC
 - WBW: Updated FAT to add MD and FORMAT commands
 - WBW: Add CP/M 3 (experimental)
+- M?T: Support Shift register SPI WIZNET for RC2014
 
 Version 2.9.1
 -------------

Source/CPM3/bioskrnl.asm

@@ -188,25 +188,6 @@ set$jumps:
 	sta 0 ! sta 5		; set up jumps in page zero
 	lxi h,?wboot ! shld 1	; BIOS warm start entry
 	lhld @MXTPA ! shld 6	; BDOS system call entry
-
-;	xor	a
-;	ld	hl,40h
-;	ld	b,10h
-;set$jumps1:
-;	ld	(hl),a
-;	inc	hl
-;	djnz	set$jumps1
-
-	; Clear reserved area in page zero
-	xra	a
-	lxi	h,40h
-	mvi	b,10h
-set$jumps1:
-	mov	m,a
-	inx	h
-	dcr	b
-	jnz	set$jumps1
-
 	ret
 
 

Source/CPM3/boot.z80

@@ -24,44 +24,46 @@ tpa$bank	equ 0
 
 ?init:
 	call	?mvinit
-	call	cinit			; char device init
-	ld	hl,signon$msg		; signon message
-	call	?pmsg			; print it
+
+	; Clear reserved area in page zero
+	xor	a
+	ld	hl,40h
+	ld	b,10h
+init$1:
+	ld	(hl),a
+	inc	hl
+	djnz	init$1
 
 	if banked
 
-	; clone page zero from bank 0 to additional banks
+	; Clone page zero from bank 0 to additional banks
 	ld	b,2			; last bank
 	ld	c,0			; src bank
-init$0:
+init$2:
 	push	bc			; save bank id's
-	call	init$1			; copy page zero
-	pop	bc			; restore bank id's
-	djnz	init$0			; loop till done
-	jr	init$2
-	
-init$1:
 	call	?xmove			; set src/dest banks
 	ld	bc,0100h		; size is one page
 	ld	hl,0			; dest adr is 0
 	ld	de,0			; src adr is 0
 	call	?move			; do it
-	ret
-
+	pop	bc			; restore bank id's
+	djnz	init$2			; loop till done
+	
 	endif
 
-init$2:
-	; get boot disk unit and save it
+	call	cinit			; char device init
+	ld	hl,signon$msg		; signon message
+	call	?pmsg			; print it
+
+	; Get boot disk unit and save it
 	ld	bc,0F8E0h	; HBIOS func: get boot info
 	rst	08		; do it, D := boot unit
 	ld	a,d		; move to A
 	ld	(@bootdu),a	; save it
 
-
 	call	dinit
 	ret
 	
-	
 cinit:
 	; Setup CON: I/O vector based on HBIOS console device
 	ld	b,0FAh			; HBIOS Peek Function
@@ -238,7 +240,6 @@ addhla:
 	inc	h
 	ret
 
-
 	cseg	; boot loading most be done from resident memory
 	
     ;	This version of the boot loader loads the CCP from a file

Source/CPM3/move.z80

@@ -7,9 +7,9 @@
 	extrn 	@cbnk
 	
 ?mvinit:
-	ld	bc,0F8F2H	; HBIOS GET BNKINFO
+	ld	bc,0F8F2h	; HBIOS GET BNKINFO
 	;rst	08		; D: BIOS Bank, E: User Bank
-	call	0FFF0H
+	call	0FFF0h		; D: BIOS Bank, E: User Bank
 	ld	a,d
 	ld	(@hbbio),a
 	ld	a,e
@@ -17,8 +17,8 @@
 	ret
 	
 ?xmove:
-	ld	(movbnk),bc	; save source & dest banks
-	or	0FFH		; flag interbank move type
+	ld	(movbnks),bc	; save source & dest banks
+	or	0FFh		; flag interbank move type
 	ld	(movtyp),a	; save it
 	ret
 
@@ -39,77 +39,60 @@ xbnkmov:
 	; Interbank move
 	xor	a		; zero
 	ld	(movtyp),a	; clear move type flag
-	push	de
-	push	hl
-	push	bc
-	pop	hl
 	ld	a,(srcbnk)
 	call	?bnkxlt
-	ld	e,a
+	ld	(0FFE4h),a
 	ld	a,(dstbnk)
 	call	?bnkxlt
-	ld	d,a
-	ld	b,0F4H		; SETCPY
-	;rst	08
-	call	0FFF0H
-	pop	hl
-	pop	de
+	ld	(0FFE7h),a
 	ex	de,hl		; swap address regs for call
-	ld	b,0F5H		; BNKCPY
-	;rst	08
-	call	0FFF0H
+	call	0FFF6h		; HBIOS BNKCPY
 	ex	de,hl		; next addresses in same regs
-	;ld	ix,9999H
-	;halt
 	ret
 
 ?bank:
 	call	?bnkxlt		; xlat to HBIOS bank id
-	jp	0FFF3H		; do it and return
+	jp	0FFF3h		; do it and return
 
 ;
 ; Convert from CPM3 bank id to HBIOS bank id.
 ; CPM3 wants TPA for it's bank 0, so that is special
-; case mapping to HBIOS BID_USR (8EH).  Otherwise, we index
-; down below BID_HBIOS (8DH).  So CPM3 bank usage grows
+; case mapping to HBIOS BID_USR (8Eh).  Otherwise, we index
+; down below BID_HBIOS (8Dh).  So CPM3 bank usage grows
 ; downward.
 ;
-; CPM3		HBIOS
-; ------------- -------------------
-; COMMON	8FH - BID_COM
-; 0 - OS/BUFS	8EH - BID_USR
-;		8DH - BID_BIOS		
-; 1 - TPA	8CH - BID_AUX		
-; 2 - BUFS	8BH - BID_AUX-1	
-; 3 - BUFS	8AH - BID_AUX-2	
+; CPM3		HBIOS		Typical
+; ------------	--------------	-------
+; COMMON	BID_COM		8Fh
+; 0: OS/BUFS	BID_USR         8Eh
+;		BID_BIOS	8Dh	
+; 1: TPA	BID_AUX		8Ch
+; 2: BUFS	BID_AUX-1	8Bh
+; 3: BUFS	BID_AUX-2	8Ah
 ; ...
 ;
 ; N.B., Below BID_AUX is considered RAM disk bank.  Need to
 ; make sure RAM disk is kept small enough to stay below
 ; banks used for OS buffers.
 ;
+; @hbbio & @hbusr are dynamically updated during init
+; to adjust for real size of RAM in system
+;
 ?bnkxlt:
-	;ld	ix,5555H
-	;halt
-	;cp	2
-	;jr	c,xxx
-	;ld	ix,6666H
-	;halt
-;xxx:
 	or	a
 	jr	z,bank0
 	neg			; 2 -> -2
-	add	a,08DH		; 8DH - 2 = 8BH
+	add	a,8Dh		; 8Dh - 2 = 8Bh
 @hbbio	equ	$ - 1		; BID_BIOS
 	ret
 bank0:
-	ld	a,08EH		; 0 -> 8EH
+	ld	a,8Eh		; 0 -> 8Eh
 @hbusr	equ	$ - 1		; BID_USR
 	ret
 	
 movtyp	db	0		; non-zero for interbank move
 
-movbnk:
+movbnks:
 srcbnk	db	0
 dstbnk	db	0
 

Source/HBIOS/cfg_ezz80.asm

@@ -124,7 +124,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_master.asm

@@ -166,7 +166,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_mk4.asm

@@ -124,7 +124,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	TRUE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_n8.asm

@@ -127,7 +127,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_rcz180.asm

@@ -130,7 +130,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_rcz80.asm

@@ -133,7 +133,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_sbc.asm

@@ -124,7 +124,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_scz180.asm

@@ -125,7 +125,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_zeta.asm

@@ -103,7 +103,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/cfg_zeta2.asm

@@ -107,7 +107,7 @@ PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDE8BIT	.EQU	FALSE		; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

Source/HBIOS/sd.asm

@@ -204,6 +204,21 @@ SD_CNTR		.EQU	Z180_CNTR
 SD_TRDR		.EQU	Z180_TRDR
 #ENDIF
 ;
+#IF (SDMODE == SDMODE_MT)		; MT shift register for RC2014 (ref SDMODE_CSIO)
+SD_DEVCNT	.EQU	2		; NUMBER OF PHYSICAL UNITS (SOCKETS)
+SD_OPRREG	.EQU	%00011110	; Dedicated base address $1C
+SD_OPRDEF	.EQU	%00000000	; QUIESCENT STATE
+SD_CD0		.EQU	%00000001	; IN/OUT:SD_OPREG:0 = CD0, PMOD pull CD0 low
+SD_CD1		.EQU	%00000010	; IN:SD_OPREG:1 = CD1, IN=0 Card detect switch
+SD_CD2		.EQU	%00000100	; IN:SD_OPREG:2 = CD2, IN=0 Card detect switch
+SD_CS0		.EQU	%00001000	; IN/OUT:SD_OPREG:3 = CS0, PMOD SPI CS
+SD_CS1		.EQU	%00010000	; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
+SD_CS2		.EQU	%00100000	; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present
+SD_WRTR		.EQU	%00011100	; Write data and transfer
+SD_RDTR		.EQU	%00011101	; Read data and transfer
+SD_RDNTR	.EQU	%00011100	; Read data and NO transfer
+#ENDIF
+;
 ; SD CARD COMMANDS
 ;
 SD_CMD_GO_IDLE_STATE	.EQU	$40 + 0		; $40, CMD0 -> R1
@@ -235,7 +250,7 @@ SD_TYPESDXC	.EQU	4		; SDXC CARD (V3)
 SD_STOK		.EQU	0		; OK
 SD_STINVUNIT	.EQU	-1		; INVALID UNIT
 SD_STRDYTO	.EQU	-2		; TIMEOUT WAITING FOR CARD TO BE READY
-SD_STINITTO	.EQU	-3		; INITIALIZATOIN TIMEOUT
+SD_STINITTO	.EQU	-3		; INITIALIZATION TIMEOUT
 SD_STCMDTO	.EQU	-4		; TIMEOUT WAITING FOR COMMAND RESPONSE
 SD_STCMDERR	.EQU	-5		; COMMAND ERROR OCCURRED (REF SD_RC)
 SD_STDATAERR	.EQU	-6		; DATA ERROR OCCURRED (REF SD_TOK)
@@ -393,6 +408,13 @@ SD_INIT:
 	OR	SD_OPRDEF		; SET OUR BIT DEFAULTS
 	LD	(RTCVAL),A		; SAVE IT
 #ENDIF
+;
+#IF (SDMODE == SDMODE_MT)
+	PRTS(" MODE=MT$")
+	PRTS(" IO=0x$")
+	LD	A,SD_OPRREG
+	CALL	PRTHEXBYTE
+#ENDIF
 ;
 	CALL	SD_PROBE		; CHECK FOR HARDWARE
 	JR	Z,SD_INIT00		; CONTINUE IF PRESENT
@@ -553,8 +575,48 @@ SD_PROBE:
 	CP	$01			; SHOULD READ BACK AS $01
 	RET				; RETURN W/ ZF SET AS NEEDED
 #ENDIF
+;
+#IF (SDMODE == SDMODE_MT)
+	LD	A,SD_OPRDEF
+	OUT	(SD_OPRREG),A		; MAKE SURE CONTROL REGISTER IS CLEARED
+	; TEST WITH PMOD NOT CONNECTED
+	IN	A,(SD_OPRREG)
+	AND	SD_CD0+SD_CS0		; ISOLATE CD0 AND CS0
+	CP	SD_CD0+SD_CS0		; BOTH SHOULD BE HIGH
+	JR	NZ,SD_PROBE_FAIL	; FAIL IF NOT
+	; TEST CD0
+;	LD	A,SD_CD0		; D1=DNP CANNOT TEST
+;	OUT	(SD_OPRREG),A
+;	IN	A,(SD_OPRREG)
+;	AND	SD_CD0
+;	JR	NZ,SD_PROBE_FAIL	; FAIL IF NOT PULLED LOW
+	; TEST CS0
+;	LD	A,SD_CS0		; D2=DNP CANNOT TEST
+;	OUT	(SD_OPRREG),A
+;	IN	A,(SD_OPRREG)
+;	AND	SD_CS0
+;	JR	NZ,SD_PROBE_FAIL	; FAIL IF NOT PULLED LOW
+	; TEST CS1
+	LD	A,SD_CS1
+	OUT	(SD_OPRREG),A
+	IN	A,(SD_OPRREG)
+	AND	SD_CS1
+	JR	NZ,SD_PROBE_FAIL	; FAIL IF NOT PULLED LOW
+	; TEST CS2
+	LD	A,SD_CS2
+	OUT	(SD_OPRREG),A
+	IN	A,(SD_OPRREG)
+	AND	SD_CS2
+	JR	NZ,SD_PROBE_FAIL	; FAIL IF NOT PULLED LOW
+#ENDIF
 ;
 	XOR	A			; SIGNAL SUCCESS
+;
+#IF (SDMODE == SDMODE_MT)
+SD_PROBE_FAIL:
+	LD	A,SD_OPRDEF
+	OUT	(SD_OPRREG),A		; MAKE SURE CONTROL REGISTER IS CLEARED
+#ENDIF
 	RET				; AND RETURN
 ;
 ;=============================================================================
@@ -764,6 +826,13 @@ SD_INITCARD:
 	JP	Z,SD_NOMEDIA		; Z=NO MEDIA, HANDLE IF SO
 ;
 	; WAKE UP THE CARD, KEEP DIN HI (ASSERTED) AND /CS HI (DEASSERTED)
+#IF (SDMODE == SDMODE_MT)
+	LD	A,$FF
+	LD	B,$10	; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8)
+SD_INITCARD1:
+	OUT	(SD_WRTR),A		; SEND 8 CLOCKS
+	DJNZ	SD_INITCARD1
+#ELSE
 	LD	B,$10	; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8)
 SD_INITCARD1:
 	LD	A,$FF			; KEEP DIN HI
@@ -771,6 +840,7 @@ SD_INITCARD1:
 	CALL	SD_PUT			; SEND 8 CLOCKS
 	POP	BC			; RESTORE LOOP CONTROL
 	DJNZ	SD_INITCARD1		; LOOP AS NEEDED
+#ENDIF
 ;
 	; PUT CARD IN IDLE STATE
 	CALL	SD_GOIDLE		; GO TO IDLE
@@ -801,6 +871,9 @@ SD_INITCARD3:
 	CALL	VDELAY			; CPU SPEED NORMALIZED DELAY
 	; SEND APP CMD INTRODUCER
 	CALL	SD_EXECACMD		; SEND APP COMMAND INTRODUCER
+#IF (SDMODE == SDMODE_MT)
+	CALL	NZ,SD_EXECACMD		; retry any fail
+#ENDIF
 	CP	SD_STCMDERR		; COMMAND ERROR?
 	JR	Z,SD_INITCARD3A		; IF SO, TRY MMC CARD INIT
 	OR	A			; SET FLAGS
@@ -859,7 +932,11 @@ SD_INITCARD4:
 	CALL	SD_EXECCMD		; EXECUTE COMMAND
 	RET	NZ			; ABORT ON ERROR
 	; CMD58 WORKED, GET OCR DATA AND SET CARD TYPE
+#IF (SDMODE == SDMODE_MT)
+	IN	A,(SD_RDTR)		; BITS 31-24
+#ELSE
 	CALL	SD_GET			; BITS 31-24
+#ENDIF
 	CALL	SD_DONE			; FINISH THE TRANSACTION
 	AND	$40			; ISOLATE BIT 30 (CCS)
 	LD	C,SD_TYPESDSC		; ASSUME V1 CARD
@@ -1222,6 +1299,16 @@ SD_EXECCMD:
 SD_EXECCMD0:
 	; SEND THE COMMAND
 	LD	HL,SD_CMDBUF		; POINT TO COMMAND BUFFER
+#IF (SDMODE == SDMODE_MT)
+;	OUT	(SD_WRTR),A		; SEND IT
+	LD	C,SD_WRTR
+	OUTI
+	OUTI
+	OUTI
+	OUTI
+	OUTI
+	OUTI
+#ELSE
 	LD	E,6			; COMMANDS ARE 6 BYTES
 SD_EXECCMD1:
 	LD	A,(HL)			; PREPARE TO SEND NEXT BYTE
@@ -1229,15 +1316,35 @@ SD_EXECCMD1:
 	INC	HL			; POINT TO NEXT BYTE
 	DEC	E			; DEC LOOP COUNTER
 	JR	NZ,SD_EXECCMD1		; LOOP TILL DONE W/ ALL 6 BYTES
+#ENDIF
 ;
 #IF (SD_NOPULLUP)
 	; THE FIRST FILL BYTE IS DISCARDED!  THIS HACK IS REQUIRED BY
 	; STUPID SD CARD ADAPTERS THAT NOW OMIT THE MISO PULL-UP.  SEE
 	; COMMENTS AT TOP OF THIS FILE.
+  #IF (SDMODE == SDMODE_MT)
+	IN	A,(SD_RDTR)		; GET A BYTE AND DISCARD IT
+  #ELSE
 	CALL	SD_GET			; GET A BYTE AND DISCARD IT
+  #ENDIF
 #ENDIF
 ;
 	; GET RESULT
+#IF (SDMODE == SDMODE_MT)
+	; 256 loops might not be long enough timeout
+	; when only IN is required to read data
+;	LD	DE,$7FFF		; INIT TIMEOUT LOOP COUNTER
+	LD	E,0			; INIT TIMEOUT LOOP COUNTER
+SD_EXECCMD2:
+	IN	A,(SD_RDTR)		; GET A BYTE FROM THE CARD
+	OR	A			; SET FLAGS
+	JP	P,SD_EXECCMD3		; IF HIGH BIT IS 0, WE HAVE RESULT
+;	DEC	DE
+;	BIT	7,D
+;	JR	Z,SD_EXECCMD2		; KEEP TRYING UNTIL TIMEOUT
+	DEC	E			; OTHERWISE DECREMENT LOOP COUNTER
+	JR	NZ,SD_EXECCMD2		; AND LOOP UNTIL TIMEOUT
+#ELSE
 	LD	E,0			; INIT TIMEOUT LOOP COUNTER
 SD_EXECCMD2:
 	CALL	SD_GET			; GET A BYTE FROM THE CARD
@@ -1245,6 +1352,7 @@ SD_EXECCMD2:
 	JP	P,SD_EXECCMD3		; IF HIGH BIT IS 0, WE HAVE RESULT
 	DEC	E			; OTHERWISE DECREMENT LOOP COUNTER
 	JR	NZ,SD_EXECCMD2		; AND LOOP UNTIL TIMEOUT
+#ENDIF
 	JP	SD_ERRCMDTO
 ;
 SD_EXECCMD3:
@@ -1266,6 +1374,44 @@ SD_EXECCMD3:
 ; SD_GETDATA
 ;
 SD_GETDATA:
+#IF (SDMODE == SDMODE_MT)
+	LD	DE,$7FFF		; LOOP MAX (TIMEOUT)
+SD_GETDATA1:
+	IN	A,(SD_RDTR)
+
+	CP	$FF			; WANT BYTE != $FF
+	JR	NZ,SD_GETDATA2		; NOT $FF, MOVE ON
+	DEC	DE
+	BIT	7,D
+	JR	Z,SD_GETDATA1		; KEEP TRYING UNTIL TIMEOUT
+SD_GETDATA2:
+	LD	(SD_TOK),A		; SAVE TOKEN VALUE
+  #IF (SDTRACE >= 3)
+	PUSH	AF
+	CALL	SD_PRTTOK
+	POP	AF
+  #ENDIF
+
+	CP	$FE			; PACKET START?
+	JR	NZ,SD_GETDATA4		; NOPE, ABORT, A HAS ERROR CODE
+
+	LD	D,B			; SIZE TO DB
+	LD	B,C
+	LD	C,(SD_RDTR)
+
+	INC	B
+	DEC	B
+	JR	Z,SD_GETDATA3
+	INC	D
+SD_GETDATA3:
+	INIR				; GET BLOCK
+
+	DEC	D
+	JR	NZ,SD_GETDATA3		; LOOP FOR ALL BYTES
+
+	IN	A,(SD_RDTR)		; DISCARD CRC BYTE 1
+	IN	A,(SD_RDTR)		; DISCARD CRC BYTE 2
+#ELSE
 	PUSH	HL			; SAVE DESTINATION ADDRESS
 	PUSH	BC			; SAVE LENGTH TO RECEIVE
 	LD	DE,$7FFF		; LOOP MAX (TIMEOUT)
@@ -1278,11 +1424,11 @@ SD_GETDATA1:
 	JR	Z,SD_GETDATA1		; KEEP TRYING UNTIL TIMEOUT
 SD_GETDATA2:
 	LD	(SD_TOK),A		; SAVE TOKEN VALUE
-#IF (SDTRACE >= 3)
+  #IF (SDTRACE >= 3)
 	PUSH	AF
 	CALL	SD_PRTTOK
 	POP	AF
-#ENDIF
+  #ENDIF
 	POP	DE			; RESTORE LENGTH TO RECEIVE
 	POP	HL			; RECOVER DEST ADDRESS
 	CP	$FE			; PACKET START?
@@ -1297,6 +1443,7 @@ SD_GETDATA3:
 	JR	NZ,SD_GETDATA3		; LOOP FOR ALL BYTES
 	CALL	SD_GET			; DISCARD CRC BYTE 1
 	CALL	SD_GET			; DISCARD CRC BYTE 2
+#ENDIF
 	XOR	A			; RESULT IS ZERO
 SD_GETDATA4:
 	RET
@@ -1304,6 +1451,32 @@ SD_GETDATA4:
 ; SD_PUTDATA
 ;
 SD_PUTDATA:
+#IF (SDMODE == SDMODE_MT)
+	LD	D,B			; length to DB
+	LD	B,C
+	LD	A,$FE			; PACKET START	
+	OUT	(SD_WRTR),A		; SEND IT
+
+	LD	C,SD_WRTR
+
+	INC	B			; IF B!=0
+	DEC	B
+	JR	Z,SD_PUTDATA1
+	INC	D			; THEN D=D+1
+SD_PUTDATA1:
+	OTIR				; SEND B BYTES
+
+	DEC	D
+	JR	NZ,SD_PUTDATA1		; LOOP FOR ALL BYTES
+
+	LD	A,$FF			; DUMMY CRC BYTE
+	OUT	(SD_WRTR),A			
+	OUT	(SD_WRTR),A		; SEND IT TWICE
+
+	LD	DE,$7FFF		; LOOP MAX (TIMEOUT)
+SD_PUTDATA2:
+	IN	A,(SD_RDTR)
+#ELSE
 	PUSH	HL			; SAVE SOURCE ADDRESS
 	PUSH	BC			; SAVE LENGTH TO SEND
 
@@ -1327,6 +1500,7 @@ SD_PUTDATA1:
 	LD	DE,$7FFF		; LOOP MAX (TIMEOUT)
 SD_PUTDATA2:
 	CALL	SD_GET
+#ENDIF
 	CP	$FF			; WANT BYTE != $FF
 	JR	NZ,SD_PUTDATA3		; NOT $FF, MOVE ON
 	DEC    DE
@@ -1334,11 +1508,11 @@ SD_PUTDATA2:
 	JR	Z,SD_PUTDATA2		; KEEP TRYING UNTIL TIMEOUT
 SD_PUTDATA3:
 	LD	(SD_TOK),A
-#IF (SDTRACE >= 3)
+  #IF (SDTRACE >= 3)
 	PUSH	AF
 	CALL	SD_PRTTOK
 	POP	AF
-#ENDIF
+  #ENDIF
 	AND	$1F
 	CP	$05
 	RET	NZ
@@ -1350,7 +1524,11 @@ SD_PUTDATA3:
 SD_WAITRDY:
 	LD	DE,$FFFF		; LOOP MAX (TIMEOUT)
 SD_WAITRDY1:
+#IF (SDMODE == SDMODE_MT)
+	IN	A,(SD_RDTR)
+#ELSE
 	CALL	SD_GET
+#ENDIF
 	INC	A			; $FF -> $00
 	RET	Z			; IF READY, RETURN
 	DEC	DE
@@ -1369,12 +1547,16 @@ SD_WAITRDY1:
 ; IRRELEVANT. IT CAN BE ASSERTED OR DE-ASSERTED.
 ;
 ; NOTE THAT I HAVE FOUND AT LEAST ONE MMC CARD THAT FAILS UNLESS THE CS SIGNAL
-; REMAINS ACTIVE DURING THE 8 CLOCKS, SO THE CLOCKS ARE SENT BEFORE DESLECTING THE CARD.
+; REMAINS ACTIVE DURING THE 8 CLOCKS, SO THE CLOCKS ARE SENT BEFORE DESELECTING THE CARD.
 ;
 SD_DONE:
 	PUSH	AF
 	LD	A,$FF
+#IF (SDMODE == SDMODE_MT)
+	OUT	(SD_WRTR),A
+#ELSE
 	CALL	SD_PUT
+#ENDIF
 	CALL	SD_DESELECT
 	POP	AF
 	RET
@@ -1483,7 +1665,26 @@ SD_SELECT2:
 	AND	~SD_CS			; SET SD_CS (CHIP SELECT)
   #ENDIF
 #ELSE
+  #IF (SDMODE == SDMODE_MT)
+	IN	A,(SD_OPRREG)
+	BIT	0,(IY+SD_DEV)		; DEVICE 0 OR 1
+	JR	NZ,SD_SELECT1
+	AND	SD_CS1			; DEVICE 0
+	JR	SD_SELECT2
+SD_SELECT1:
+	AND	SD_CS2			; DEVICE 1
+SD_SELECT2:
+	JR	NZ,SD_SELECT3		; NZ if CS input high
+	POP	DE			; return address of call to SD_SELECT
+	POP	DE			; return address of call to SD_WAITRDY
+	JR	SD_NOMEDIA
+SD_SELECT3:
+	LD	D,A
+	LD	A,(SD_OPRVAL)
+	OR	D			
+  #ELSE
 	OR	SD_CS			; SET SD_CS (CHIP SELECT)
+  #ENDIF
 #ENDIF
 	LD	(SD_OPRVAL),A
 	OUT	(SD_OPRREG),A
@@ -1501,7 +1702,11 @@ SD_DESELECT:
 	OR	SD_CS			; RESET SD_CS (CHIP SELECT)
   #ENDIF
 #ELSE
+  #IF (SDMODE == SDMODE_MT)
+	AND	~(SD_CS1 + SD_CS2)	; RESET SD_CS1 and SD_CS2 (CHIP SELECT)
+  #ELSE
 	AND	~SD_CS			; RESET SD_CS (CHIP SELECT)
+  #ENDIF
 #ENDIF
 	LD	(SD_OPRVAL),A
 	OUT	(SD_OPRREG),A
@@ -1529,18 +1734,20 @@ SD_WAITRX:
 ;
 ; SEND ONE BYTE
 ;
+#IF (SDMODE != SDMODE_MT)		; SDMODE_MT uses "OUT  (SD_WRTR),A"
+;
 SD_PUT:
-#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
+  #IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
 	CALL	MIRROR			; MSB<-->LSB MIRROR BITS, RESULT IN C
 	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
 	OUT0	(SD_TRDR),C		; PUT BYTE IN BUFFER
 	IN0	A,(SD_CNTR)
 	SET	4,A			; SET TRANSMIT ENABLE
 	OUT0	(SD_CNTR),A
-#ELSE
-#IF (SDMODE == SDMODE_UART)
+  #ELSE
+    #IF (SDMODE == SDMODE_UART)
 	XOR	$FF			; DI IS INVERTED ON UART
-#ENDIF
+    #ENDIF
 	LD	C,A			; C=BYTE TO SEND
 	LD	B,8			; SEND 8 BITS (LOOP 8 TIMES)
 	LD	A,(SD_OPRVAL)		; LOAD CURRENT OPR VALUE
@@ -1556,13 +1763,16 @@ SD_PUT1:
 	DJNZ	SD_PUT1			; REPEAT FOR ALL 8 BITS
 	LD	A,(SD_OPRVAL)		; LOAD CURRENT OPR VALUE
 	OUT	(SD_OPRREG),A		; LEAVE WITH CLOCK LOW
-#ENDIF
+  #ENDIF
 	RET				; DONE
+#ENDIF
 ;
 ; RECEIVE ONE BYTE
 ;
+#IF (SDMODE != SDMODE_MT)		; SDMODE_MT uses "IN  A,(SD_RDTR)"
+;
 SD_GET:
-#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
+  #IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
 	CALL	SD_WAITTX		; MAKE SURE WE ARE DONE SENDING
 	IN0	A,(Z180_CNTR)		; GET CSIO STATUS
 	SET	5,A			; START RECEIVER
@@ -1571,38 +1781,39 @@ SD_GET:
 	IN0	A,(Z180_TRDR)		; GET RECEIVED BYTE
 	CALL	MIRROR			; MSB<-->LSB MIRROR BITS
 	LD	A,C			; KEEP RESULT
-#ELSE
+  #ELSE
 	LD	B,8			; RECEIVE 8 BITS (LOOP 8 TIMES)
 	LD	A,(SD_OPRVAL)		; LOAD CURRENT OPR VALUE
 SD_GET1:
 	XOR	SD_CLK			; TOGGLE CLOCK
 	OUT	(SD_OPRREG),A		; UPDATE CLOCK
 	IN	A,(SD_INPREG)		; READ THE DATA WHILE CLOCK IS ACTIVE
-  #IF ((SDMODE == SDMODE_JUHA) | (SDMODE == SDMODE_PPI))
+    #IF ((SDMODE == SDMODE_JUHA) | (SDMODE == SDMODE_PPI))
 	RLA				; ROTATE INP:7 INTO CF
-  #ENDIF
-  #IF (SDMODE == SDMODE_N8)
+    #ENDIF
+    #IF (SDMODE == SDMODE_N8)
 	RLA				; ROTATE INP:6 INTO CF
 	RLA				; "
-  #ENDIF
-  #IF (SDMODE == SDMODE_UART)
+    #ENDIF
+    #IF (SDMODE == SDMODE_UART)
 	RLA				; ROTATE INP:5 INTO CF
 	RLA				; "
 	RLA				; "
-  #ENDIF
-  #IF (SDMODE == SDMODE_DSD)
+    #ENDIF
+    #IF (SDMODE == SDMODE_DSD)
 	RRA				; ROTATE INP:0 INTO CF
-  #ENDIF
+    #ENDIF
 	RL	C			; ROTATE CF INTO C:0
 	LD	A,(SD_OPRVAL)		; BACK TO INITIAL VALUES (TOGGLE CLOCK)
 	OUT	(SD_OPRREG),A		; DO IT
 	DJNZ	SD_GET1			; REPEAT FOR ALL 8 BITS
 	LD	A,C			; GET BYTE RECEIVED INTO A
-  #IF (SDMODE == SDMODE_UART)
+    #IF (SDMODE == SDMODE_UART)
 	XOR	$FF			; DO IS INVERTED ON UART
+    #ENDIF
   #ENDIF
-#ENDIF
 	RET
+#ENDIF
 ;
 ;=============================================================================
 ; ERROR HANDLING AND DIAGNOSTICS
@@ -1657,6 +1868,7 @@ SD_ERR2:
 	CALL	SD_PRTSTAT
 	CALL	SD_REGDUMP
 #ENDIF
+	CALL	SD_DESELECT		; De-select if there was an error
 	OR	A			; SET FLAGS
 	RET
 ;

Source/HBIOS/std.asm

@@ -155,6 +155,7 @@ SDMODE_UART	.EQU	5		; SD INTERFACE VIA UART
 SDMODE_DSD	.EQU	6		; DUAL SD
 SDMODE_MK4	.EQU	7		; MARK IV
 SDMODE_SC	.EQU	8		; SC (Steve Cousins)
+SDMODE_MT	.EQU	9		; MT (Shift register SPI WIZNET for RC2014)
 ;
 ; SOUND CHIP MODE SELECTIONS
 ;